component
AUIRF6218STRL
Public Made by Adomby adom
Infineon Technologies MOSFETs, D2PAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AUIRF6218STRL
Infineon Technologies · MOSFETs · D2PAK
AUIRF6218STRL from Infineon Technologies, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; gate-to-source voltage VGS is rated ±20 V (max.) per the absolute maximum ratings. |
| 2 | D | passive | Drain terminal; rated for VDSS of -150 V and continuous drain current of -27 A at TC = 25°C (VGS = -10 V). |
| 3 | S | passive | Source terminal; reference for VGS and the body diode, with continuous source current rated at -27 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | D2PAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Breakdown Voltage | V(BR)DSS | -150 | V | VGS = 0V, ID = -250µA | 2 | ||
| Static Drain-to-Source On-Resistance | RDS(on) | 120 | 150 | mΩ | VGS = -10V, ID = -16A | 2 | |
| Gate Threshold Voltage | VGS(th) | -3 | -5 | V | VDS = VGS, ID = -250µA | 2 | |
| Forward Transconductance | gfs | 11 | S | VDS = -50V, ID = -16A | 2 | ||
| Drain-to-Source Leakage Current | IDSS | -25 | µA | VDS = -120V, VGS = 0V | 2 | ||
| Drain-to-Source Leakage Current at TJ = 150°C | IDSS | -250 | µA | VDS = -120V, VGS = 0V, TJ = 150°C | 2 | ||
| Gate-to-Source Forward Leakage | IGSS | -100 | nA | VGS = -20V | 2 | ||
| Gate-to-Source Reverse Leakage | 100 | nA | VGS = 20V | 2 | |||
| Total Gate Charge | Qg | 71 | 110 | nC | ID = -16A, VDS = -120V, VGS = -10V | 2 | |
| Continuous Source Current (Body Diode) | IS | -27 | A | 2 | |||
| Pulsed Source Current (Body Diode) | ISM | -110 | A | 2 | |||
| Diode Forward Voltage | VSD | -1.6 | V | TJ = 25°C, IS = -16A, VGS = 0V | 2 | ||
| Continuous Drain Current | ID | -27 | A | TC = 25°C, VGS @ 10V | 1 | ||
| Continuous Drain Current | ID | -19 | A | TC = 100°C, VGS @ 10V | 1 | ||
| Pulsed Drain Current | IDM | -110 | A | 1 | |||
| Maximum Power Dissipation | PD | 250 | W | TC = 25°C | 1 | ||
| Linear Derating Factor | 1.6 | W/°C | 1 | ||||
| Gate-to-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Single Pulse Avalanche Energy | EAS | 210 | mJ | Thermally Limited | 1 | ||
| Avalanche Current | IAR | -16 | A | 1 | |||
| Peak Diode Recovery | dv/dt | 8.2 | V/ns | 1 | |||
| Operating Junction Temperature | TJ | -55 | 175 | °C | 1 | ||
| Storage Temperature Range | TSTG | -55 | 175 | °C | 1 | ||
| Soldering Temperature | 300 | °C | for 10 seconds (1.6mm from case) | 1 | |||
| Junction-to-Case Thermal Resistance | RJC | 0.61 | °C/W | 1 | |||
| Junction-to-Ambient Thermal Resistance | RJA | 40 | °C/W | PCB Mount, steady state | 1 |
CAD (KiCad official)
- Symbol:
AUIRF6218STRL - Footprint:
Package_TO_SOT_SMD:TO-263-2 - 3D model: D2PAK (KiCad packages3D, STEP)
- 3D model files:
auirf6218strl-etched.step/auirf6218strl-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);auirf6218strl.step/auirf6218strl.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (10 pp, sha256
e6bf23c9ccd16e37, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AUIRF6218STRL
**Infineon Technologies** · MOSFETs · D2PAK
AUIRF6218STRL from Infineon Technologies, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; gate-to-source voltage VGS is rated ±20 V (max.) per the absolute maximum ratings. |
| 2 | D | passive | Drain terminal; rated for VDSS of -150 V and continuous drain current of -27 A at TC = 25°C (VGS = -10 V). |
| 3 | S | passive | Source terminal; reference for VGS and the body diode, with continuous source current rated at -27 A. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | D2PAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Breakdown Voltage | V(BR)DSS | -150 | | | V | VGS = 0V, ID = -250µA | 2 |
| Static Drain-to-Source On-Resistance | RDS(on) | | 120 | 150 | mΩ | VGS = -10V, ID = -16A | 2 |
| Gate Threshold Voltage | VGS(th) | -3 | | -5 | V | VDS = VGS, ID = -250µA | 2 |
| Forward Transconductance | gfs | 11 | | | S | VDS = -50V, ID = -16A | 2 |
| Drain-to-Source Leakage Current | IDSS | | | -25 | µA | VDS = -120V, VGS = 0V | 2 |
| Drain-to-Source Leakage Current at TJ = 150°C | IDSS | | | -250 | µA | VDS = -120V, VGS = 0V, TJ = 150°C | 2 |
| Gate-to-Source Forward Leakage | IGSS | | | -100 | nA | VGS = -20V | 2 |
| Gate-to-Source Reverse Leakage | | | | 100 | nA | VGS = 20V | 2 |
| Total Gate Charge | Qg | | 71 | 110 | nC | ID = -16A, VDS = -120V, VGS = -10V | 2 |
| Continuous Source Current (Body Diode) | IS | | | -27 | A | | 2 |
| Pulsed Source Current (Body Diode) | ISM | | | -110 | A | | 2 |
| Diode Forward Voltage | VSD | | | -1.6 | V | TJ = 25°C, IS = -16A, VGS = 0V | 2 |
| Continuous Drain Current | ID | | | -27 | A | TC = 25°C, VGS @ 10V | 1 |
| Continuous Drain Current | ID | | | -19 | A | TC = 100°C, VGS @ 10V | 1 |
| Pulsed Drain Current | IDM | | | -110 | A | | 1 |
| Maximum Power Dissipation | PD | | | 250 | W | TC = 25°C | 1 |
| Linear Derating Factor | | | | 1.6 | W/°C | | 1 |
| Gate-to-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Single Pulse Avalanche Energy | EAS | | | 210 | mJ | Thermally Limited | 1 |
| Avalanche Current | IAR | | | -16 | A | | 1 |
| Peak Diode Recovery | dv/dt | | | 8.2 | V/ns | | 1 |
| Operating Junction Temperature | TJ | -55 | | 175 | °C | | 1 |
| Storage Temperature Range | TSTG | -55 | | 175 | °C | | 1 |
| Soldering Temperature | | | | 300 | °C | for 10 seconds (1.6mm from case) | 1 |
| Junction-to-Case Thermal Resistance | RJC | | | 0.61 | °C/W | | 1 |
| Junction-to-Ambient Thermal Resistance | RJA | | | 40 | °C/W | PCB Mount, steady state | 1 |
## CAD (KiCad official)
- Symbol: `AUIRF6218STRL`
- Footprint: `Package_TO_SOT_SMD:TO-263-2`
- 3D model: D2PAK (KiCad packages3D, STEP)
- 3D model files: `auirf6218strl-etched.step` / `auirf6218strl-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `auirf6218strl.step` / `auirf6218strl.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Infineon Technologies datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590369399669620736) (10 pp, sha256 `e6bf23c9ccd16e37`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/auirf6218strl-datasheet.pdf)