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AUIRF1404ZSTRL

Public Made by Adom

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Infineon Technologies MOSFETs, D2PAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistorsauirf1404zstrlfactory-2.0.0extractor-text

Verified AUIRF1404ZSTRL

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 3 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AUIRF1404ZSTRL · D2PAK · 3 pins
  • ✓copper: 3 copper pads, none touching another net
  • ✓datasheet: all 3 pin names found in the 13-page datasheet
  • ✓distributor: lcsc C533228, digikey 2156-AUIRF1404ZSTRL-IR-ND, mouser 942-AUIRF1404ZSTRL
  • ✓family: TO-263-2
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-2x37iw95/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 3 pins = 3 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 3 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ auirf1404zstrl.kicad_sym✓ auirf1404zstrl.kicad_mod✓ auirf1404zstrl.step
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AUIRF1404ZSTRL

Infineon Technologies · MOSFETs · D2PAK

AUIRF1404ZSTRL from Infineon Technologies, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate terminal of the HEXFET; gate-to-source voltage is rated at ±20 V maximum (VGS).
2 D passive Drain terminal; rated 40 V VDSS with 180 A continuous drain current (silicon limited) at TC = 25°C and 160 A (package limited).
3 S passive Source terminal; continuous source (body diode) current is rated at 160 A maximum (IS).

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package D2PAK
Category Transistors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Continuous Drain Current, VGS @ 10V (Silicon Limited) ID 180 A TC = 25°C; VGS @ 10V (Silicon Limited) 1
Continuous Drain Current, VGS @ 10V (Silicon Limited) ID 120 A TC = 100°C; VGS @ 10V (Silicon Limited) 1
Continuous Drain Current, VGS @ 10V (Package Limited) ID 160 A TC = 25°C; VGS @ 10V (Package Limited) 1
Pulsed Drain Current IDM 710 A 1
Maximum Power Dissipation PD 200 W TC = 25°C 1
Linear Derating Factor 1.3 W/°C 1
Gate-to-Source Voltage VGS -20 20 V 1
Single Pulse Avalanche Energy (Thermally Limited) EAS 330 mJ 1
Single Pulse Avalanche Energy Tested Value EAS (tested) 480 mJ 1
Operating Junction Temperature TJ -55 175 °C 1
Soldering Temperature 300 °C for 10 seconds (1.6mm from case) 1
Mounting torque 10 lbf•in 6-32 or M3 screw 1
Mounting torque 1.1 N•m 6-32 or M3 screw 1
Junction-to-Case RJC 0.75 °C/W 1
Junction-to-Ambient RJA 62 °C/W 1
Drain-to-Source Breakdown Voltage V(BR)DSS 40 V VGS = 0V, ID = 250µA 2
Static Drain-to-Source On-Resistance RDS(on) 2.7 3.7 mΩ VGS = 10V, ID = 75A 2
Gate Threshold Voltage VGS(th) 2 4 V VDS = VGS, ID = 250µA 2
Forward Transconductance gfs 170 S VDS = 25V, ID = 75A 2
Drain-to-Source Leakage Current IDSS 20 µA VDS = 40 V, VGS = 0V 2
Drain-to-Source Leakage Current IDSS 250 µA VDS = 40V, VGS = 0V, TJ = 125°C 2
Gate-to-Source Forward Leakage IGSS 200 nA VGS = 20V 2
Gate-to-Source Reverse Leakage IGSS -200 nA VGS = -20V 2
Total Gate Charge Qg 100 150 nC ID = 75A 2
Continuous Source Current (Body Diode) IS 160 A 2
Pulsed Source Current (Body Diode) ISM 750 A 2
Diode Forward Voltage VSD 1.3 V TJ = 25°C, IS = 75A, VGS = 0V 2
Reverse Recovery Time trr 28 42 ns TJ = 25°C, IF = 75A, VDD = 20V 2
Reverse Recovery Charge Qrr 34 51 nC di/dt = 100A/µs 2
Case-to-Sink, Flat, Greased Surface RCS 0.5 °C/W Flat, Greased Surface 1
Junction-to-Ambient (PCB Mount, steady state) RJA 40 °C/W PCB Mount, steady state 1

CAD (KiCad official)

  • Symbol: AUIRF1404ZSTRL
  • Footprint: Package_TO_SOT_SMD:TO-263-2
  • 3D model: D2PAK (KiCad packages3D, STEP)
  • 3D model files: auirf1404zstrl-etched.step / auirf1404zstrl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); auirf1404zstrl.step / auirf1404zstrl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (13 pp, sha256 24cc5eb6520726ff, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF