component
ATXMEGA192A3-AUR
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-64(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownATXMEGA192A3-AUR
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-64(14x14)
ATXMEGA192A3-AUR from Microchip Tech, in a TQFP-64(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA3 | bidirectional | Port A bit 3 I/O with synchronous port interrupt; alternate ADCA channel 3 and AC3 analog inputs. |
| 2 | PA4 | bidirectional | Port A bit 4 I/O with synchronous port interrupt; alternate ADCA channel 4 and AC4 analog inputs. |
| 3 | PA5 | bidirectional | Port A bit 5 I/O with synchronous port interrupt; alternate ADCA channel 5 and AC5 analog inputs. |
| 4 | PA6 | bidirectional | Port A bit 6 I/O with synchronous port interrupt; alternate ADCA channel 6 and AC6 analog inputs. |
| 5 | PA7 | bidirectional | Port A bit 7 I/O with synchronous port interrupt; alternate ADCA channel 7, AC7 input and AC0 output. |
| 6 | PB0 | bidirectional | Port B bit 0 I/O with synchronous port interrupt; alternate ADCB channel 0, AC0 input and AREF reference input. |
| 7 | PB1 | bidirectional | Port B bit 1 I/O with synchronous port interrupt; alternate ADCB channel 1 and AC1 analog inputs. |
| 8 | PB2 | bidirectional | Port B bit 2 I/O with synchronous/asynchronous port interrupt; alternate ADCB channel 2, AC2 input and DAC0 output. |
| 9 | PB3 | bidirectional | Port B bit 3 I/O with synchronous port interrupt; alternate ADCB channel 3, AC3 input and DAC1 output. |
| 10 | PB4 | bidirectional | Port B bit 4 I/O with synchronous port interrupt; alternate ADCB channel 4 input and JTAG TMS, a TAP pin when JTAG is enabled. |
| 11 | PB5 | bidirectional | Port B bit 5 I/O with synchronous port interrupt; alternate ADCB channel 5, AC5 input and JTAG TDI, a TAP pin when JTAG is enabled. |
| 12 | PB6 | bidirectional | Port B bit 6 I/O with synchronous port interrupt; alternate ADCB channel 6 input and JTAG TCK, a TAP pin when JTAG is enabled. |
| 13 | PB7 | bidirectional | Port B bit 7 I/O with synchronous port interrupt; alternate ADCB channel 7, AC7 input, AC0 output and JTAG TDO, a TAP pin when JTAG is enabled. |
| 14 | GND | power_in | Ground reference pin for the device digital supply. |
| 15 | VCC | power_in | Digital supply voltage; the datasheet operating range is 1.6 to 3.6 V. |
| 16 | PC0 | bidirectional | Port C bit 0 I/O with synchronous port interrupt; alternate TCC0 OC0A/OC0ALS outputs and TWIC SDA. |
| 17 | PC1 | bidirectional | Port C bit 1 I/O with synchronous port interrupt; alternate TCC0 OC0B/OC0AHS outputs, USARTC0 XCK0 and TWIC SCL. |
| 18 | PC2 | bidirectional | Port C bit 2 I/O with synchronous/asynchronous port interrupt; alternate TCC0 OC0C/OC0BLS outputs and USARTC0 RXD0. |
| 19 | PC3 | bidirectional | Port C bit 3 I/O with synchronous port interrupt; alternate TCC0 OC0D/OC0BHS outputs and USARTC0 TXD0. |
| 20 | PC4 | bidirectional | Port C bit 4 I/O with synchronous port interrupt; alternate TCC0 OC0CLS output, TCC1 OC1A and SPIC SS. |
| 21 | PC5 | bidirectional | Port C bit 5 I/O with synchronous port interrupt; alternate TCC0 OC0CHS output, TCC1 OC1B, USARTC1 XCK1 and SPIC MOSI. |
| 22 | PC6 | bidirectional | Port C bit 6 I/O with synchronous port interrupt; alternate TCC0 OC0DLS output, USARTC1 RXD1 and SPIC MISO. |
| 23 | PC7 | bidirectional | Port C bit 7 I/O with synchronous port interrupt; alternate TCC0 OC0DHS output, USARTC1 TXD1, SPIC SCK, CLKOUT and EVOUT. |
| 24 | GND | power_in | Ground reference pin for the device digital supply. |
| 25 | VCC | power_in | Digital supply voltage; the datasheet operating range is 1.6 to 3.6 V. |
| 26 | PD0 | bidirectional | Port D bit 0 I/O with synchronous port interrupt; alternate TCD0 OC0A output. |
| 27 | PD1 | bidirectional | Port D bit 1 I/O with synchronous port interrupt; alternate TCD0 OC0B output and USARTD0 XCK0. |
| 28 | PD2 | bidirectional | Port D bit 2 I/O with synchronous/asynchronous port interrupt; alternate TCD0 OC0C output and USARTD0 RXD0. |
| 29 | PD3 | bidirectional | Port D bit 3 I/O with synchronous port interrupt; alternate TCD0 OC0D output and USARTD0 TXD0. |
| 30 | PD4 | bidirectional | Port D bit 4 I/O with synchronous port interrupt; alternate TCD1 OC1A output and SPID SS. |
| 31 | PD5 | bidirectional | Port D bit 5 I/O with synchronous port interrupt; alternate TCD1 OC1B output, USARTD1 XCK1 and SPID MOSI. |
| 32 | PD6 | bidirectional | Port D bit 6 I/O with synchronous port interrupt; alternate USARTD1 RXD1 and SPID MISO. |
| 33 | PD7 | bidirectional | Port D bit 7 I/O with synchronous port interrupt; alternate USARTD1 TXD1, SPID SCK, CLKOUT and EVOUT. |
| 34 | GND | power_in | Ground reference pin for the device digital supply. |
| 35 | VCC | power_in | Digital supply voltage; the datasheet operating range is 1.6 to 3.6 V. |
| 36 | PE0 | bidirectional | Port E bit 0 I/O with synchronous port interrupt; alternate TCE0 OC0A output and TWIE SDA. |
| 37 | PE1 | bidirectional | Port E bit 1 I/O with synchronous port interrupt; alternate TCE0 OC0B output, USARTE0 XCK0 and TWIE SCL. |
| 38 | PE2 | bidirectional | Port E bit 2 I/O with synchronous/asynchronous port interrupt; alternate TCE0 OC0C output and USARTE0 RXD0. |
| 39 | PE3 | bidirectional | Port E bit 3 I/O with synchronous port interrupt; alternate TCE0 OC0D output and USARTE0 TXD0. |
| 40 | PE4 | bidirectional | Port E bit 4 I/O with synchronous port interrupt; alternate TCE1 OC1A output and SPIE SS. |
| 41 | PE5 | bidirectional | Port E bit 5 I/O with synchronous port interrupt; alternate TCE1 OC1B output, USARTE1 XCK1 and SPIE MOSI. |
| 42 | PE6 | bidirectional | Port E bit 6 I/O with synchronous port interrupt; alternate USARTE1 RXD1, SPIE MISO and TOSC2 oscillator pin. |
| 43 | PE7 | bidirectional | Port E bit 7 I/O with synchronous port interrupt; alternate USARTE1 TXD1, SPIE SCK, CLKOUT, EVOUT and TOSC1 oscillator pin. |
| 44 | GND | power_in | Ground reference pin for the device digital supply. |
| 45 | VCC | power_in | Digital supply voltage; the datasheet operating range is 1.6 to 3.6 V. |
| 46 | PF0 | bidirectional | Port F bit 0 general-purpose I/O with configurable output and synchronous/asynchronous input sensing; its alternate functions are not in the supplied pages. |
| 47 | PF1 | bidirectional | Port F bit 1 general-purpose I/O with configurable output and synchronous/asynchronous input sensing; its alternate functions are not in the supplied pages. |
| 48 | PF2 | bidirectional | Port F bit 2 general-purpose I/O with configurable output and synchronous/asynchronous input sensing; its alternate functions are not in the supplied pages. |
| 49 | PF3 | bidirectional | Port F bit 3 general-purpose I/O with configurable output and synchronous/asynchronous input sensing; its alternate functions are not in the supplied pages. |
| 50 | PF4 | bidirectional | Port F bit 4 general-purpose I/O with configurable output and synchronous/asynchronous input sensing; its alternate functions are not in the supplied pages. |
| 51 | PF5 | bidirectional | Port F bit 5 general-purpose I/O with configurable output and synchronous/asynchronous input sensing; its alternate functions are not in the supplied pages. |
| 52 | GND | power_in | Ground reference pin for the device digital supply. |
| 53 | VCC | power_in | Digital supply voltage; the datasheet operating range is 1.6 to 3.6 V. |
| 54 | PF6 | bidirectional | Port F bit 6 general-purpose I/O with configurable output and synchronous/asynchronous input sensing; its alternate functions are not in the supplied pages. |
| 55 | PF7 | bidirectional | Port F bit 7 general-purpose I/O with configurable output and synchronous/asynchronous input sensing; its alternate functions are not in the supplied pages. |
| 56 | PDI | bidirectional | Program and Debug Interface data pin of the Atmel proprietary 2-pin PDI, used together with the Reset pin and no general-purpose pins. |
| 57 | RESET/PDI | input | Reset pin shared with the PDI interface, which uses this pin together with the PDI data pin. |
| 58 | PR0 | bidirectional | Port R bit 0 pin shown on the 64-lead pinout; its function is not described in the supplied pages. |
| 59 | PR1 | bidirectional | Port R bit 1 pin shown on the 64-lead pinout; its function is not described in the supplied pages. |
| 60 | GND | power_in | Ground reference pin for the device digital supply. |
| 61 | AVCC | power_in | Analog supply voltage pin for the analog peripherals; the datasheet operating range is 1.6 to 3.6 V. |
| 62 | PA0 | bidirectional | Port A bit 0 I/O with synchronous port interrupt; alternate ADCA channel 0, AC0 input and AREF reference input. |
| 63 | PA1 | bidirectional | Port A bit 1 I/O with synchronous port interrupt; alternate ADCA channel 1 and AC1 analog inputs. |
| 64 | PA2 | bidirectional | Port A bit 2 I/O with synchronous/asynchronous port interrupt; alternate ADCA channel 2 and AC2 analog inputs. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-64(14x14) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 64 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage | VCC | 1.6 | 3.6 | V | Power Supply column of ordering information, -AU package | 2 | |
| Operating temperature (device grade) | -40 | 85 | °C | Temp column of ordering information | 2 | ||
| CPU clock frequency | ClkCPU | 0 | 12 | MHz | VCC = 1.6V | 65 | |
| CPU clock frequency | ClkCPU | 0 | 32 | MHz | VCC = 2.7V | 65 | |
| Operating temperature | -55 | 125 | °C | 63 | |||
| Storage temperature | -65 | 150 | °C | 63 | |||
| Voltage on any pin with respect to ground | -0.5 | V | 63 | ||||
| Maximum operating voltage | 3.6 | V | 63 | ||||
| DC current per I/O pin | 20 | mA | 63 | ||||
| DC current VCC and GND pins | 200 | mA | 63 | ||||
| Power supply current, Active | ICC | 613 | 800 | µA | 2 MHz, Ext. Clk, VCC = 1.8V | 63 | |
| Power supply current, Active | ICC | 1340 | 1800 | µA | 2 MHz, Ext. Clk, VCC = 3.0V | 63 | |
| Power supply current, Active | ICC | 15.7 | 18 | mA | 32 MHz, Ext. Clk, VCC = 3.0V | 63 | |
| Power supply current, Idle | ICC | 224 | 350 | µA | 2 MHz, Ext. Clk, VCC = 1.8V | 63 | |
| Power supply current, Idle | ICC | 430 | 650 | µA | 2 MHz, Ext. Clk, VCC = 3.0V | 63 | |
| Power supply current, Idle | ICC | 6.9 | 8 | mA | 32 MHz, Ext. Clk, VCC = 3.0V | 63 | |
| Power supply current, Power-down | ICC | 0.1 | 3 | µA | All Functions Disabled, T = 25°C, VCC = 3.0V | 63 | |
| Power supply current, Power-down | ICC | 1.75 | 5 | µA | All Functions Disabled, T = 85°C, VCC = 3.0V | 63 | |
| Power supply current, ULP WDT, Sampled BOD | ICC | 1 | 6 | µA | T = 25°C, VCC = 1.8V | 63 | |
| Power supply current, ULP WDT, Sampled BOD | ICC | 2.7 | 10 | µA | T = 85°C, VCC = 3.0V | 63 | |
| Power supply current, Power-save (RTC 1 kHz) | ICC | 0.5 | 4 | µA | RTC 1 kHz from Low Power 32kHz TOSC, T = 25°C, VCC = 1.8V | 64 | |
| Power supply current, Power-save (RTC 1 kHz) | ICC | 0.7 | 4 | µA | RTC 1 kHz from Low Power 32kHz TOSC, T = 25°C, VCC = 3.0V | 64 | |
| ADC resolution | RES | 8 | 12 | 12 | Bits | Programmable: 8/12 | 67 |
| ADC integral non-linearity | INL | -5 | 2 | 5 | LSB | Differential mode, 500ksps | 67 |
| ADC differential non-linearity | DNL | -1 | 1 | LSB | Differential mode, 500ksps | 67 | |
| ADC gain error | -10 | 10 | mV | 67 | |||
| ADC offset error | -2 | 2 | mV | 67 | |||
| ADC clock frequency | ADCclk | 2000 | kHz | Max is 1/4 of Peripheral Clock | 67 | ||
| ADC reference voltage | VREF | 1 | V | Maximum printed as Vcc-0.6 | 67 | ||
| ADC gain stage gain error | -1 | 1 | % | 1 to 64 gain | 67 | ||
| ADC gain stage offset error | -1 | 1 | mV | 67 | |||
| DAC integral non-linearity | INL | 5 | LSB | VCC = 1.6-3.6V, VREF = Ext. ref | 68 | ||
| DAC differential non-linearity | DNL | -1 | 1 | LSB | VCC = 1.6-3.6V, VREF = Ext. ref | 68 | |
| DAC AREF external reference voltage | AREF | 1.1 | V | Maximum printed as AVCC-0.6 | 68 | ||
| DAC minimum output voltage | 0.015 | V | Rload = 100k | 68 | |||
| DAC offset factory calibration accuracy | -0.5 | 0.5 | LSB | Continuous mode, VCC = 3.0V, VREF = Int 1.00V, T = 85°C | 68 | ||
| DAC gain factory calibration accuracy | -2.5 | 2.5 | LSB | 68 | |||
| Analog comparator input offset voltage | Voff | -10 | 10 | mV | VCC = 1.6 - 3.6V | 68 | |
| Analog comparator input leakage current | Ilk | 1000 | pA | VCC = 1.6 - 3.6V | 68 | ||
| Internal 1.00V bandgap reference | INT1V | 0.99 | 1 | 1.01 | V | T = 85°C, After calibration | 68 |
| Bandgap variation over voltage and temperature | -2 | 2 | % | VCC = 1.6 - 3.6V, T = -40C to 85C | 68 | ||
| BOD level 0 falling threshold | VCC | 1.62 | 1.63 | 1.7 | V | 69 | |
| Input low voltage | VIL | -0.5 | V | VCC = 2.4 - 3.6V; maximum printed as 0.3*VCC | 69 | ||
| Output low voltage GPIO | VOL | 0.4 | 0.76 | V | IOH = 15 mA, VCC = 3.3V | 69 | |
| Output low voltage GPIO | VOL | 0.3 | 0.64 | V | IOH = 10 mA, VCC = 3.0V | 69 | |
| Output low voltage GPIO | VOL | 0.2 | 0.46 | V | IOH = 5 mA, VCC = 1.8V | 69 | |
| Output high voltage GPIO | VOH | 2.6 | 2.9 | V | IOH = -8 mA, VCC = 3.3V | 69 | |
| Output high voltage GPIO | VOH | 2.1 | 2.7 | V | IOH = -6 mA, VCC = 3.0V | 69 | |
| Output high voltage GPIO | VOH | 1.4 | 1.6 | V | IOH = -2 mA, VCC = 1.8V | 69 | |
| Input leakage current I/O pin (low) | IIL | 1 | µA | I/O pin | 69 | ||
| Input leakage current I/O pin (high) | IIH | 1 | µA | I/O pin | 69 | ||
| Internal 32.768kHz oscillator accuracy | -0.5 | 0.5 | % | T = 85C, VCC = 3V, after production calibration | 70 | ||
| Internal 2MHz oscillator accuracy | -1.5 | 1.5 | % | T = 85C, VCC = 3V, after production calibration | 70 | ||
| Internal 32MHz oscillator accuracy | -1.5 | 1.5 | % | T = 85C, VCC = 3V, after production calibration | 70 |
CAD (KiCad official)
- Symbol:
ATXMEGA192A3-AUR - Footprint:
Package_QFP:TQFP-64_14x14mm_P0.8mm - 3D model: TQFP-64(14x14) (KiCad packages3D, STEP)
- 3D model files:
atxmega192a3-aur-etched.step/atxmega192a3-aur-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atxmega192a3-aur.step/atxmega192a3-aur.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (134 pp, sha256
c8f7bcf05809ca24, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).