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ATTINY88-MUR

Public Made by Adom

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Microchip Tech ATMEL & AVR, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersattiny88-murfactory-2.0.0extractor-text

Verified ATTINY88-MUR

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier lcsc, 33 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATTINY88-MUR · QFN-32-EP(5x5) · 33 pins
  • ✓copper: 33 copper pads, none touching another net
  • ✓datasheet: all 33 pin names found in the 302-page datasheet
  • ✓distributor: lcsc C219105, digikey ATTINY88-MURTR-ND, mouser 556-ATTINY88-MUR
  • ✓family: QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-3md9i__1/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.289)
  • ✓pads: 33 pins = 33 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 33 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ attiny88-mur.kicad_sym✓ attiny88-mur.kicad_mod✓ attiny88-mur.step
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Ray Publish 0.1.0 7d63dd7 5d ago

ATTINY88-MUR

Microchip Tech · ATMEL & AVR · QFN-32-EP(5x5)

ATTINY88-MUR from Microchip Tech, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PD3 bidirectional Port D bit 3 with INT1 external interrupt source and PCINT19; PD[3:0] output buffers have high sink capability.
2 PD4 bidirectional Port D bit 4 with T0 Timer/Counter0 external counter input and PCINT20; PD[7:4] output buffers have symmetrical sink and source drive.
3 PA2 bidirectional Port A bit 2 with PCINT26 pin change interrupt source; Port A is available only in 32-lead packages and is tri-stated when reset is active.
4 VCC power_in Digital supply voltage.
5 GND power_in Ground.
6 PA3 bidirectional Port A bit 3 with PCINT27 pin change interrupt source; Port A is a 4-bit bidirectional I/O port with selectable internal pull-ups.
7 PB6 bidirectional Port B bit 6 that serves as CLKI external clock input (when used as clock pin it cannot be used as I/O) and PCINT6 pin change interrupt source.
8 PB7 bidirectional Port B bit 7 with PCINT7 pin change interrupt source; Port B is an 8-bit bidirectional I/O port with selectable internal pull-ups.
9 PD5 bidirectional Port D bit 5 with T1 Timer/Counter1 external counter input and PCINT21 pin change interrupt source.
10 PD6 bidirectional Port D bit 6 with AIN0 analog comparator positive input (configure as input with pull-up off) and PCINT22 pin change interrupt source.
11 PD7 bidirectional Port D bit 7 with AIN1 analog comparator negative input (configure as input with pull-up off) and PCINT23 pin change interrupt source.
12 PB0 bidirectional Port B bit 0 with ICP1 Timer/Counter1 input capture pin, CLKO divided system clock output when the CKOUT fuse is programmed, and PCINT0 pin change interrupt source.
13 PB1 bidirectional Port B bit 1 with OC1A Timer/Counter1 compare match A output, which requires the pin to be configured as an output, and PCINT1 pin change interrupt source.
14 PB2 bidirectional Port B bit 2 with SS SPI slave select input, OC1B Timer/Counter1 compare match B output (requires output configuration), and PCINT2 pin change interrupt source.
15 PB3 bidirectional Port B bit 3 with MOSI SPI master output / slave input and PCINT3 pin change interrupt source.
16 PB4 bidirectional Port B bit 4 with MISO SPI master input / slave output and PCINT4 pin change interrupt source.
17 PB5 bidirectional Port B bit 5 with SCK SPI master clock output / slave clock input and PCINT5 pin change interrupt source; this pin takes its supply from VCC.
18 AVCC power_in Supply voltage pin for the A/D converter and PC7, PC[5:0] and PA[1:0]; it should be connected to VCC even if the ADC is not used, and through a low-pass filter if the ADC is used.
19 PA0 bidirectional Port A bit 0 with ADC6 ADC input channel 6 and PCINT24 pin change interrupt source; in 32-lead packages PA0 takes its supply from AVCC.
20 PC7 bidirectional Port C bit 7 with PCINT15 pin change interrupt source; this pin takes its supply from AVCC.
21 GND power_in Ground.
22 PA1 bidirectional Port A bit 1 with ADC7 ADC input channel 7 and PCINT25 pin change interrupt source; in 32-lead packages PA1 takes its supply from AVCC.
23 PC0 bidirectional Port C bit 0 with ADC0 ADC input channel 0 (uses analog power) and PCINT8 pin change interrupt source.
24 PC1 bidirectional Port C bit 1 with ADC1 ADC input channel 1 (uses analog power) and PCINT9 pin change interrupt source.
25 PC2 bidirectional Port C bit 2 with ADC2 ADC input channel 2 (uses analog power) and PCINT10 pin change interrupt source.
26 PC3 bidirectional Port C bit 3 with ADC3 ADC input channel 3 (uses analog power) and PCINT11 pin change interrupt source.
27 PC4 bidirectional Port C bit 4 with SDA 2-wire serial data I/O (open-drain with spike filter when TWEN is set), ADC4 input channel 4 (uses digital power) and PCINT12 pin change interrupt source.
28 PC5 bidirectional Port C bit 5 with SCL 2-wire serial clock I/O (open-drain with spike filter when TWEN is set), ADC5 input channel 5 (uses digital power) and PCINT13 pin change interrupt source.
29 PC6 bidirectional PC6/RESET: a low level longer than the minimum pulse width generates a reset when the RSTDISBL fuse is unprogrammed, otherwise it is an I/O pin; it also provides PCINT14 and its electrical characteristics differ from the other Port C pins.
30 PD0 bidirectional Port D bit 0 with PCINT16 pin change interrupt source; PD[3:0] output buffers have high sink capability.
31 PD1 bidirectional Port D bit 1 with PCINT17 pin change interrupt source; PD[3:0] output buffers have high sink capability.
32 PD2 bidirectional Port D bit 2 with INT0 external interrupt source 0 and PCINT18 pin change interrupt source; PD[3:0] output buffers have high sink capability.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-32-EP(5x5)
Category Embedded Processors & Controllers
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Temperature -55 125 °C 206
Storage Temperature -65 150 °C 206
Voltage on any pin except RESET with respect to Ground -0.5 V Upper limit printed as VCC+0.5V 206
Voltage on RESET with respect to Ground -0.5 13 V 206
Maximum Operating Voltage 6 V 206
DC Current per I/O Pin 40 mA 206
DC Current VCC and GND Pins 200 mA 206
Supply voltage VCC (operating) VCC 1.8 5.5 V TA = -40°C to +85°C 206
Operating temperature (industrial range) TA -40 85 °C 1
Speed grade maximum frequency 0 4 MHz VCC = 1.8, 5.5V 1
Speed grade maximum frequency 0 8 MHz VCC = 2.7, 5.5V 1
Speed grade maximum frequency 0 12 MHz VCC = 4.5, 5.5V 1
Oscillator Frequency 1/tCLCL 0 2 MHz VCC = 1.8-5.5V 209
Oscillator Frequency 1/tCLCL 0 6 MHz VCC = 2.7-5.5V 209
Oscillator Frequency 1/tCLCL 0 12 MHz VCC = 4.5-5.5V 209
Input Low Voltage, Except RESET pin VIL -0.5 V VCC = 1.8V, 2.4V; max printed as 0.2VCC 206
Input Low Voltage, RESET pin as reset VIL -0.5 V VCC = 1.8V, 5.5V; max printed as 0.2VCC 206
Output Low Voltage (except high sink I/O pins and RESET as I/O) VOL 0.7 V IOL = 10 mA, VCC = 5V 206
Output Low Voltage (except high sink I/O pins and RESET as I/O) VOL 0.5 V IOL = 5 mA, VCC = 3V 206
Output Low Voltage (except high sink I/O pins and RESET as I/O) VOL 0.4 V IOL = 2 mA, VCC = 1.8V 206
Output Low Voltage (high sink I/O pins PD0-PD3) VOL 0.7 V IOL = 20 mA, VCC = 5V 206
Output Low Voltage (high sink I/O pins PD0-PD3) VOL 0.5 V IOL = 10 mA, VCC = 3V 206
Output Low Voltage (high sink I/O pins PD0-PD3) VOL 0.4 V IOL = 4 mA, VCC = 1.8V 206
Output Low Voltage (RESET pin as I/O) VOL 0.7 V IOL = 2 mA, VCC = 5V 206
Output Low Voltage (RESET pin as I/O) VOL 0.5 V IOL = 1 mA, VCC = 3V 206
Output Low Voltage (RESET pin as I/O) VOL 0.4 V IOL = 0.4 mA, VCC = 1.8V 206
Output High Voltage (except high sink I/O pins and RESET as I/O) VOH 4.3 V IOH = -10 mA, VCC = 5V 206
Output High Voltage (except high sink I/O pins and RESET as I/O) VOH 2.5 V IOH = -5 mA, VCC = 3V 206
Output High Voltage (except high sink I/O pins and RESET as I/O) VOH 1.4 V IOH = -2 mA, VCC = 1.8V 206
Output High Voltage (high sink I/O pins PD0-PD3) VOH 4.3 V IOH = -10 mA, VCC = 5V 206
Output High Voltage (high sink I/O pins PD0-PD3) VOH 2.5 V IOH = -5 mA, VCC = 3V 206
Output High Voltage (high sink I/O pins PD0-PD3) VOH 1.4 V IOH = -2 mA, VCC = 1.8V 206
Input Leakage Current I/O Pin, pin low ILIL 1 µA VCC = 5.5V, pin low (absolute value); typ printed <0.05 207
Input Leakage Current I/O Pin, pin high ILIH 1 µA VCC = 5.5V, pin high (absolute value); typ printed <0.05 207
Pull-up Resistor, I/O Pin RPU 20 50 kΩ VCC = 5.5V, input low 207
Pull-up Resistor, Reset Pin RPU 30 60 kΩ VCC = 5.5V, input low 207
Supply Current, Active Mode ICC 0.2 0.4 mA f = 1MHz, VCC = 2V 207
Supply Current, Active Mode ICC 1.4 2.5 mA f = 4MHz, VCC = 3V 207
Supply Current, Active Mode ICC 4.5 8 mA f = 8MHz, VCC = 5V 207
Supply Current, Idle Mode ICC 0.03 0.1 mA f = 1MHz, VCC = 2V 207
Supply Current, Idle Mode ICC 0.25 0.6 mA f = 4MHz, VCC = 3V 207
Supply Current, Idle Mode ICC 1 2 mA f = 8MHz, VCC = 5V 207
Supply Current, Power-down Mode, WDT enabled ICC 4 10 µA WDT enabled, VCC = 3V 207
Supply Current, Power-down Mode, WDT disabled ICC 2 µA WDT disabled, VCC = 3V; typ printed <0.2 207
Brown-out Detection Threshold VBOT (BODLEVEL 110) VBOT 1.7 1.8 2 V BODLEVEL[2:0] = 110 210
Brown-out Detection Threshold VBOT (BODLEVEL 101) VBOT 2.5 2.7 2.9 V BODLEVEL[2:0] = 101 210
Brown-out Detection Threshold VBOT (BODLEVEL 100) VBOT 4.1 4.3 4.5 V BODLEVEL[2:0] = 100 210
Internal bandgap reference voltage VBG 1 1.1 1.2 V VCC = 5V, TA = 25°C 210
Input Offset Voltage (analog comparator) VAIO 40 mV VCC = 5V, VIN = VCC / 2; typ printed <10 210
Input Leakage Current (analog comparator) ILAC -50 50 nA VCC = 5V, VIN = VCC / 2 210
ADC Clock Frequency 50 1000 kHz 211
Two-Wire Interface Output Low Voltage VOL 0 0.4 V 3mA sink current 212
SCL clock frequency fSCL 0 400 kHz fCK > max(16fSCL, 250kHz) 212
Hold time (repeated) START condition tHD:STA 0.6 µs 212
Low period of SCL clock tLOW 1.3 µs 212
High period of SCL clock tHIGH 0.6 µs 212
Data setup time tSU:DAT 100 ns 212
Bus free time between STOP and START condition tBUF 1.3 µs 212

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin , H: NiPdAu lead finish, U: matte tin 283

CAD (KiCad official)

  • Symbol: ATTINY88-MUR
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: attiny88-mur-etched.step / attiny88-mur-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); attiny88-mur.step / attiny88-mur.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (302 pp, sha256 c4c6c01b2bda5d04, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF