component
ATTINY817-MN
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 9h ago |
| viewers | 9h ago |
| attiny817-mn-etched.glb | 9h ago |
| attiny817-mn-etched.step | 9h ago |
| attiny817-mn-hero.glb | 9h ago |
| attiny817-mn-hero.overlay.json | 9h ago |
| attiny817-mn.glb | 9h ago |
| attiny817-mn.kicad_mod | 9h ago |
| attiny817-mn.kicad_sym | 9h ago |
| attiny817-mn.lbr | 9h ago |
| attiny817-mn.step | 9h ago |
| package.json | 9h ago |
| page.json | 9h ago |
| README.md | 9h ago |
ATTINY817-MN
Microchip Tech · Pre-ordered MCUs · QFN-24-EP(4x4)
ATTINY817-MN from Microchip Tech, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA2 | bidirectional | PORTA pin 2 general-purpose I/O with EVOUT0, AIN2, LUT0-IN2 and alternate RxD/MISO/SCL functions. |
| 2 | PA3 | bidirectional | PORTA pin 3 general-purpose I/O with EXTCLK external clock input, AIN3, WO3 and alternate XCK/SCK functions. |
| 3 | GND | power_in | Ground. |
| 4 | VDD | power_in | Power supply, operating range 1.8 V to 5.5 V. |
| 5 | PA4 | bidirectional | PORTA pin 4 general-purpose I/O with AIN4, PTC X0/Y0, SS, WO4, WOA, LUT0-OUT and alternate XDIR. |
| 6 | PA5 | bidirectional | PORTA pin 5 general-purpose I/O with AIN5, PTC X1/Y1, OUT, WO5, WO and WOB. |
| 7 | PA6 | bidirectional | PORTA pin 6 general-purpose I/O with AIN6, PTC X2/Y2, AINN0 and OUT (DAC0 OUT is on PA6). |
| 8 | PA7 | bidirectional | PORTA pin 7 general-purpose I/O with AIN7, PTC X3/Y3, AINP0 and LUT1-OUT. |
| 9 | PB7 | bidirectional | PORTB pin 7 general-purpose I/O with no other function listed in the multiplexing table. |
| 10 | PB6 | bidirectional | PORTB pin 6 general-purpose I/O with no other function listed in the multiplexing table. |
| 11 | PB5 | bidirectional | PORTB pin 5 general-purpose I/O with CLKOUT, AIN8, AINP1 and alternate WO2. |
| 12 | PB4 | bidirectional | PORTB pin 4 general-purpose I/O with AIN9, AINN1 and alternate WO1/LUT0-OUT. |
| 13 | PB3 | bidirectional | PORTB pin 3 general-purpose I/O with TOSC1 crystal oscillator pin, RxD and alternate WO0. |
| 14 | PB2 | bidirectional | PORTB pin 2 general-purpose I/O with TOSC2 crystal oscillator pin, EVOUT1, TxD and WO2. |
| 15 | PB1 | bidirectional | PORTB pin 1 general-purpose I/O with AIN10, PTC X4/Y4, XCK, SDA and WO1. |
| 16 | PB0 | bidirectional | PORTB pin 0 general-purpose I/O with AIN11, PTC X5/Y5, XDIR, SCL and WO0. |
| 17 | PC0 | bidirectional | PORTC pin 0 general-purpose I/O with WOC and alternate SCK/WO. |
| 18 | PC1 | bidirectional | PORTC pin 1 general-purpose I/O with WOD and alternate MISO/LUT1-OUT. |
| 19 | PC2 | bidirectional | PORTC pin 2 general-purpose I/O with EVOUT2 and alternate MOSI. |
| 20 | PC3 | bidirectional | PORTC pin 3 general-purpose I/O with LUT1-IN0 and alternate SS/WO3. |
| 21 | PC4 | bidirectional | PORTC pin 4 general-purpose I/O with LUT1-IN1 and alternate WO4. |
| 22 | PC5 | bidirectional | PORTC pin 5 general-purpose I/O with LUT1-IN2 and alternate WO5. |
| 23 | PA0 | bidirectional | PORTA pin 0, configurable by fuse as RESET, UPDI programming/debug or GPIO, with AIN0 and LUT0-IN0. |
| 24 | PA1 | bidirectional | PORTA pin 1 general-purpose I/O with AIN1, LUT0-IN1 and alternate TxD/MOSI/SDA. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-24-EP(4x4) |
| Category | Embedded Processors & Controllers |
| Pins | 25 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 1.8 | 5.5 | V | ATtiny817-MN ordering table: Supply Voltage 1.8V-5.5V | 560 | |
| Operating Temperature Range | -40 | 105 | °C | ATtiny817-MN ordering table: Temperature Range -40°C to +105°C | 560 | ||
| Max. CPU Speed | 20 | MHz | ATtiny817-MN ordering table: Max. CPU Speed 20 MHz | 560 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the Self Capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. | 461 |
CAD (KiCad official)
- Symbol:
ATTINY817-MN - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
attiny817-mn-etched.step/attiny817-mn-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);attiny817-mn.step/attiny817-mn.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (596 pp, sha256
c2392fe1c4c9666a, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).