main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 5d ago
viewers attiny817-mf: viewers · Ray 5d ago
attiny817-mf-etched.glb Publish 0.1.0 · Ray 5d ago
attiny817-mf-etched.step attiny817-mf: factory component page (tier=mfr) · Ray 5d ago
attiny817-mf-hero.glb attiny817-mf: hero GLB from the etched model (keeps the MPN mark) · Ray 5d ago
attiny817-mf-hero.overlay.json Publish 0.1.0 · Ray 5d ago
attiny817-mf.glb Publish 0.1.0 · Ray 5d ago
attiny817-mf.kicad_mod Publish 0.1.0 · Ray 5d ago
attiny817-mf.kicad_sym Publish 0.1.0 · Ray 5d ago
attiny817-mf.lbr Publish 0.1.0 · Ray 5d ago
attiny817-mf.step Publish 0.1.0 · Ray 5d ago
package.json Publish 0.1.0 · Ray 5d ago
page.json Set visibility: public · Ray 5d ago
README.md Publish 0.1.0 · Ray 5d ago
verification.json Verified: Published by the parts factory: tier mfr, 25 pins · Ray 5d ago

ATTINY817-MF

Microchip Tech · Pre-ordered MCUs · QFN-24-EP(4x4)

ATTINY817-MF from Microchip Tech, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA2 bidirectional PORTA pin 2 general-purpose I/O with full asynchronous detection, multiplexed with EVOUT0, AIN2, RxD, MISO and SCL (RxD/MISO/SCL alternate positions via PORTMUX).
2 PA3 bidirectional PORTA pin 3 general-purpose I/O, multiplexed with EXTCLK external clock input, AIN3, XCK (alternate position), SCK and TCA0 WO3.
3 GND power_in Ground.
4 VDD power_in Power supply; operating range 1.8 V to 5.5 V (2.7 V to 5.5 V for the -MF extended temperature variant).
5 PA4 bidirectional PORTA pin 4 general-purpose I/O, multiplexed with AIN4, PTC X0/Y0, XDIR (alternate position), SS, WO4, TCD0 WOA and LUT0-OUT.
6 PA5 bidirectional PORTA pin 5 general-purpose I/O, multiplexed with AIN5, PTC X1/Y1, OUT, WO5 and TCD0 WOB.
7 PA6 bidirectional PORTA pin 6 general-purpose I/O with full asynchronous detection, multiplexed with AIN6, PTC X2/Y2, AC0 AINN0 and DAC0 OUT analog output.
8 PA7 bidirectional PORTA pin 7 general-purpose I/O, multiplexed with AIN7, PTC X3/Y3, AC0 AINP0 and LUT1-OUT.
9 PB7 bidirectional PORTB pin 7 general-purpose digital I/O; the multiplexing table lists no other function for this pin.
10 PB6 bidirectional PORTB pin 6 general-purpose digital I/O with full asynchronous detection; the multiplexing table lists no other function for this pin.
11 PB5 bidirectional PORTB pin 5 general-purpose I/O, multiplexed with CLKOUT, AIN8, AC0 AINP1 and WO2 (alternate position).
12 PB4 bidirectional PORTB pin 4 general-purpose I/O, multiplexed with AIN9, AC0 AINN1, WO1 (alternate position) and LUT0-OUT (alternate position).
13 PB3 bidirectional PORTB pin 3 general-purpose I/O, multiplexed with TOSC1 external crystal pin, RxD and WO0 (alternate position).
14 PB2 bidirectional PORTB pin 2 general-purpose I/O with full asynchronous detection, multiplexed with TOSC2 external crystal pin, EVOUT1, TxD and WO2.
15 PB1 bidirectional PORTB pin 1 general-purpose I/O, multiplexed with AIN10, PTC X4/Y4, XCK, SDA and WO1.
16 PB0 bidirectional PORTB pin 0 general-purpose I/O, multiplexed with AIN11, PTC X5/Y5, XDIR, SCL and WO0.
17 PC0 bidirectional PORTC pin 0 general-purpose I/O, multiplexed with SCK (alternate position), WO (alternate position) and TCD0 WOC.
18 PC1 bidirectional PORTC pin 1 general-purpose I/O, multiplexed with MISO (alternate position), TCD0 WOD and LUT1-OUT (alternate position).
19 PC2 bidirectional PORTC pin 2 general-purpose I/O with full asynchronous detection, multiplexed with EVOUT2 and MOSI (alternate position).
20 PC3 bidirectional PORTC pin 3 general-purpose I/O, multiplexed with SS (alternate position), WO3 (alternate position) and LUT1-IN0.
21 PC4 bidirectional PORTC pin 4 general-purpose I/O, multiplexed with WO4 (alternate position) and LUT1-IN1.
22 PC5 bidirectional PORTC pin 5 general-purpose I/O, multiplexed with WO5 (alternate position) and LUT1-IN2.
23 PA0 bidirectional PORTA pin 0 configured by the RSTPINCFG fuse as GPIO, RESET or UPDI programming/debug pin; also AIN0 and LUT0-IN0.
24 PA1 bidirectional PORTA pin 1 general-purpose I/O, multiplexed with AIN1, TxD, MOSI and SDA (TxD/MOSI/SDA alternate positions) and LUT0-IN1.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-24-EP(4x4)
Category Embedded Processors & Controllers
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD 2.7 5.5 V ATtiny817-MF ordering code 560
Maximum CPU speed 16 MHz ATtiny817-MF ordering code 560
Operating temperature range -40 125 °C ATtiny817-MF ordering code (F = -40°C to +125°C) 560

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the Self Capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. 461

CAD (KiCad official)

  • Symbol: ATTINY817-MF
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: attiny817-mf-etched.step / attiny817-mf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); attiny817-mf.step / attiny817-mf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (596 pp, sha256 c2392fe1c4c9666a, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF