component
ATTINY48-AUR
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| attiny48-aur-etched.step | 11h ago |
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ATTINY48-AUR
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-32(7x7)
ATTINY48-AUR from Microchip Tech, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PD3 | bidirectional | Port D bidirectional I/O with selectable internal pull-up resistors; PD[3:0] output buffers have high sink capability. |
| 2 | PD4 | bidirectional | Port D bidirectional I/O with selectable internal pull-up resistors; PD[3:0] output buffers have high sink capability. |
| 3 | PA2 | bidirectional | Port A bidirectional I/O with selectable internal pull-up resistors, tri-stated on reset; Port A is available only in 32-lead TQFP, 32-pad QFN and 32-ball UFBGA packages. |
| 4 | VCC | power_in | Digital supply voltage. |
| 5 | GND | power_in | Ground. |
| 6 | PA3 | bidirectional | Port A bidirectional I/O with selectable internal pull-up resistors, tri-stated on reset; Port A is available only in 32-lead TQFP, 32-pad QFN and 32-ball UFBGA packages. |
| 7 | PB6 | bidirectional | Port B bidirectional I/O with selectable internal pull-up resistors; depending on clock selection fuse settings, PB6 can be used as input to the internal clock operating circuit. |
| 8 | PB7 | bidirectional | Port B bidirectional I/O with selectable internal pull-up resistors, tri-stated on reset. |
| 9 | PD5 | bidirectional | Port D bidirectional I/O with symmetrical sink and source drive characteristics and selectable internal pull-up resistors. |
| 10 | PD6 | bidirectional | Port D bidirectional I/O with symmetrical sink and source drive characteristics and selectable internal pull-up resistors. |
| 11 | PD7 | bidirectional | Port D bidirectional I/O with symmetrical sink and source drive characteristics and selectable internal pull-up resistors. |
| 12 | PB0 | bidirectional | Port B bidirectional I/O with selectable internal pull-up resistors, tri-stated on reset. |
| 13 | PB1 | bidirectional | Port B bidirectional I/O with selectable internal pull-up resistors, tri-stated on reset. |
| 14 | PB2 | bidirectional | Port B bidirectional I/O with selectable internal pull-up resistors, tri-stated on reset. |
| 15 | PB3 | bidirectional | Port B bidirectional I/O with selectable internal pull-up resistors, tri-stated on reset. |
| 16 | PB4 | bidirectional | Port B bidirectional I/O with selectable internal pull-up resistors, tri-stated on reset. |
| 17 | PB5 (SCK/PCINT5) | bidirectional | Port B bidirectional I/O with selectable internal pull-up resistors, tri-stated on reset. |
| 18 | AVCC | power_in | Supply voltage pin for the A/D converter and selected I/O pins; it should be connected to VCC even if the ADC is not used. |
| 19 | PA0 (ADC6/PCINT24) | bidirectional | Port A bidirectional I/O with selectable internal pull-up resistors, tri-stated on reset; PA[1:0] take supply from AVCC in 32-lead packages. |
| 20 | PC7 (PCINT15) | bidirectional | Port C bidirectional I/O with selectable internal pull-up resistors; PC7 receives its supply voltage from AVCC. |
| 21 | GND | power_in | Ground. |
| 22 | PA1 (ADC7/PCINT25) | bidirectional | Port A bidirectional I/O with selectable internal pull-up resistors, tri-stated on reset; PA[1:0] take supply from AVCC in 32-lead packages. |
| 23 | PC0 (ADC0/PCINT8) | bidirectional | Port C bidirectional I/O with selectable internal pull-up resistors; PC[5:0] receive their supply voltage from AVCC. |
| 24 | PC1 (ADC1/PCINT9) | bidirectional | Port C bidirectional I/O with selectable internal pull-up resistors; PC[5:0] receive their supply voltage from AVCC. |
| 25 | PC2 (ADC2/PCINT10) | bidirectional | Port C bidirectional I/O with selectable internal pull-up resistors; PC[5:0] receive their supply voltage from AVCC. |
| 26 | PC3 (ADC3/PCINT11) | bidirectional | Port C bidirectional I/O with selectable internal pull-up resistors; PC[5:0] receive their supply voltage from AVCC. |
| 27 | PC4 (ADC4/SDA/PCINT12) | bidirectional | Port C bidirectional I/O with selectable internal pull-up resistors; PC[5:0] receive their supply voltage from AVCC. |
| 28 | PC5 (ADC5/SCL/PCINT13) | bidirectional | Port C bidirectional I/O with selectable internal pull-up resistors; PC[5:0] receive their supply voltage from AVCC. |
| 29 | PC6 (RESET/PCINT14) | bidirectional | Acts as reset input when the RSTDISBL fuse is unprogrammed (a low level longer than the minimum pulse width generates a reset); otherwise an I/O pin whose electrical characteristics differ from other Port C pins. |
| 30 | PD0 (PCINT16) | bidirectional | Port D bidirectional I/O with selectable internal pull-up resistors; PD[3:0] output buffers have high sink capability. |
| 31 | PD1 (PCINT17) | bidirectional | Port D bidirectional I/O with selectable internal pull-up resistors; PD[3:0] output buffers have high sink capability. |
| 32 | PD2 (INT0/PCINT18) | bidirectional | Port D bidirectional I/O with selectable internal pull-up resistors; PD[3:0] output buffers have high sink capability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-32(7x7) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 32 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage | 1.8 | 5.5 | V | 1 | |||
| Temperature Range | -40 | 85 | °C | Industrial | 1 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | , H: NiPdAu lead finish, U: matte tin | 14 |
CAD (KiCad official)
- Symbol:
ATTINY48-AUR - Footprint:
Package_QFP:TQFP-32_7x7mm_P0.8mm - 3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
attiny48-aur-etched.step/attiny48-aur-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);attiny48-aur.step/attiny48-aur.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (26 pp, sha256
f9a76eef5f5dcba0, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).