component
ATTINY44A-PU
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "attiny44a-pu",
"version": "0.1.0",
"type": "component",
"description": "Microchip Tech Pre-ordered MCUs, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"embedded processors & controllers",
"attiny44a-pu",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"attiny44a-pu.kicad_sym",
"attiny44a-pu.kicad_mod",
"attiny44a-pu.glb",
"attiny44a-pu.step",
"attiny44a-pu.lbr",
"docs/hero.png",
"docs/attiny44a-pu-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"attiny44a-pu-hero.glb",
"attiny44a-pu-hero.overlay.json",
"attiny44a-pu-etched.glb"
],
"component": {
"mpn": "ATTINY44A-PU",
"manufacturer": "Microchip Tech",
"package": "PDIP-14",
"pin_count": 14,
"category": "Embedded Processors & Controllers",
"subcategory": "Pre-ordered MCUs",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/54a776840bae4b1fa0826c55bd1ce0cc.pdf",
"parts": {
"symbol": "attiny44a-pu.kicad_sym",
"footprint": "attiny44a-pu.kicad_mod",
"model_3d": "attiny44a-pu-hero.glb",
"model_3d_plain": "attiny44a-pu-etched.glb",
"model_3d_step": "attiny44a-pu-etched.step",
"model_3d_step_plain": "attiny44a-pu.step",
"lbr": "attiny44a-pu.lbr"
},
"distributor_links": {
"lcsc": "C1337333",
"digikey": "ATTINY44A-PU-ND",
"mouser": "556-ATTINY44A-PU"
},
"distributor_check": {
"checked_at": "2026-10-29T00:23:17Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "ATTINY44A-PU-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "556-ATTINY44A-PU",
"status": "found",
"lifecycle": "Not Recommended for New Designs"
}
},
"pins": [
{
"number": "1",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage pin for the device, rated 1.8 to 5.5 V across the speed grades (0 to 4 MHz at 1.8 to 5.5 V, 0 to 10 MHz at 2.7 to 5.5 V, 0 to 20 MHz at 4.5 to 5.5 V)."
},
{
"number": "2",
"name": "PB0",
"type": "bidirectional",
"description": "Port B bit 0 with per-bit selectable internal pull-up and symmetrical high sink/source drive, tri-stated during reset; alternate functions are XTAL1/CLKI and PCINT8."
},
{
"number": "3",
"name": "PB1",
"type": "bidirectional",
"description": "Port B bit 1 with per-bit selectable internal pull-up and symmetrical high sink/source drive, tri-stated during reset; alternate functions are XTAL2 and PCINT9."
},
{
"number": "4",
"name": "PB3",
"type": "bidirectional",
"description": "Port B bit 3 that acts as the active-low RESET input (minimum pulse length per Table 20-4) unless the RSTDISBL fuse is programmed to '0', in which case it is a normal I/O pin; alternate functions are PCINT11 and debugWIRE (dW)."
},
{
"number": "5",
"name": "PB2",
"type": "bidirectional",
"description": "Port B bit 2 with per-bit selectable internal pull-up and symmetrical high sink/source drive, tri-stated during reset; alternate functions are INT0, OC0A, CKOUT and PCINT10."
},
{
"number": "6",
"name": "PA7",
"type": "bidirectional",
"description": "Port A bit 7 with per-bit selectable internal pull-up and symmetrical high sink/source drive, tri-stated during reset; alternate functions are ICP, OC0B, ADC7 and PCINT7."
},
{
"number": "7",
"name": "PA6",
"type": "bidirectional",
"description": "Port A bit 6 with per-bit selectable internal pull-up and symmetrical high sink/source drive, tri-stated during reset; alternate functions are OC1A, SDA, MOSI, DI, ADC6 and PCINT6."
},
{
"number": "8",
"name": "PA5",
"type": "bidirectional",
"description": "Port A bit 5 with per-bit selectable internal pull-up and symmetrical high sink/source drive, tri-stated during reset; alternate functions are ADC5, DO, MISO, OC1B and PCINT5."
},
{
"number": "9",
"name": "PA4",
"type": "bidirectional",
"description": "Port A bit 4 with per-bit selectable internal pull-up and symmetrical high sink/source drive, tri-stated during reset; alternate functions are ADC4, USCK, SCL, T1 and PCINT4."
},
{
"number": "10",
"name": "PA3",
"type": "bidirectional",
"description": "Port A bit 3 with per-bit selectable internal pull-up and symmetrical high sink/source drive, tri-stated during reset; alternate functions are ADC3, T0 and PCINT3."
},
{
"number": "11",
"name": "PA2",
"type": "bidirectional",
"description": "Port A bit 2 with per-bit selectable internal pull-up and symmetrical high sink/source drive, tri-stated during reset; alternate functions are ADC2, AIN1 and PCINT2."
},
{
"number": "12",
"name": "PA1",
"type": "bidirectional",
"description": "Port A bit 1 with per-bit selectable internal pull-up and symmetrical high sink/source drive, tri-stated during reset; alternate functions are ADC1, AIN0 and PCINT1."
},
{
"number": "13",
"name": "PA0",
"type": "bidirectional",
"description": "Port A bit 0 with per-bit selectable internal pull-up and symmetrical high sink/source drive, tri-stated during reset; alternate functions are ADC0, AREF and PCINT0."
},
{
"number": "14",
"name": "GND",
"type": "power_in",
"description": "Ground reference pin for the device."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The PDIP/SOIC pinout in Figure 1-1 is garbled in the text extraction. Pin-to-name assignments were i; Pin types are KiCad-class assignments made by me, not stated in the datasheet. Port pins are typed b; The Port A and Port B pin descriptions are paraphrased from Section 1.1 (page 3). Alternate function"
],
"pages_sent": 22,
"cost_usd": 0.1161,
"at": "2026-10-29T00:23:06"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/54a776840bae4b1fa0826c55bd1ce0cc.pdf",
"pages": 22,
"sha256": "885cfa70a446881c",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 14,
"described": 14,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
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"footprint": "viewers/footprint.html"
},
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"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "body on z = 0, through-hole leads below",
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7.874,
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"zmin_mm": -3.3,
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"footprint_binding": "identity",
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"checked": "2026-10-29",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
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"sha256": "06fb2fb44c3b3310d5d2c63749369e73c4fe4b72b97b5ce5f6a6c7e4528a5418",
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}
}