component
ATTINY406-MNR
Public Made by Adomby adom
Microchip Tech MICROCHIP, QFN-20-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownATTINY406-MNR
Microchip Tech · MICROCHIP · QFN-20-EP(3x3)
ATTINY406-MNR from Microchip Tech, in a QFN-20-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA2 | bidirectional | PORTA pin 2 GPIO with EVOUT0, ADC AIN2, USART RxD (alternate), SPI MISO and CCL LUT0-IN2 functions. |
| 2 | PA3/EXTCLK | bidirectional | PORTA pin 3 GPIO that also serves as external clock input EXTCLK, with ADC AIN3, USART XCK (alternate), SPI SCK and TCA0 WO3 functions. |
| 3 | GND | power_in | Ground. |
| 4 | VDD | power_in | Input supply, operating range 2.7 V to 5.5 V. |
| 5 | PA4 | bidirectional | PORTA pin 4 GPIO with ADC AIN4, USART XDIR (alternate), SPI SS, TCA0 WO4 and CCL LUT0-OUT functions. |
| 6 | PA5 | bidirectional | PORTA pin 5 GPIO with ADC AIN5, analog comparator OUT, TCA0 WO5 and TCB0 WO functions. |
| 7 | PA6 | bidirectional | PORTA pin 6 GPIO with ADC AIN6 and analog comparator negative input AINN0. |
| 8 | PA7 | bidirectional | PORTA pin 7 GPIO with ADC AIN7, analog comparator positive input AINP0 and CCL LUT1-OUT functions. |
| 9 | PB5 | bidirectional | PORTB pin 5 GPIO with CLKOUT, ADC AIN8, comparator AINP1 and alternate TCA0 WO2 functions. |
| 10 | PB4 | bidirectional | PORTB pin 4 GPIO with ADC AIN9, comparator AINN1, alternate TCA0 WO1 and alternate CCL LUT0-OUT functions. |
| 11 | PB3 | bidirectional | PORTB pin 3 GPIO with USART RxD and alternate TCA0 WO0 functions. |
| 12 | PB2 | bidirectional | PORTB pin 2 GPIO with EVOUT1, USART TxD and TCA0 WO2 functions. |
| 13 | PB1 | bidirectional | PORTB pin 1 GPIO with ADC AIN10, USART XCK, TWI SDA and TCA0 WO1 functions. |
| 14 | PB0 | bidirectional | PORTB pin 0 GPIO with ADC AIN11, USART XDIR, TWI SCL and TCA0 WO0 functions. |
| 15 | PC0 | bidirectional | PORTC pin 0 GPIO with alternate SPI SCK and alternate TCB0 WO functions. |
| 16 | PC1 | bidirectional | PORTC pin 1 GPIO with alternate SPI MISO and alternate CCL LUT1-OUT functions. |
| 17 | PC2 | bidirectional | PORTC pin 2 GPIO with EVOUT2 and alternate SPI MOSI functions. |
| 18 | PC3 | bidirectional | PORTC pin 3 GPIO with alternate SPI SS, alternate TCA0 WO3 and CCL LUT1-IN0 functions. |
| 19 | PA0/RESET/UPDI | bidirectional | PORTA pin 0 GPIO that is configured by RSTPINCFG fuse as GPIO, UPDI programming/debug or RESET, also ADC AIN0 and CCL LUT0-IN0; 12 V pulse enables UPDI. |
| 20 | PA1 | bidirectional | PORTA pin 1 GPIO with ADC AIN1, USART TxD (alternate), SPI MOSI and CCL LUT0-IN1 functions. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-20-EP(3x3) |
| Category | Embedded Processors & Controllers |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
ATTINY406-MNR - Footprint:
Package_DFN_QFN:UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm - 3D model: QFN-20-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
attiny406-mnr-etched.step/attiny406-mnr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);attiny406-mnr.step/attiny406-mnr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (523 pp, sha256
de549517d587eb2e, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).