component

ATTINY402-SSNR

Public Made by Adom

by adom

Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrollerattiny402-ssnrfactory-2.0.0extractor-text

Verified ATTINY402-SSNR

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATTINY402-SSNR · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 523-page datasheet
  • ✓distributor: lcsc C616056, digikey ATTINY402-SSNRTR-ND, mouser 579-ATTINY402-SSNR
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-bk92ie0q/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.494)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ attiny402-ssnr.kicad_sym✓ attiny402-ssnr.kicad_mod✓ attiny402-ssnr.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers attiny402-ssnr: viewers · Ray
attiny402-ssnr-etched.glb Publish 0.1.0 · Ray
attiny402-ssnr-etched.step attiny402-ssnr: factory component page (tier=mfr) · Ray
attiny402-ssnr-hero.glb attiny402-ssnr: hero GLB from the etched model (keeps the MPN mark) · Ray
attiny402-ssnr-hero.overlay.json Publish 0.1.0 · Ray
attiny402-ssnr.glb Publish 0.1.0 · Ray
attiny402-ssnr.kicad_mod Publish 0.1.0 · Ray
attiny402-ssnr.kicad_sym Publish 0.1.0 · Ray
attiny402-ssnr.lbr Publish 0.1.0 · Ray
attiny402-ssnr.step Publish 0.1.0 · Ray
package.json Publish 0.1.1 · Ray
page.json Publish 0.1.1 · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray

ATTINY402-SSNR

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-8

ATTINY402-SSNR from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Input supply pin; the datasheet gives the operating supply range as 2.7 V to 5.5 V (with the speed grade limited to 16 MHz only at 4.5 V to 5.5 V).
2 PA6 bidirectional PORTA bit 6 general-purpose I/O, also analog input AIN6 and negative comparator input AINN0, with alternate-function USART TxD, SPI MOSI (alternate position), TCA WO0, and CCL LUT0-OUT; it can be used for external interrupt and as an event input.
3 PA7 bidirectional PORTA bit 7 general-purpose I/O, also analog input AIN7 and positive comparator input AINP0, with alternate-function USART RxD, SPI MISO (alternate position), TCA WO0 (alternate position), and CCL LUT1-OUT; it can be used for external interrupt and as an event input.
4 PA1 bidirectional PORTA bit 1 general-purpose I/O, also analog input AIN1, USART TxD (alternate position), SPI MOSI, TWI SDA, TCA WO1, and CCL LUT0-IN1; it can be used for external interrupt and as an event input.
5 PA2 bidirectional PORTA bit 2 general-purpose I/O, also event output EVOUT0, analog input AIN2, USART RxD (alternate position), SPI MISO, TWI SCL, TCA WO2, and CCL LUT0-IN2; it provides full asynchronous pin-change detection.
6 PA0/RESET/UPDI bidirectional PORTA bit 0 shared with the Reset/UPDI pin, which is selected by the RSTPINCFG fuse (GPIO, UPDI or RESET); it also provides analog input AIN0, SPI SS, TCA WO0 XDIR function as listed, and CCL LUT0-IN0, and the UPDI uses this pin for single-wire programming and debug.
7 PA3/EXTCLK bidirectional PORTA bit 3 general-purpose I/O, also external clock input EXTCLK, analog input AIN3, USART XCK, SPI SCK, TCA WO0/WO3, and clock output OUT as listed in the multiplexing table; it can be used for external interrupt and as an event input.
8 GND power_in Ground reference pin for the device.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Single Chip Microcomputer/Microcontroller
Pins 8

CAD (KiCad official)

  • Symbol: ATTINY402-SSNR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: attiny402-ssnr-etched.step / attiny402-ssnr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); attiny402-ssnr.step / attiny402-ssnr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (523 pp, sha256 de549517d587eb2e, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF