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ATTINY3217-MFR
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Microchip Tech Microcontrollers (MCU/MPU/SOC), WQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownATTINY3217-MFR
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · WQFN-24-EP(4x4)
ATTINY3217-MFR from Microchip Tech, in a WQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA2 | bidirectional | PORTA bit 2 general-purpose I/O, also usable as EVOUT0, AIN2, USART0 RxD, SPI0 MISO, TWI0 SCL and LUT0-IN2; PA2 has full asynchronous pin-change detection. |
| 2 | PA3 | bidirectional | PORTA bit 3 general-purpose I/O, also usable as the EXTCLK external clock input, AIN3, USART0 XCK, SPI0 SCK, TCA0 WO3 and TCB1. |
| 3 | GND | power_in | Ground reference for the device; the exposed pad should also be soldered to ground. |
| 4 | VDD | power_in | Input supply voltage, operating range 2.7 V to 5.5 V. |
| 5 | PA4 | bidirectional | PORTA bit 4 general-purpose I/O, also usable as AIN4, ADC1 AIN0, PTC X0/Y0, USART0 XDIR, SPI0 SS, TCA0 WO4, TCD0 WOA and LUT0-OUT. |
| 6 | PA5 | bidirectional | PORTA bit 5 general-purpose I/O, also usable as the VREFA external voltage reference input, AIN5, ADC1 AIN1, PTC X1/Y1, AC0 AINN0, TCA0 WO5, TCB0 and CCL WOB. |
| 7 | PA6 | bidirectional | PORTA bit 6 general-purpose I/O, also usable as AIN6, DAC0 OUT (analog output) and LUT1-OUT on the analog-capable pin set. |
| 8 | PA7 | bidirectional | PORTA bit 7 general-purpose I/O, also usable as AIN7, ADC1 AIN3, PTC X3/Y3 and LUT1-OUT. |
| 9 | PB7 | bidirectional | PORTB bit 7 general-purpose I/O, also usable as analog input AIN4 and AC inputs AINN1 and AINP3 (VQFN-only pin). |
| 10 | PB6 | bidirectional | PORTB bit 6 general-purpose I/O, also usable as analog input AIN5 and AC inputs AINP3 and AINN1 (VQFN-only pin). |
| 11 | PB5 | bidirectional | PORTB bit 5 general-purpose I/O, also usable as CLKOUT, AIN8, PTC X12/Y12, AC inputs AINP1 and AINP2, and TCA0 WO2. |
| 12 | PB4 | bidirectional | PORTB bit 4 general-purpose I/O, also usable as AIN9, PTC X13/Y13, AINN1, AINP3, TCA0 WO1 and LUT0-OUT. |
| 13 | PB3 | bidirectional | PORTB bit 3 general-purpose I/O, also usable as TOSC1, the crystal oscillator input for the 32.768 kHz oscillator, plus OUT, USART0 RxD and TCA0 WO0. |
| 14 | PB2 | bidirectional | PORTB bit 2 general-purpose I/O, also usable as TOSC2, the crystal oscillator output for the 32.768 kHz oscillator, plus EVOUT1, OUT, USART0 TxD and TCA0 WO2. |
| 15 | PB1 | bidirectional | PORTB bit 1 general-purpose I/O, also usable as AIN10, PTC X4/Y4, AC input AINP2, USART0 XCK, TWI0 SDA and TCA0 WO1. |
| 16 | PB0 | bidirectional | PORTB bit 0 general-purpose I/O, also usable as AIN11, PTC X5/Y5, AC inputs AINP2 and AINP1, USART0 XDIR, TWI0 SCL and TCA0 WO0. |
| 17 | PC0 | bidirectional | PORTC bit 0 general-purpose I/O, also usable as ADC0 AIN6, PTC X6/Y6, SPI0 SCK, TCB0 and TCA0 WOC. |
| 18 | PC1 | bidirectional | PORTC bit 1 general-purpose I/O, also usable as ADC0 AIN7, PTC X7/Y7, SPI0 MISO, TCA0 WOD and LUT1-OUT. |
| 19 | PC2 | bidirectional | PORTC bit 2 general-purpose I/O, also usable as EVOUT2, ADC0 AIN8, PTC X8/Y8 and SPI0 MOSI. |
| 20 | PC3 | bidirectional | PORTC bit 3 general-purpose I/O, also usable as ADC0 AIN9, PTC X9/Y9, SPI0 SS, TCA0 WO3 and LUT1-IN0. |
| 21 | PC4 | bidirectional | PORTC bit 4 general-purpose I/O, also usable as ADC0 AIN10, PTC X10/Y10, TCA0 WO4, TCB1 and LUT1-IN1. |
| 22 | PC5 | bidirectional | PORTC bit 5 general-purpose I/O, also usable as ADC0 AIN11, PTC X11/Y11, TCA0 WO5 and LUT1-IN2. |
| 23 | PA0/RESET/UPDI | bidirectional | Multiplexed pin: RESET or the one-wire UPDI programming/debug interface, selected by the RSTPINCFG fuse (GPIO, UPDI or RESET), otherwise PORTA bit 0 with ADC0 AIN0 and LUT0-IN0. |
| 24 | PA1 | bidirectional | PORTA bit 1 general-purpose I/O, also usable as AIN1, USART0 TxD, SPI0 MOSI, TWI0 SDA and LUT0-IN1. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | WQFN-24-EP(4x4) |
| Category | Embedded Processors & Controllers |
| Pins | 25 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (ATtiny3217 VQFN ordering row) | VDD | 2.7 | 5.5 | V | 558 | ||
| Max CPU speed (ATtiny3217 VQFN ordering row) | fCPU | 16 | MHz | 558 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the Self Capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. | 458 |
CAD (KiCad official)
- Symbol:
ATTINY3217-MFR - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm - 3D model: WQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
attiny3217-mfr-etched.step/attiny3217-mfr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);attiny3217-mfr.step/attiny3217-mfr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (572 pp, sha256
97cb689010a2d3b4, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).