ATTINY202-SSNR

{
  "schema_version": 1,
  "type": "component",
  "slug": "attiny202-ssnr",
  "title": "ATTINY202-SSNR",
  "brief": "Microchip Tech Microcontrollers (MCU/MPU/SOC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "embedded processors & controllers",
    "attiny202-ssnr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "ATTINY202-SSNR",
    "manufacturer": "Microchip Tech",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589925599767519232",
    "parts": {
      "symbol": "attiny202-ssnr.kicad_sym",
      "footprint": "attiny202-ssnr.kicad_mod",
      "model_3d": "attiny202-ssnr-hero.glb",
      "model_3d_plain": "attiny202-ssnr.glb",
      "model_3d_step": "attiny202-ssnr-etched.step",
      "model_3d_step_plain": "attiny202-ssnr.step",
      "lbr": "attiny202-ssnr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2052951",
      "digikey": "ATTINY202-SSNRTR-ND",
      "mouser": "579-ATTINY202-SSNR"
    },
    "distributor_check": {
      "checked_at": "2026-10-09T14:04:31Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "ATTINY202-SSNRTR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "579-ATTINY202-SSNR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply voltage pin; the device operates from 1.8 V to 5.5 V (VDD operating supply voltage, Table 31-2)."
      },
      {
        "number": "2",
        "name": "PA6",
        "type": "bidirectional",
        "description": "GPIO port A pin 6 with analog input AIN6 and AINN0, also carrying USART0 TxD, SPI0 MOSI (alternate position) and TCA0 WO0, and LUT0-OUT; alternate pin positions are selected through PORTMUX."
      },
      {
        "number": "3",
        "name": "PA7",
        "type": "bidirectional",
        "description": "GPIO port A pin 7 with analog input AIN7 and AINP0, also carrying USART0 RxD, SPI0 MISO (alternate position), TCA0 WO0 (alternate position) and LUT1-OUT; alternate pin positions are selected through PORTMUX."
      },
      {
        "number": "4",
        "name": "PA1",
        "type": "bidirectional",
        "description": "GPIO port A pin 1 with analog input AIN1, also carrying USART0 TxD (alternate position), SPI0 MOSI, TWI0 SDA, TCA0 WO1 and LUT0-IN1."
      },
      {
        "number": "5",
        "name": "PA2",
        "type": "bidirectional",
        "description": "GPIO port A pin 2 with analog input AIN2 and event output EVOUT0, also carrying USART0 RxD (alternate position), SPI0 MISO, TWI0 SCL, TCA0 WO2 and LUT0-IN2; this pin has full asynchronous external interrupt detection."
      },
      {
        "number": "6",
        "name": "PA0",
        "type": "bidirectional",
        "description": "GPIO port A pin 0 that doubles as the RESET/UPDI pin; RSTPINCFG fuse selects GPIO, UPDI or RESET, and 12 V on this pin can enable UPDI programming, with analog input AIN0, USART0 XDIR, SPI0 SS and LUT0-IN0 also available."
      },
      {
        "number": "7",
        "name": "PA3",
        "type": "bidirectional",
        "description": "GPIO port A pin 3 with analog input AIN3 and external clock input EXTCLK, also carrying USART0 XCK, SPI0 SCK, TCA0 WO0/WO3 and the CCL/USART OUT signal."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for the device."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin 8 GND and pin 1 VDD are taken from the Table 5-1 pin list; the pinout diagram on page 13 shows t; Pin descriptions are functional only. The extracted pages contain no per-pin electrical limits (for ; Several pins list alternate positions (PA6, PA7, PA1, PA2) selected via PORTMUX; the default-positio"
        ],
        "pages_sent": 125,
        "cost_usd": 0.3668,
        "at": "2026-10-09T14:02:07"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589925599767519232",
        "pages": 544,
        "sha256": "e71a10c1ca3773a7",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "attiny202-ssnr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-09",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "attiny202-ssnr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "83389b63204954e023e9d80c4bafff26feefe4e5cb0ace132711b13a7c108a31",
        "checked": "2026-10-09",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Microchip Tech",
      "Package": "SOIC-8",
      "Category": "Embedded Processors & Controllers",
      "Pins": "8"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "attiny202-ssnr"
  ],
  "discovery_pitch": "ATTINY202-SSNR (Microchip Tech) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "attiny202-ssnr.kicad_sym",
    "attiny202-ssnr.kicad_mod",
    "attiny202-ssnr.glb",
    "attiny202-ssnr.step",
    "attiny202-ssnr.lbr",
    "docs/hero.png",
    "docs/attiny202-ssnr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "attiny202-ssnr-hero.glb",
    "attiny202-ssnr-hero.overlay.json"
  ],
  "visibility": {
    "public": true
  }
}