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ATTINY202-SSN

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by adom

Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 5d ago
viewers attiny202-ssn: viewers · Ray 5d ago
attiny202-ssn-etched.glb Publish 0.1.0 · Ray 5d ago
attiny202-ssn-etched.step attiny202-ssn: factory component page (tier=mfr) · Ray 5d ago
attiny202-ssn-hero.glb attiny202-ssn: hero GLB from the etched model (keeps the MPN mark) · Ray 5d ago
attiny202-ssn-hero.overlay.json Publish 0.1.0 · Ray 5d ago
attiny202-ssn.glb Publish 0.1.0 · Ray 5d ago
attiny202-ssn.kicad_mod Publish 0.1.0 · Ray 5d ago
attiny202-ssn.kicad_sym Publish 0.1.0 · Ray 5d ago
attiny202-ssn.lbr Publish 0.1.0 · Ray 5d ago
attiny202-ssn.step Publish 0.1.0 · Ray 5d ago
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README.md Publish 0.1.0 · Ray 5d ago

ATTINY202-SSN

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-8

ATTINY202-SSN from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Input supply pin; the device operates from 2.7V to 5.5V.
2 PA6 bidirectional PORTA GPIO with analog functions AIN6 (ADC0) and AINN0 (AC0), plus TxD, MOSI (alternate) and WO0 (TCB0) and LUT0-OUT.
3 PA7 bidirectional PORTA GPIO with analog functions AIN7 (ADC0) and AINP0 (AC0), plus RxD, MISO (alternate), WO0 (alternate) and LUT1-OUT.
4 PA1 bidirectional PORTA GPIO with AIN1 (ADC0), TxD (alternate), MOSI, SDA (TWI0), WO1 (TCA0) and LUT0-IN1.
5 PA2 bidirectional PORTA GPIO with EVOUT0, AIN2 (ADC0), RxD (alternate), MISO, SCL (TWI0), WO2 (TCA0) and LUT0-IN2.
6 PA0/RESET/UPDI bidirectional PORTA GPIO that can be configured via RSTPINCFG fuses as GPIO, RESET or the single-pin UPDI programming and debug interface (12V enable supported); also AIN0, XDIR, SS and LUT0-IN0.
7 PA3/EXTCLK bidirectional PORTA GPIO and external clock input (EXTCLK), with AIN3 (ADC0), OUT (AC0), XCK, SCK and WO0/WO3.
8 GND power_in Ground.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Single Chip Microcomputer/Microcontroller
Pins 8

CAD (KiCad official)

  • Symbol: ATTINY202-SSN
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: attiny202-ssn-etched.step / attiny202-ssn-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); attiny202-ssn.step / attiny202-ssn.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (523 pp, sha256 de549517d587eb2e, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF