component
ATTINY13A-SS7R
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ATTINY13A-SS7R
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-8
ATTINY13A-SS7R from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB5/RESET | bidirectional | Port B bit 5 (also RESET, ADC0, dW): a low level on RESET longer than the minimum pulse length generates a reset, shorter pulses are not ensured to reset, and the pin can also be used as a weak I/O pin. |
| 2 | PB3 | bidirectional | Port B bit 3 (also CLKI, ADC3, PCINT3) is a bi-directional I/O with internal pull-up selectable per bit and is tri-stated when reset is active. |
| 3 | PB4 | bidirectional | Port B bit 4 (also ADC2, PCINT4) is a bi-directional I/O with internal pull-up selectable per bit and is tri-stated when reset is active. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | PB0 | bidirectional | Port B bit 0 (also MOSI, AIN0, OC0A, PCINT0) is a bi-directional I/O with internal pull-up selectable per bit and is tri-stated when reset is active. |
| 6 | PB1 | bidirectional | Port B bit 1 (also MISO, AIN1, OC0B, INT0, PCINT1) is a bi-directional I/O with internal pull-up selectable per bit and is tri-stated when reset is active. |
| 7 | PB2 | bidirectional | Port B bit 2 (also SCK, ADC1, T0, PCINT2) is a bi-directional I/O with internal pull-up selectable per bit and is tri-stated when reset is active. |
| 8 | VCC | power_in | Supply voltage, specified for operation from 1.8 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature | -55 | 125 | °C | 123 | |||
| Storage Temperature | -65 | 150 | °C | 123 | |||
| Voltage on RESET with respect to Ground | -0.5 | 13 | V | 123 | |||
| Voltage on any pin except RESET with respect to Ground (max printed as VCC+0.5V) | -0.5 | V | 123 | ||||
| Maximum Operating Voltage | 6 | V | 123 | ||||
| DC Current per I/O Pin | 40 | mA | 123 | ||||
| DC Current VCC and GND Pins | 200 | mA | 123 | ||||
| Power Supply (ordering table, 20 MHz speed grade) | 1.8 | 5.5 | V | Industrial -40°C to +85°C, 20 MHz | 168 | ||
| Input Low Voltage, Any Pin as I/O (max printed as 0.2VCC) | VIL | -0.5 | V | VCC = 1.8 - 2.4V | 123 | ||
| Input Low Voltage, Any Pin as I/O (max printed as 0.3VCC) | VIL | -0.5 | V | VCC = 2.4 - 5.5V | 123 | ||
| Input Low Voltage, RESET Pin as Reset (max printed as 0.2VCC) | VIL | -0.5 | V | VCC = 1.8 - 5.5V | 123 | ||
| Output Low Voltage, Pins PB0 and PB1 | VOL | 0.8 | V | IOL = 20 mA, VCC = 5V | 123 | ||
| Output Low Voltage, Pins PB0 and PB1 | VOL | 0.6 | V | IOL = 10 mA, VCC = 3V | 123 | ||
| Output Low Voltage, Pins PB2, PB3 and PB4 | VOL | 0.8 | V | IOL = 10 mA, VCC = 5V | 123 | ||
| Output Low Voltage, Pins PB2, PB3 and PB4 | VOL | 0.6 | V | IOL = 5 mA, VCC = 3V | 123 | ||
| Output High Voltage, Pins PB0 and PB1 | VOH | 4 | V | IOH = -20 mA, VCC = 5V | 123 | ||
| Output High Voltage, Pins PB0 and PB1 | VOH | 2.3 | V | IOH = -10 mA, VCC = 3V | 123 | ||
| Output High Voltage, Pins PB2, PB3 and PB4 | VOH | 4.2 | V | IOH = -10 mA, VCC = 5V | 123 | ||
| Output High Voltage, Pins PB2, PB3 and PB4 | VOH | 2.5 | V | IOH = -5 mA, VCC = 3V | 123 | ||
| Input Leakage Current I/O Pin (low) | ILIL | -1 | 1 | µA | VCC = 5.5V, pin low | 123 | |
| Input Leakage Current I/O Pin (high) | ILIH | -1 | 1 | µA | VCC = 5.5V, pin high | 123 | |
| Pull-Up Resistor, I/O Pin | RPU | 20 | 50 | k | VCC = 5.5V, input low | 123 | |
| Pull-Up Resistor, Reset Pin | RPU | 30 | 80 | k | VCC = 5.5V, input low | 123 | |
| Supply Current, Active Mode | ICC | 0.2 | 0.35 | mA | f = 1MHz, VCC = 2V | 124 | |
| Supply Current, Active Mode | ICC | 1.2 | 1.8 | mA | f = 4MHz, VCC = 3V | 124 | |
| Supply Current, Active Mode | ICC | 3.6 | 6 | mA | f = 8MHz, VCC = 5V | 124 | |
| Supply Current, Idle Mode | ICC | 0.03 | 0.2 | mA | f = 1MHz, VCC = 2V | 124 | |
| Supply Current, Idle Mode | ICC | 0.2 | 1 | mA | f = 4MHz, VCC = 3V | 124 | |
| Supply Current, Idle Mode | ICC | 0.7 | 3 | mA | f = 8MHz, VCC = 5V | 124 | |
| Supply Current, Power-Down Mode | ICC | 3.9 | 10 | µA | WDT enabled, VCC = 3V | 124 | |
| Supply Current, Power-Down Mode | ICC | 0.15 | 2 | µA | WDT disabled, VCC = 3V | 124 | |
| Minimum pulse width on RESET Pin | tRST | 2000 | 2500 | ns | VCC = 1.8V | 126 | |
| Minimum pulse width on RESET Pin | tRST | 700 | 2500 | ns | VCC = 3V | 126 | |
| Minimum pulse width on RESET Pin | tRST | 400 | 2500 | ns | VCC = 5V | 126 | |
| Min Pulse Width on Brown-out Reset | tBOD | 2 | µs | 126 | |||
| Internal bandgap reference voltage | VBG | 1 | 1.1 | 1.2 | V | VCC = 5V, TA = 25°C | 126 |
| Internal bandgap reference start-up time (typ 40 / max 70 as printed in two-value cell) | tBG | 40 | 70 | µs | VCC = 5V, TA = 25°C | 126 | |
| Release threshold of power-on reset | VPOR | 1.1 | 1.4 | 1.6 | V | 126 | |
| Activation threshold of power-on reset | VPOA | 0.6 | 1.3 | 1.6 | V | 126 | |
| Power-On Slope Rate | SRON | 0.01 | V/ms | 126 | |||
| VBOT, BODLEVEL[1:0] = 10 | VBOT | 1.7 | 1.8 | 2 | V | 126 | |
| VBOT, BODLEVEL[1:0] = 01 | VBOT | 2.5 | 2.7 | 2.9 | V | 126 | |
| VBOT, BODLEVEL[1:0] = 00 | VBOT | 4.1 | 4.3 | 4.5 | V | 126 | |
| Input Offset Voltage (typ printed as < 10 mV) | VAIO | 40 | mV | VCC = 5V, VIN = VCC / 2 | 127 | ||
| Input Offset Voltage (typ printed as < 15 mV) | VAIO | 60 | mV | VCC < 3.6V, VIN < 0.5V | 127 | ||
| Input Offset Voltage (typ printed as < 15 mV) | VAIO | 500 | mV | VCC > 3.6V, VIN < 0.5V | 127 | ||
| Input Leakage Current | ILAC | -50 | 50 | nA | VCC = 5V, VIN = VCC / 2 | 127 | |
| Digital Propagation Delay | tDPD | 1 | 2 | CLK | VCC = 1.8 - 5.5V | 127 | |
| ADC Conversion Time | 13 | 260 | µs | Free Running Conversion | 127 | ||
| ADC Clock Frequency | 50 | 1000 | kHz | 127 | |||
| Internal Voltage Reference | VINT | 1 | 1.1 | 1.2 | V | 128 | |
| Oscillator Frequency (serial programming) | 1/tCLCL | 0 | 1 | MHz | VCC = 1.8 - 5.5V | 128 | |
| Oscillator Frequency (serial programming) | 1/tCLCL | 0 | 9.6 | MHz | VCC = 2.7 - 5.5V | 128 | |
| Oscillator Frequency (serial programming) | 1/tCLCL | 0 | 20 | MHz | VCC = 4.5 - 5.5V | 128 | |
| Clock Frequency (external clock drive) | 1/tCLCL | 0 | 4 | MHz | VCC = 1.8 - 5.5V | 125 | |
| Clock Frequency (external clock drive) | 1/tCLCL | 0 | 10 | MHz | VCC = 2.7 - 5.5V | 125 | |
| Clock Frequency (external clock drive) | 1/tCLCL | 0 | 20 | MHz | VCC = 4.5 - 5.5V | 125 | |
| Calibrated internal RC oscillator accuracy, factory calibration | -10 | 10 | % | 4.8 / 9.6 MHz, VCC 3V, 25°C | 125 | ||
| Calibrated internal RC oscillator accuracy, user calibration | -2 | 2 | % | Fixed frequency 4-5 / 8-10 MHz, fixed voltage 1.8-5.5V, fixed temperature -40°C to +85°C | 125 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | , H or 7: NiPdAu lead finish, U, N or F: matte tin | 168 |
CAD (KiCad official)
- Symbol:
ATTINY13A-SS7R - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
attiny13a-ss7r-etched.step/attiny13a-ss7r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);attiny13a-ss7r.step/attiny13a-ss7r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (189 pp, sha256
7c363e5deb94b552, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ATTINY13A-SS7R
**Microchip Tech** · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-8
ATTINY13A-SS7R from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB5/RESET | bidirectional | Port B bit 5 (also RESET, ADC0, dW): a low level on RESET longer than the minimum pulse length generates a reset, shorter pulses are not ensured to reset, and the pin can also be used as a weak I/O pin. |
| 2 | PB3 | bidirectional | Port B bit 3 (also CLKI, ADC3, PCINT3) is a bi-directional I/O with internal pull-up selectable per bit and is tri-stated when reset is active. |
| 3 | PB4 | bidirectional | Port B bit 4 (also ADC2, PCINT4) is a bi-directional I/O with internal pull-up selectable per bit and is tri-stated when reset is active. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | PB0 | bidirectional | Port B bit 0 (also MOSI, AIN0, OC0A, PCINT0) is a bi-directional I/O with internal pull-up selectable per bit and is tri-stated when reset is active. |
| 6 | PB1 | bidirectional | Port B bit 1 (also MISO, AIN1, OC0B, INT0, PCINT1) is a bi-directional I/O with internal pull-up selectable per bit and is tri-stated when reset is active. |
| 7 | PB2 | bidirectional | Port B bit 2 (also SCK, ADC1, T0, PCINT2) is a bi-directional I/O with internal pull-up selectable per bit and is tri-stated when reset is active. |
| 8 | VCC | power_in | Supply voltage, specified for operation from 1.8 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature | | -55 | | 125 | °C | | 123 |
| Storage Temperature | | -65 | | 150 | °C | | 123 |
| Voltage on RESET with respect to Ground | | -0.5 | | 13 | V | | 123 |
| Voltage on any pin except RESET with respect to Ground (max printed as VCC+0.5V) | | -0.5 | | | V | | 123 |
| Maximum Operating Voltage | | | | 6 | V | | 123 |
| DC Current per I/O Pin | | | | 40 | mA | | 123 |
| DC Current VCC and GND Pins | | | | 200 | mA | | 123 |
| Power Supply (ordering table, 20 MHz speed grade) | | 1.8 | | 5.5 | V | Industrial -40°C to +85°C, 20 MHz | 168 |
| Input Low Voltage, Any Pin as I/O (max printed as 0.2VCC) | VIL | -0.5 | | | V | VCC = 1.8 - 2.4V | 123 |
| Input Low Voltage, Any Pin as I/O (max printed as 0.3VCC) | VIL | -0.5 | | | V | VCC = 2.4 - 5.5V | 123 |
| Input Low Voltage, RESET Pin as Reset (max printed as 0.2VCC) | VIL | -0.5 | | | V | VCC = 1.8 - 5.5V | 123 |
| Output Low Voltage, Pins PB0 and PB1 | VOL | | | 0.8 | V | IOL = 20 mA, VCC = 5V | 123 |
| Output Low Voltage, Pins PB0 and PB1 | VOL | | | 0.6 | V | IOL = 10 mA, VCC = 3V | 123 |
| Output Low Voltage, Pins PB2, PB3 and PB4 | VOL | | | 0.8 | V | IOL = 10 mA, VCC = 5V | 123 |
| Output Low Voltage, Pins PB2, PB3 and PB4 | VOL | | | 0.6 | V | IOL = 5 mA, VCC = 3V | 123 |
| Output High Voltage, Pins PB0 and PB1 | VOH | 4 | | | V | IOH = -20 mA, VCC = 5V | 123 |
| Output High Voltage, Pins PB0 and PB1 | VOH | 2.3 | | | V | IOH = -10 mA, VCC = 3V | 123 |
| Output High Voltage, Pins PB2, PB3 and PB4 | VOH | 4.2 | | | V | IOH = -10 mA, VCC = 5V | 123 |
| Output High Voltage, Pins PB2, PB3 and PB4 | VOH | 2.5 | | | V | IOH = -5 mA, VCC = 3V | 123 |
| Input Leakage Current I/O Pin (low) | ILIL | -1 | | 1 | µA | VCC = 5.5V, pin low | 123 |
| Input Leakage Current I/O Pin (high) | ILIH | -1 | | 1 | µA | VCC = 5.5V, pin high | 123 |
| Pull-Up Resistor, I/O Pin | RPU | 20 | | 50 | k | VCC = 5.5V, input low | 123 |
| Pull-Up Resistor, Reset Pin | RPU | 30 | | 80 | k | VCC = 5.5V, input low | 123 |
| Supply Current, Active Mode | ICC | | 0.2 | 0.35 | mA | f = 1MHz, VCC = 2V | 124 |
| Supply Current, Active Mode | ICC | | 1.2 | 1.8 | mA | f = 4MHz, VCC = 3V | 124 |
| Supply Current, Active Mode | ICC | | 3.6 | 6 | mA | f = 8MHz, VCC = 5V | 124 |
| Supply Current, Idle Mode | ICC | | 0.03 | 0.2 | mA | f = 1MHz, VCC = 2V | 124 |
| Supply Current, Idle Mode | ICC | | 0.2 | 1 | mA | f = 4MHz, VCC = 3V | 124 |
| Supply Current, Idle Mode | ICC | | 0.7 | 3 | mA | f = 8MHz, VCC = 5V | 124 |
| Supply Current, Power-Down Mode | ICC | | 3.9 | 10 | µA | WDT enabled, VCC = 3V | 124 |
| Supply Current, Power-Down Mode | ICC | | 0.15 | 2 | µA | WDT disabled, VCC = 3V | 124 |
| Minimum pulse width on RESET Pin | tRST | 2000 | | 2500 | ns | VCC = 1.8V | 126 |
| Minimum pulse width on RESET Pin | tRST | 700 | | 2500 | ns | VCC = 3V | 126 |
| Minimum pulse width on RESET Pin | tRST | 400 | | 2500 | ns | VCC = 5V | 126 |
| Min Pulse Width on Brown-out Reset | tBOD | 2 | | | µs | | 126 |
| Internal bandgap reference voltage | VBG | 1 | 1.1 | 1.2 | V | VCC = 5V, TA = 25°C | 126 |
| Internal bandgap reference start-up time (typ 40 / max 70 as printed in two-value cell) | tBG | | 40 | 70 | µs | VCC = 5V, TA = 25°C | 126 |
| Release threshold of power-on reset | VPOR | 1.1 | 1.4 | 1.6 | V | | 126 |
| Activation threshold of power-on reset | VPOA | 0.6 | 1.3 | 1.6 | V | | 126 |
| Power-On Slope Rate | SRON | 0.01 | | | V/ms | | 126 |
| VBOT, BODLEVEL[1:0] = 10 | VBOT | 1.7 | 1.8 | 2 | V | | 126 |
| VBOT, BODLEVEL[1:0] = 01 | VBOT | 2.5 | 2.7 | 2.9 | V | | 126 |
| VBOT, BODLEVEL[1:0] = 00 | VBOT | 4.1 | 4.3 | 4.5 | V | | 126 |
| Input Offset Voltage (typ printed as < 10 mV) | VAIO | | | 40 | mV | VCC = 5V, VIN = VCC / 2 | 127 |
| Input Offset Voltage (typ printed as < 15 mV) | VAIO | | | 60 | mV | VCC < 3.6V, VIN < 0.5V | 127 |
| Input Offset Voltage (typ printed as < 15 mV) | VAIO | | | 500 | mV | VCC > 3.6V, VIN < 0.5V | 127 |
| Input Leakage Current | ILAC | -50 | | 50 | nA | VCC = 5V, VIN = VCC / 2 | 127 |
| Digital Propagation Delay | tDPD | 1 | | 2 | CLK | VCC = 1.8 - 5.5V | 127 |
| ADC Conversion Time | | 13 | | 260 | µs | Free Running Conversion | 127 |
| ADC Clock Frequency | | 50 | | 1000 | kHz | | 127 |
| Internal Voltage Reference | VINT | 1 | 1.1 | 1.2 | V | | 128 |
| Oscillator Frequency (serial programming) | 1/tCLCL | 0 | | 1 | MHz | VCC = 1.8 - 5.5V | 128 |
| Oscillator Frequency (serial programming) | 1/tCLCL | 0 | | 9.6 | MHz | VCC = 2.7 - 5.5V | 128 |
| Oscillator Frequency (serial programming) | 1/tCLCL | 0 | | 20 | MHz | VCC = 4.5 - 5.5V | 128 |
| Clock Frequency (external clock drive) | 1/tCLCL | 0 | | 4 | MHz | VCC = 1.8 - 5.5V | 125 |
| Clock Frequency (external clock drive) | 1/tCLCL | 0 | | 10 | MHz | VCC = 2.7 - 5.5V | 125 |
| Clock Frequency (external clock drive) | 1/tCLCL | 0 | | 20 | MHz | VCC = 4.5 - 5.5V | 125 |
| Calibrated internal RC oscillator accuracy, factory calibration | | -10 | | 10 | % | 4.8 / 9.6 MHz, VCC 3V, 25°C | 125 |
| Calibrated internal RC oscillator accuracy, user calibration | | -2 | | 2 | % | Fixed frequency 4-5 / 8-10 MHz, fixed voltage 1.8-5.5V, fixed temperature -40°C to +85°C | 125 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin |, H or 7: NiPdAu lead finish, U, N or F: matte tin | 168 |
## CAD (KiCad official)
- Symbol: `ATTINY13A-SS7R`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `attiny13a-ss7r-etched.step` / `attiny13a-ss7r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `attiny13a-ss7r.step` / `attiny13a-ss7r.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/attiny13a-ss7r-datasheet.pdf) (189 pp, sha256 `7c363e5deb94b552`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/attiny13a-ss7r-datasheet.pdf)