component
ATTINY102F-SSNR
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ATTINY102F-SSNR
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-8
ATTINY102F-SSNR from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Digital supply voltage, 1.8 to 5.5V operating range. |
| 2 | PA0 | bidirectional | Port A bit 0 I/O with selectable pull-up, alternate functions PCINT0, T0, CLKI (external clock input), AIN0, ADC0 and TPICLK (serial programming clock). |
| 3 | PA1 | bidirectional | Port A bit 1 I/O with selectable pull-up, alternate functions PCINT1, OC0B, AIN1, ADC1 and TPIDATA (serial programming data). |
| 4 | PA2/RESET | bidirectional | Port A bit 2 with PCINT2; also the active-low RESET input (a low level longer than the minimum pulse length generates a reset) and can be used as a weak I/O pin if the reset pin is disabled. |
| 5 | PB1 | bidirectional | Port B bit 1 I/O with selectable pull-up, alternate functions ADC5, CLKO (system clock output), INT0, OC0A, XCK0 and PCINT9. |
| 6 | PB2 | bidirectional | Port B bit 2 I/O with selectable pull-up, alternate functions ADC6, ICP0, TxD0 (USART output) and PCINT10. |
| 7 | PB3 | bidirectional | Port B bit 3 I/O with selectable pull-up, alternate functions ADC7, T0, RxD0 (USART input), ACO (analog comparator output) and PCINT11. |
| 8 | GND | power_in | Ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Low Voltage | VOL | 0.6 | V | IOL = 10mA, VCC = 5V | 211 | ||
| Output Low Voltage | VOL | 0.5 | V | IOL = 5mA, VCC = 3V | 211 | ||
| Output High Voltage | VOH | 4.3 | V | IOH = 10mA, VCC = 5V | 211 | ||
| Output High Voltage | VOH | 2.5 | V | IOH = 5mA, VCC = 3V | 211 | ||
| Input Leakage Current I/O Pin, pin low | IIL | 1 | μA | VCC = 5.5V, pin low (absolute value); typ printed <0.05 | 211 | ||
| Input Leakage Current I/O Pin, pin high | IIH | 1 | μA | VCC = 5.5V, pin high (absolute value); typ printed <0.05 | 211 | ||
| Reset Pull-up Resistor | RRST | 30 | 60 | kΩ | VCC = 5.5V, input low | 211 | |
| I/O Pin Pull-up Resistor | RPU | 20 | 50 | kΩ | VCC = 5.5V, input low | 211 | |
| Analog Comparator Input Leakage Current | IACLK | -50 | 50 | nA | VCC=5V, Vin = VCC/2 | 211 | |
| Power Supply Current Active | ICC | 0.2 | 0.5 | mA | Active 1MHz, VCC = 2V | 212 | |
| Power Supply Current Active | ICC | 1.1 | 1.2 | mA | Active 4MHz, VCC = 3V | 212 | |
| Power Supply Current Active | ICC | 3.2 | 4 | mA | Active 8MHz, VCC = 5V | 212 | |
| Power Supply Current Idle | ICC | 0.03 | 0.2 | mA | Idle 1MHz, VCC = 2V | 212 | |
| Power Supply Current Idle | ICC | 0.2 | 0.5 | mA | Idle 4MHz, VCC = 3V | 212 | |
| Power Supply Current Idle | ICC | 0.9 | 1.5 | mA | Idle 8MHz, VCC = 5V | 212 | |
| Power-down Current, WDT enabled | ICC | 5.5 | 10 | μA | WDT enabled, Vcc = 3V, TA=105°C | 212 | |
| Power-down Current, WDT disabled | ICC | 0.11 | 2 | μA | WDT disabled, Vcc = 3V, TA=105°C | 212 | |
| Operating Temperature (Absolute Maximum) | -55 | 125 | °C | 210 | |||
| Storage Temperature | -65 | 150 | °C | 210 | |||
| Voltage on any Pin except RESET | -0.5 | V | with respect to Ground; upper limit printed VCC+0.5V | 210 | |||
| Voltage on RESET | -0.5 | 13 | V | with respect to Ground | 210 | ||
| Maximum Operating Voltage | 6 | V | 210 | ||||
| DC Current per I/O Pin | 40 | mA | 210 | ||||
| DC Current VCC and GND Pins | 200 | mA | 210 | ||||
| Operating Voltage | VCC | 1.8 | 5.5 | V | 2 | ||
| Operating Temperature Range (Industrial, ATtiny102F-SSNR) | -40 | 105 | °C | Industrial | 10 | ||
| Clock Frequency | 1/tCLCL | 0 | 4 | MHz | VCC = 1.8 - 5.5V | 214 | |
| Clock Frequency | 1/tCLCL | 0 | 8 | MHz | VCC = 2.7 - 5.5V | 214 | |
| Clock Frequency | 1/tCLCL | 0 | 12 | MHz | VCC = 4.5 - 5.5V | 214 | |
| Factory Calibration Accuracy of Internal RC Oscillator | -2 | 2 | % | 8.0MHz, VCC 2.7 - 4.0V, 0°C - 85°C | 213 | ||
| Internal bandgap voltage | VBG | 1 | 1.1 | 1.2 | V | VCC = 1.8V to 5.5V | 214 |
| Minimum pulse width on RESET Pin | tRST | 2100 | ns | VCC = 1.8V | 214 | ||
| Minimum pulse width on RESET Pin | tRST | 700 | ns | VCC = 3V | 214 | ||
| Minimum pulse width on RESET Pin | tRST | 400 | ns | VCC = 5V | 214 | ||
| Time-out after reset | tTOUT | 64 | 128 | ms | 214 | ||
| Release threshold of power-on reset | VPOR | 1.1 | 1.4 | 1.6 | V | TA = -40 to 125°C | 214 |
| Activation threshold of power-on reset | VPOA | 0.6 | 1.2 | 1.6 | V | TA = -40 to 125°C | 214 |
| VLM Trigger level VLM1L | VLM1L | 1.1 | 1.4 | 1.6 | V | 215 | |
| VLM Trigger level VLM1H | VLM1H | 1.4 | 1.6 | 1.8 | V | 215 | |
| VLM Trigger level VLM2 | VLM2 | 2 | 2.5 | 2.7 | V | 215 | |
| VLM Trigger level VLM3 | VLM3 | 3.2 | 3.7 | 4.5 | V | 215 | |
| Analog Comparator Input Offset Voltage | VAIO | 10 | 40 | mV | VCC = 5V, VIN = VCC / 2 | 215 | |
| Analog Comparator Input Leakage Current | ILAC | -50 | 50 | nA | VCC = 5V, VIN = VCC / 2 | 215 | |
| Digital Propagation Delay | tDPD | 1 | 2 | CLK | VCC = 1.8V - 5.5V | 215 | |
| ADC Resolution | 10 | Bits | 216 | ||||
| Integral Non-Linearity | INL | 0.51 | 0.68 | 0.88 | LSB | VREF = VCC = 4.0V, ADC clock = 200 kHz | 216 |
| Differential Non-linearity | DNL | 0.42 | 0.49 | 0.73 | LSB | VREF = VCC = 4.0V, ADC clock = 200 kHz | 216 |
| Gain Error | -7.2 | -4 | -1 | LSB | VREF = VCC = 4.0V, ADC clock = 200 kHz | 216 | |
| Offset Error | 3 | 5.1 | 8 | LSB | VREF = VCC = 4.0V, ADC clock = 200 kHz | 216 | |
| ADC Conversion Time | 13 | 260 | µs | Single Conversion | 217 | ||
| ADC Clock Frequency | 50 | 1000 | kHz | 217 | |||
| Serial Programming Clock Frequency | 1/tCLCL | 2 | MHz | TA = -40°C to 125°C, VCC = 5V ± 5% | 217 | ||
| Serial Programming Clock Period | tCLCL | 500 | ns | VCC = 5V ± 5% | 217 |
CAD (KiCad official)
- Symbol:
ATTINY102F-SSNR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
attiny102f-ssnr-etched.step/attiny102f-ssnr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);attiny102f-ssnr.step/attiny102f-ssnr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (255 pp, sha256
1912733b75a6113a, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ATTINY102F-SSNR
**Microchip Tech** · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-8
ATTINY102F-SSNR from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Digital supply voltage, 1.8 to 5.5V operating range. |
| 2 | PA0 | bidirectional | Port A bit 0 I/O with selectable pull-up, alternate functions PCINT0, T0, CLKI (external clock input), AIN0, ADC0 and TPICLK (serial programming clock). |
| 3 | PA1 | bidirectional | Port A bit 1 I/O with selectable pull-up, alternate functions PCINT1, OC0B, AIN1, ADC1 and TPIDATA (serial programming data). |
| 4 | PA2/RESET | bidirectional | Port A bit 2 with PCINT2; also the active-low RESET input (a low level longer than the minimum pulse length generates a reset) and can be used as a weak I/O pin if the reset pin is disabled. |
| 5 | PB1 | bidirectional | Port B bit 1 I/O with selectable pull-up, alternate functions ADC5, CLKO (system clock output), INT0, OC0A, XCK0 and PCINT9. |
| 6 | PB2 | bidirectional | Port B bit 2 I/O with selectable pull-up, alternate functions ADC6, ICP0, TxD0 (USART output) and PCINT10. |
| 7 | PB3 | bidirectional | Port B bit 3 I/O with selectable pull-up, alternate functions ADC7, T0, RxD0 (USART input), ACO (analog comparator output) and PCINT11. |
| 8 | GND | power_in | Ground. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Low Voltage | VOL | | | 0.6 | V | IOL = 10mA, VCC = 5V | 211 |
| Output Low Voltage | VOL | | | 0.5 | V | IOL = 5mA, VCC = 3V | 211 |
| Output High Voltage | VOH | 4.3 | | | V | IOH = 10mA, VCC = 5V | 211 |
| Output High Voltage | VOH | 2.5 | | | V | IOH = 5mA, VCC = 3V | 211 |
| Input Leakage Current I/O Pin, pin low | IIL | | | 1 | μA | VCC = 5.5V, pin low (absolute value); typ printed <0.05 | 211 |
| Input Leakage Current I/O Pin, pin high | IIH | | | 1 | μA | VCC = 5.5V, pin high (absolute value); typ printed <0.05 | 211 |
| Reset Pull-up Resistor | RRST | 30 | | 60 | kΩ | VCC = 5.5V, input low | 211 |
| I/O Pin Pull-up Resistor | RPU | 20 | | 50 | kΩ | VCC = 5.5V, input low | 211 |
| Analog Comparator Input Leakage Current | IACLK | -50 | | 50 | nA | VCC=5V, Vin = VCC/2 | 211 |
| Power Supply Current Active | ICC | | 0.2 | 0.5 | mA | Active 1MHz, VCC = 2V | 212 |
| Power Supply Current Active | ICC | | 1.1 | 1.2 | mA | Active 4MHz, VCC = 3V | 212 |
| Power Supply Current Active | ICC | | 3.2 | 4 | mA | Active 8MHz, VCC = 5V | 212 |
| Power Supply Current Idle | ICC | | 0.03 | 0.2 | mA | Idle 1MHz, VCC = 2V | 212 |
| Power Supply Current Idle | ICC | | 0.2 | 0.5 | mA | Idle 4MHz, VCC = 3V | 212 |
| Power Supply Current Idle | ICC | | 0.9 | 1.5 | mA | Idle 8MHz, VCC = 5V | 212 |
| Power-down Current, WDT enabled | ICC | | 5.5 | 10 | μA | WDT enabled, Vcc = 3V, TA=105°C | 212 |
| Power-down Current, WDT disabled | ICC | | 0.11 | 2 | μA | WDT disabled, Vcc = 3V, TA=105°C | 212 |
| Operating Temperature (Absolute Maximum) | | -55 | | 125 | °C | | 210 |
| Storage Temperature | | -65 | | 150 | °C | | 210 |
| Voltage on any Pin except RESET | | -0.5 | | | V | with respect to Ground; upper limit printed VCC+0.5V | 210 |
| Voltage on RESET | | -0.5 | | 13 | V | with respect to Ground | 210 |
| Maximum Operating Voltage | | | | 6 | V | | 210 |
| DC Current per I/O Pin | | | | 40 | mA | | 210 |
| DC Current VCC and GND Pins | | | | 200 | mA | | 210 |
| Operating Voltage | VCC | 1.8 | | 5.5 | V | | 2 |
| Operating Temperature Range (Industrial, ATtiny102F-SSNR) | | -40 | | 105 | °C | Industrial | 10 |
| Clock Frequency | 1/tCLCL | 0 | | 4 | MHz | VCC = 1.8 - 5.5V | 214 |
| Clock Frequency | 1/tCLCL | 0 | | 8 | MHz | VCC = 2.7 - 5.5V | 214 |
| Clock Frequency | 1/tCLCL | 0 | | 12 | MHz | VCC = 4.5 - 5.5V | 214 |
| Factory Calibration Accuracy of Internal RC Oscillator | | -2 | | 2 | % | 8.0MHz, VCC 2.7 - 4.0V, 0°C - 85°C | 213 |
| Internal bandgap voltage | VBG | 1 | 1.1 | 1.2 | V | VCC = 1.8V to 5.5V | 214 |
| Minimum pulse width on RESET Pin | tRST | 2100 | | | ns | VCC = 1.8V | 214 |
| Minimum pulse width on RESET Pin | tRST | 700 | | | ns | VCC = 3V | 214 |
| Minimum pulse width on RESET Pin | tRST | 400 | | | ns | VCC = 5V | 214 |
| Time-out after reset | tTOUT | 64 | | 128 | ms | | 214 |
| Release threshold of power-on reset | VPOR | 1.1 | 1.4 | 1.6 | V | TA = -40 to 125°C | 214 |
| Activation threshold of power-on reset | VPOA | 0.6 | 1.2 | 1.6 | V | TA = -40 to 125°C | 214 |
| VLM Trigger level VLM1L | VLM1L | 1.1 | 1.4 | 1.6 | V | | 215 |
| VLM Trigger level VLM1H | VLM1H | 1.4 | 1.6 | 1.8 | V | | 215 |
| VLM Trigger level VLM2 | VLM2 | 2 | 2.5 | 2.7 | V | | 215 |
| VLM Trigger level VLM3 | VLM3 | 3.2 | 3.7 | 4.5 | V | | 215 |
| Analog Comparator Input Offset Voltage | VAIO | | 10 | 40 | mV | VCC = 5V, VIN = VCC / 2 | 215 |
| Analog Comparator Input Leakage Current | ILAC | -50 | | 50 | nA | VCC = 5V, VIN = VCC / 2 | 215 |
| Digital Propagation Delay | tDPD | | 1 | 2 | CLK | VCC = 1.8V - 5.5V | 215 |
| ADC Resolution | | | 10 | | Bits | | 216 |
| Integral Non-Linearity | INL | 0.51 | 0.68 | 0.88 | LSB | VREF = VCC = 4.0V, ADC clock = 200 kHz | 216 |
| Differential Non-linearity | DNL | 0.42 | 0.49 | 0.73 | LSB | VREF = VCC = 4.0V, ADC clock = 200 kHz | 216 |
| Gain Error | | -7.2 | -4 | -1 | LSB | VREF = VCC = 4.0V, ADC clock = 200 kHz | 216 |
| Offset Error | | 3 | 5.1 | 8 | LSB | VREF = VCC = 4.0V, ADC clock = 200 kHz | 216 |
| ADC Conversion Time | | 13 | | 260 | µs | Single Conversion | 217 |
| ADC Clock Frequency | | 50 | | 1000 | kHz | | 217 |
| Serial Programming Clock Frequency | 1/tCLCL | | | 2 | MHz | TA = -40°C to 125°C, VCC = 5V ± 5% | 217 |
| Serial Programming Clock Period | tCLCL | 500 | | | ns | VCC = 5V ± 5% | 217 |
## CAD (KiCad official)
- Symbol: `ATTINY102F-SSNR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `attiny102f-ssnr-etched.step` / `attiny102f-ssnr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `attiny102f-ssnr.step` / `attiny102f-ssnr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/attiny102f-ssnr-datasheet.pdf) (255 pp, sha256 `1912733b75a6113a`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/attiny102f-ssnr-datasheet.pdf)