component
ATTINY10-TSHR
Public Made by Adomby adom
Microchip Tech Microcontrollers (MCU/MPU/SOC), SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ATTINY10-TSHR
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · SOT-23-6
ATTINY10-TSHR from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB0 | bidirectional | Port B bit 0, bi-directional I/O with selectable pull-up, with alternate functions ADC0, AIN0 (comparator positive input), OC0A, PCINT0 and TPIDATA (serial programming data). |
| 2 | GND | power_in | Ground. |
| 3 | PB1 | bidirectional | Port B bit 1, bi-directional I/O with selectable pull-up, with alternate functions ADC1, AIN1 (comparator negative input), CLKI (external clock), ICP0, OC0B, PCINT1 and TPICLK (serial programming clock). |
| 4 | PB2 | bidirectional | Port B bit 2, bi-directional I/O with selectable pull-up, with alternate functions ADC2, CLKO (system clock output), INT0, PCINT2 and T0 (Timer/Counter0 clock source). |
| 5 | VCC | power_in | Digital supply voltage, 1.8 - 5.5V operating range. |
| 6 | PB3/RESET | bidirectional | Port B bit 3 with ADC3 and PCINT3; as RESET, a low level longer than the minimum pulse length generates a reset, and the pin can also be used as a (weak) I/O pin if the reset function is disabled. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-6 |
| Category | Embedded Processors & Controllers |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature | -55 | 125 | °C | 159 | |||
| Storage Temperature | -65 | 150 | °C | 159 | |||
| Voltage on any pin except RESET with respect to Ground | -0.5 | V | with respect to Ground | 159 | |||
| Voltage on RESET with respect to Ground | -0.5 | 13 | V | with respect to Ground | 159 | ||
| Maximum Operating Voltage | 6 | V | 159 | ||||
| DC Current per I/O Pin | 40 | mA | 159 | ||||
| DC Current VCC and GND Pins | 200 | mA | 159 | ||||
| Input Low Voltage | VIL | -0.5 | V | VCC = 1.8V - 2.4V | 159 | ||
| Output Low Voltage (except RESET pin) | VOL | 0.6 | V | IOL = 10 mA, VCC = 5V | 159 | ||
| Output Low Voltage (except RESET pin) | VOL | 0.5 | V | IOL = 5 mA, VCC = 3V | 159 | ||
| Output High Voltage (except RESET pin) | VOH | 4.3 | V | IOH = -10 mA, VCC = 5V | 159 | ||
| Output High Voltage (except RESET pin) | VOH | 2.5 | V | IOH = -5 mA, VCC = 3V | 159 | ||
| Input Leakage Current I/O Pin (pin low, absolute value) | ILIL | 1 | µA | VCC = 5.5V, pin low (absolute value) | 160 | ||
| Input Leakage Current I/O Pin (pin high, absolute value) | ILIH | 1 | µA | VCC = 5.5V, pin high (absolute value) | 160 | ||
| Reset Pull-up Resistor | RRST | 30 | 60 | kΩ | VCC = 5.5V, input low | 160 | |
| I/O Pin Pull-up Resistor | RPU | 20 | 50 | kΩ | VCC = 5.5V, input low | 160 | |
| Analog Comparator Input Leakage Current | IACLK | -50 | 50 | nA | VCC = 5V, Vin = VCC/2 | 160 | |
| Power Supply Current, Active mode | ICC | 0.2 | 0.5 | mA | Active 1MHz, VCC = 2V | 160 | |
| Power Supply Current, Active mode | ICC | 0.8 | 1.2 | mA | Active 4MHz, VCC = 3V | 160 | |
| Power Supply Current, Active mode | ICC | 2.7 | 4 | mA | Active 8MHz, VCC = 5V | 160 | |
| Power Supply Current, Idle mode | ICC | 0.02 | 0.2 | mA | Idle 1MHz, VCC = 2V | 160 | |
| Power Supply Current, Idle mode | ICC | 0.13 | 0.5 | mA | Idle 4MHz, VCC = 3V | 160 | |
| Power Supply Current, Idle mode | ICC | 0.6 | 1.5 | mA | Idle 8MHz, VCC = 5V | 160 | |
| Power Supply Current, Power-down mode | ICC | 4.5 | 10 | µA | Power-down mode, WDT enabled, VCC = 3V | 160 | |
| Power Supply Current, Power-down mode | ICC | 0.15 | 2 | µA | Power-down mode, WDT disabled, VCC = 3V | 160 | |
| Clock Frequency | 1/tCLCL | 0 | 4 | MHz | VCC = 1.8 - 5.5V | 162 | |
| Clock Frequency | 1/tCLCL | 0 | 8 | MHz | VCC = 2.7 - 5.5V | 162 | |
| Clock Frequency | 1/tCLCL | 0 | 12 | MHz | VCC = 4.5 - 5.5V | 162 | |
| Clock Period | tCLCL | 250 | ns | VCC = 1.8 - 5.5V | 162 | ||
| Clock Period | tCLCL | 125 | ns | VCC = 2.7 - 5.5V | 162 | ||
| Clock Period | tCLCL | 83 | ns | VCC = 4.5 - 5.5V | 162 | ||
| High Time | tCHCX | 100 | ns | VCC = 1.8 - 5.5V | 162 | ||
| High Time | tCHCX | 50 | ns | VCC = 2.7 - 5.5V | 162 | ||
| High Time | tCHCX | 33 | ns | VCC = 4.5 - 5.5V | 162 | ||
| Low Time | tCLCX | 100 | ns | VCC = 1.8 - 5.5V | 162 | ||
| Low Time | tCLCX | 50 | ns | VCC = 2.7 - 5.5V | 162 | ||
| Low Time | tCLCX | 33 | ns | VCC = 4.5 - 5.5V | 162 | ||
| Minimum pulse width on RESET pin | tRST | 2000 | ns | VCC = 1.8V | 162 | ||
| Minimum pulse width on RESET pin | tRST | 700 | ns | VCC = 3V | 162 | ||
| Minimum pulse width on RESET pin | tRST | 400 | ns | VCC = 5V | 162 | ||
| Time-out after reset | tTOUT | 32 | 64 | 128 | ms | 162 | |
| Release threshold of power-on reset | VPOR | 1.1 | 1.4 | 1.6 | V | Rising supply | 163 |
| Activation threshold of power-on reset | VPOA | 0.6 | 1.3 | 1.6 | V | 163 | |
| VCC Level Monitor trigger level | VLM1L | 1.1 | 1.4 | 1.6 | V | 163 | |
| VCC Level Monitor trigger level | VLM1H | 1.4 | 1.6 | 1.8 | V | 163 | |
| VCC Level Monitor trigger level | VLM2 | 2 | 2.5 | 2.7 | V | 163 | |
| VCC Level Monitor trigger level | VLM3 | 3.2 | 3.7 | 4.5 | V | 163 | |
| Input Offset Voltage | VAIO | 40 | mV | VCC = 5V, VIN = VCC / 2 | 163 | ||
| Input Leakage Current | ILAC | -50 | 50 | nA | VCC = 5V, VIN = VCC / 2 | 163 | |
| Digital Propagation Delay | tDPD | 1 | 2 | CLK | VCC = 1.8V - 5.5V | 163 | |
| Resolution-independent absolute accuracy (INL, DNL, quantization, gain and offset errors) | 1 | LSB | VREF = VCC = 4V, ADC clock = 200 kHz | 164 | |||
| Integral Non-Linearity (INL) | 1 | LSB | VREF = VCC = 4V, ADC clock = 200 kHz | 164 | |||
| Differential Non-linearity (DNL) | 0.5 | LSB | VREF = VCC = 4V, ADC clock = 200 kHz | 164 | |||
| Gain Error | 1 | LSB | VREF = VCC = 4V, ADC clock = 200 kHz | 164 | |||
| Offset Error | 1 | LSB | VREF = VCC = 4V, ADC clock = 200 kHz | 164 | |||
| ADC Conversion Output | 0 | 255 | LSB | 164 | |||
| Supply Voltage (VCC) ordering range | VCC | 1.8 | 5.5 | V | ATTINY10-TSHR, industrial, 12 MHz speed grade | 12 | |
| Operating Temperature (industrial grade, suffix H) | -40 | 85 | °C | ATTINY10-TSHR, industrial (-40°C to 85°C) | 12 |
CAD (KiCad official)
- Symbol:
ATTINY10-TSHR - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
attiny10-tshr-etched.step/attiny10-tshr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);attiny10-tshr.step/attiny10-tshr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (207 pp, sha256
5a57fb72501944cc, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ATTINY10-TSHR
**Microchip Tech** · Microcontrollers (MCU/MPU/SOC) · SOT-23-6
ATTINY10-TSHR from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB0 | bidirectional | Port B bit 0, bi-directional I/O with selectable pull-up, with alternate functions ADC0, AIN0 (comparator positive input), OC0A, PCINT0 and TPIDATA (serial programming data). |
| 2 | GND | power_in | Ground. |
| 3 | PB1 | bidirectional | Port B bit 1, bi-directional I/O with selectable pull-up, with alternate functions ADC1, AIN1 (comparator negative input), CLKI (external clock), ICP0, OC0B, PCINT1 and TPICLK (serial programming clock). |
| 4 | PB2 | bidirectional | Port B bit 2, bi-directional I/O with selectable pull-up, with alternate functions ADC2, CLKO (system clock output), INT0, PCINT2 and T0 (Timer/Counter0 clock source). |
| 5 | VCC | power_in | Digital supply voltage, 1.8 - 5.5V operating range. |
| 6 | PB3/RESET | bidirectional | Port B bit 3 with ADC3 and PCINT3; as RESET, a low level longer than the minimum pulse length generates a reset, and the pin can also be used as a (weak) I/O pin if the reset function is disabled. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-6 |
| Category | Embedded Processors & Controllers |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature | | -55 | | 125 | °C | | 159 |
| Storage Temperature | | -65 | | 150 | °C | | 159 |
| Voltage on any pin except RESET with respect to Ground | | -0.5 | | | V | with respect to Ground | 159 |
| Voltage on RESET with respect to Ground | | -0.5 | | 13 | V | with respect to Ground | 159 |
| Maximum Operating Voltage | | | | 6 | V | | 159 |
| DC Current per I/O Pin | | | | 40 | mA | | 159 |
| DC Current VCC and GND Pins | | | | 200 | mA | | 159 |
| Input Low Voltage | VIL | -0.5 | | | V | VCC = 1.8V - 2.4V | 159 |
| Output Low Voltage (except RESET pin) | VOL | | | 0.6 | V | IOL = 10 mA, VCC = 5V | 159 |
| Output Low Voltage (except RESET pin) | VOL | | | 0.5 | V | IOL = 5 mA, VCC = 3V | 159 |
| Output High Voltage (except RESET pin) | VOH | 4.3 | | | V | IOH = -10 mA, VCC = 5V | 159 |
| Output High Voltage (except RESET pin) | VOH | 2.5 | | | V | IOH = -5 mA, VCC = 3V | 159 |
| Input Leakage Current I/O Pin (pin low, absolute value) | ILIL | | | 1 | µA | VCC = 5.5V, pin low (absolute value) | 160 |
| Input Leakage Current I/O Pin (pin high, absolute value) | ILIH | | | 1 | µA | VCC = 5.5V, pin high (absolute value) | 160 |
| Reset Pull-up Resistor | RRST | 30 | | 60 | kΩ | VCC = 5.5V, input low | 160 |
| I/O Pin Pull-up Resistor | RPU | 20 | | 50 | kΩ | VCC = 5.5V, input low | 160 |
| Analog Comparator Input Leakage Current | IACLK | -50 | | 50 | nA | VCC = 5V, Vin = VCC/2 | 160 |
| Power Supply Current, Active mode | ICC | | 0.2 | 0.5 | mA | Active 1MHz, VCC = 2V | 160 |
| Power Supply Current, Active mode | ICC | | 0.8 | 1.2 | mA | Active 4MHz, VCC = 3V | 160 |
| Power Supply Current, Active mode | ICC | | 2.7 | 4 | mA | Active 8MHz, VCC = 5V | 160 |
| Power Supply Current, Idle mode | ICC | | 0.02 | 0.2 | mA | Idle 1MHz, VCC = 2V | 160 |
| Power Supply Current, Idle mode | ICC | | 0.13 | 0.5 | mA | Idle 4MHz, VCC = 3V | 160 |
| Power Supply Current, Idle mode | ICC | | 0.6 | 1.5 | mA | Idle 8MHz, VCC = 5V | 160 |
| Power Supply Current, Power-down mode | ICC | | 4.5 | 10 | µA | Power-down mode, WDT enabled, VCC = 3V | 160 |
| Power Supply Current, Power-down mode | ICC | | 0.15 | 2 | µA | Power-down mode, WDT disabled, VCC = 3V | 160 |
| Clock Frequency | 1/tCLCL | 0 | | 4 | MHz | VCC = 1.8 - 5.5V | 162 |
| Clock Frequency | 1/tCLCL | 0 | | 8 | MHz | VCC = 2.7 - 5.5V | 162 |
| Clock Frequency | 1/tCLCL | 0 | | 12 | MHz | VCC = 4.5 - 5.5V | 162 |
| Clock Period | tCLCL | 250 | | | ns | VCC = 1.8 - 5.5V | 162 |
| Clock Period | tCLCL | 125 | | | ns | VCC = 2.7 - 5.5V | 162 |
| Clock Period | tCLCL | 83 | | | ns | VCC = 4.5 - 5.5V | 162 |
| High Time | tCHCX | 100 | | | ns | VCC = 1.8 - 5.5V | 162 |
| High Time | tCHCX | 50 | | | ns | VCC = 2.7 - 5.5V | 162 |
| High Time | tCHCX | 33 | | | ns | VCC = 4.5 - 5.5V | 162 |
| Low Time | tCLCX | 100 | | | ns | VCC = 1.8 - 5.5V | 162 |
| Low Time | tCLCX | 50 | | | ns | VCC = 2.7 - 5.5V | 162 |
| Low Time | tCLCX | 33 | | | ns | VCC = 4.5 - 5.5V | 162 |
| Minimum pulse width on RESET pin | tRST | 2000 | | | ns | VCC = 1.8V | 162 |
| Minimum pulse width on RESET pin | tRST | 700 | | | ns | VCC = 3V | 162 |
| Minimum pulse width on RESET pin | tRST | 400 | | | ns | VCC = 5V | 162 |
| Time-out after reset | tTOUT | 32 | 64 | 128 | ms | | 162 |
| Release threshold of power-on reset | VPOR | 1.1 | 1.4 | 1.6 | V | Rising supply | 163 |
| Activation threshold of power-on reset | VPOA | 0.6 | 1.3 | 1.6 | V | | 163 |
| VCC Level Monitor trigger level | VLM1L | 1.1 | 1.4 | 1.6 | V | | 163 |
| VCC Level Monitor trigger level | VLM1H | 1.4 | 1.6 | 1.8 | V | | 163 |
| VCC Level Monitor trigger level | VLM2 | 2 | 2.5 | 2.7 | V | | 163 |
| VCC Level Monitor trigger level | VLM3 | 3.2 | 3.7 | 4.5 | V | | 163 |
| Input Offset Voltage | VAIO | | | 40 | mV | VCC = 5V, VIN = VCC / 2 | 163 |
| Input Leakage Current | ILAC | -50 | | 50 | nA | VCC = 5V, VIN = VCC / 2 | 163 |
| Digital Propagation Delay | tDPD | 1 | | 2 | CLK | VCC = 1.8V - 5.5V | 163 |
| Resolution-independent absolute accuracy (INL, DNL, quantization, gain and offset errors) | | | | 1 | LSB | VREF = VCC = 4V, ADC clock = 200 kHz | 164 |
| Integral Non-Linearity (INL) | | | | 1 | LSB | VREF = VCC = 4V, ADC clock = 200 kHz | 164 |
| Differential Non-linearity (DNL) | | | | 0.5 | LSB | VREF = VCC = 4V, ADC clock = 200 kHz | 164 |
| Gain Error | | | | 1 | LSB | VREF = VCC = 4V, ADC clock = 200 kHz | 164 |
| Offset Error | | | | 1 | LSB | VREF = VCC = 4V, ADC clock = 200 kHz | 164 |
| ADC Conversion Output | | 0 | | 255 | LSB | | 164 |
| Supply Voltage (VCC) ordering range | VCC | 1.8 | | 5.5 | V | ATTINY10-TSHR, industrial, 12 MHz speed grade | 12 |
| Operating Temperature (industrial grade, suffix H) | | -40 | | 85 | °C | ATTINY10-TSHR, industrial (-40°C to 85°C) | 12 |
## CAD (KiCad official)
- Symbol: `ATTINY10-TSHR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `attiny10-tshr-etched.step` / `attiny10-tshr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `attiny10-tshr.step` / `attiny10-tshr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586200698916233216) (207 pp, sha256 `5a57fb72501944cc`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/attiny10-tshr-datasheet.pdf)