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ATSAMR21E18A-MFT
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Microchip Tech RF Transceiver ICs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ATSAMR21E18A-MFT
Microchip Tech · RF Transceiver ICs · QFN-32-EP(5x5)
ATSAMR21E18A-MFT from Microchip Tech, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | XTAL2 | output | Output of the integrated AT86RF233 16 MHz reference oscillator amplifier, with parasitic pin capacitance of 3 pF to be counted as crystal load and a DC level of 0.9 V. |
| 2 | XTAL1 | input | Input of the integrated 16 MHz reference oscillator amplifier (XOSCRF), also used as the input pin when an external reference clock is applied, with a DC level of 0.9 V. |
| 3 | GNDANA | power_in | Ground for the analog power domain, which should be separated from the digital ground on the PCB. |
| 4 | VDDANA | power_in | Analog supply voltage of 1.8 V to 3.6 V, decoupled with 100 nF and 10 µF capacitors and optionally isolated from VDD by a ferrite bead. |
| 5 | AVDD | power_out | Output of the internal analog 1.8 V voltage regulator that must be bypassed with 100 nF capacitors for stable operation. |
| 6 | GNDANA | power_in | Ground for the analog power domain, which should be separated from the digital ground on the PCB. |
| 7 | PA06 | bidirectional | General-purpose I/O on the VDDANA supply domain with analog input AIN[6] (function B), EXTINT[6], SERCOM0/PAD[2] and TCC1/WO[0] alternate functions. |
| 8 | PA07 | bidirectional | General-purpose I/O on the VDDANA supply domain with analog input AIN[7] (function B), EXTINT[7], SERCOM0/PAD[3] and TCC1/WO[1] alternate functions. |
| 9 | PA08 | bidirectional | General-purpose I/O on the VDDIO supply domain with I2C, NMI, SERCOM0/SERCOM2 PAD[0], TCC0/WO[0] and FECTRL[0] alternate functions. |
| 10 | PA09 | bidirectional | General-purpose I/O on the VDDIO supply domain with I2C, EXTINT[9], SERCOM0/SERCOM2 PAD[1], TCC0/WO[1] and FECTRL[1] alternate functions. |
| 11 | GNDANA | power_in | Ground for the analog power domain, which should be separated from the digital ground on the PCB. |
| 12 | RFP | passive | Positive side of the differential RF port designed for a 100 Ω differential load, where a DC path to ground or supply is not allowed and the common-mode capacitance to ground must be below 30 pF. |
| 13 | RFN | passive | Negative side of the differential RF port designed for a 100 Ω differential load, where a DC path to ground or supply is not allowed and the common-mode capacitance to ground must be below 30 pF. |
| 14 | GNDANA | power_in | Ground for the analog power domain, which should be separated from the digital ground on the PCB. |
| 15 | PA14 | bidirectional | General-purpose I/O on the VDDIO supply domain that also serves as the XIN input of the main crystal oscillator (XOSC), with EXTINT[14], SERCOM2/PAD[2], TC3/WO[0], FECTRL[4] and GCLK_IO[0] alternate functions. |
| 16 | PA15 | bidirectional | General-purpose I/O on the VDDIO supply domain that also serves as the XOUT output of the main crystal oscillator (XOSC), with EXTINT[15], SERCOM2/PAD[3], TC3/WO[1], FECTRL[5] and GCLK_IO[1] alternate functions. |
| 17 | PA16 | bidirectional | General-purpose I/O on the VDDIO supply domain with I2C, X[4], SERCOM1/SERCOM3 PAD[0], TCC2/WO[0], TCC0/WO[0] and GCLK_IO[2] alternate functions. |
| 18 | PA17 | bidirectional | General-purpose I/O on the VDDIO supply domain with I2C, EXTINT[1], X[5], SERCOM1/SERCOM3 PAD[1], TCC2/WO[1], TCC0/WO[1] and GCLK_IO[3] alternate functions. |
| 19 | PA18 | bidirectional | General-purpose I/O on the VDDIO supply domain with EXTINT[2], X[6], SERCOM1/SERCOM3 PAD[2], TC3/WO[0], TCC0/WO[2] and AC/CMP[0] alternate functions. |
| 20 | PA19 | bidirectional | General-purpose I/O on the VDDIO supply domain with EXTINT[3], X[7], SERCOM1/SERCOM3 PAD[3], TC3/WO[1], TCC0/WO[3] and AC/CMP[1] alternate functions. |
| 21 | DVDD | power_out | Output of the internal digital 1.8 V voltage regulator that must be bypassed with 100 nF capacitors for stable operation. |
| 22 | PA24 | bidirectional | General-purpose I/O on the VDDIO supply domain with EXTINT[12], SERCOM3/SERCOM5 PAD[2], TC5/WO[0], TCC1/WO[2] and USB_DM alternate functions. |
| 23 | PA25 | bidirectional | General-purpose I/O on the VDDIO supply domain with EXTINT[13], SERCOM3/SERCOM5 PAD[3], TC5/WO[1], TCC1/WO[3] and USB_DP alternate functions. |
| 24 | VDDIO | power_in | Digital I/O supply voltage of 1.8 V to 3.6 V, decoupled with 100 nF and 10 µF capacitors. |
| 25 | PA27 | bidirectional | General-purpose I/O on the VDDIO supply domain with EXTINT[15], SERCOM3/PAD[0] and GCLK_IO[0] alternate functions. |
| 26 | RESET | input | Active-low external reset input with an internal pull-up, where the reset low level threshold is below 0.33 × VDDIO at 1.8 V to 2.0 V and below 0.36 × VDDIO at 2.7 V to 3.6 V. |
| 27 | PA28 | bidirectional | General-purpose I/O on the VDDIO supply domain with EXTINT[8], SERCOM3/PAD[1] and GCLK_IO[0] alternate functions. |
| 28 | GND | power_in | Digital ground connection for the device. |
| 29 | VDDCORE | power_out | Core supply pin for the internal regulator output, which requires decoupling capacitors close to the device. |
| 30 | VDDIN | power_in | Input supply voltage for the device, which is part of the single 1.8 V to 3.6 V supply and requires decoupling capacitors close to the pin. |
| 31 | PA30 | bidirectional | General-purpose I/O on the VDDIO supply domain that carries the SWCLK serial wire debug clock, which needs a 1 kΩ pull-up resistor for reliable operation, with EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0] and GCLK_IO[0] alternate functions. |
| 32 | PA31 | bidirectional | General-purpose I/O on the VDDIO supply domain that carries the SWDIO serial wire debug data pin, with EXTINT[11], SERCOM1/PAD[3] and TCC1/WO[1] alternate functions. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-32-EP(5x5) |
| Category | Radio Frequency Chip/Antenna |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDDIO supply voltage | VDDIO | 1.8 | 3.6 | V | Powers I/O lines, OSC8M and XOSC; same voltage as VDD | 20 | |
| VDDIN supply voltage | VDDIN | 1.8 | 3.6 | V | Powers I/O lines, internal regulator and stacked serial Flash; same voltage as VDD | 20 | |
| VDDANA supply voltage | VDDANA | 1.8 | 3.6 | V | Powers I/O lines, ADC, AC, PTC, OSCULP32K, OSC32K, XOSC32K; same voltage as VDD | 20 | |
| Operating temperature range (MFT package grade) | -40 | 125 | °C | Package Grade F = -40 - 125°C Matte Sn Plating (suffix F in ATSAMR21E18A-MFT) | 6 | ||
| External crystal frequency range (XOSC) | 0.4 | 32 | MHz | Crystal oscillator mode, crystal between XIN and XOUT | 147 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. | 871 |
CAD (KiCad official)
- Symbol:
ATSAMR21E18A-MFT - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
atsamr21e18a-mft-etched.step/atsamr21e18a-mft-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atsamr21e18a-mft.step/atsamr21e18a-mft.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (1200 pp, sha256
1343e1031f25f537, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ATSAMR21E18A-MFT
**Microchip Tech** · RF Transceiver ICs · QFN-32-EP(5x5)
ATSAMR21E18A-MFT from Microchip Tech, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | XTAL2 | output | Output of the integrated AT86RF233 16 MHz reference oscillator amplifier, with parasitic pin capacitance of 3 pF to be counted as crystal load and a DC level of 0.9 V. |
| 2 | XTAL1 | input | Input of the integrated 16 MHz reference oscillator amplifier (XOSCRF), also used as the input pin when an external reference clock is applied, with a DC level of 0.9 V. |
| 3 | GNDANA | power_in | Ground for the analog power domain, which should be separated from the digital ground on the PCB. |
| 4 | VDDANA | power_in | Analog supply voltage of 1.8 V to 3.6 V, decoupled with 100 nF and 10 µF capacitors and optionally isolated from VDD by a ferrite bead. |
| 5 | AVDD | power_out | Output of the internal analog 1.8 V voltage regulator that must be bypassed with 100 nF capacitors for stable operation. |
| 6 | GNDANA | power_in | Ground for the analog power domain, which should be separated from the digital ground on the PCB. |
| 7 | PA06 | bidirectional | General-purpose I/O on the VDDANA supply domain with analog input AIN[6] (function B), EXTINT[6], SERCOM0/PAD[2] and TCC1/WO[0] alternate functions. |
| 8 | PA07 | bidirectional | General-purpose I/O on the VDDANA supply domain with analog input AIN[7] (function B), EXTINT[7], SERCOM0/PAD[3] and TCC1/WO[1] alternate functions. |
| 9 | PA08 | bidirectional | General-purpose I/O on the VDDIO supply domain with I2C, NMI, SERCOM0/SERCOM2 PAD[0], TCC0/WO[0] and FECTRL[0] alternate functions. |
| 10 | PA09 | bidirectional | General-purpose I/O on the VDDIO supply domain with I2C, EXTINT[9], SERCOM0/SERCOM2 PAD[1], TCC0/WO[1] and FECTRL[1] alternate functions. |
| 11 | GNDANA | power_in | Ground for the analog power domain, which should be separated from the digital ground on the PCB. |
| 12 | RFP | passive | Positive side of the differential RF port designed for a 100 Ω differential load, where a DC path to ground or supply is not allowed and the common-mode capacitance to ground must be below 30 pF. |
| 13 | RFN | passive | Negative side of the differential RF port designed for a 100 Ω differential load, where a DC path to ground or supply is not allowed and the common-mode capacitance to ground must be below 30 pF. |
| 14 | GNDANA | power_in | Ground for the analog power domain, which should be separated from the digital ground on the PCB. |
| 15 | PA14 | bidirectional | General-purpose I/O on the VDDIO supply domain that also serves as the XIN input of the main crystal oscillator (XOSC), with EXTINT[14], SERCOM2/PAD[2], TC3/WO[0], FECTRL[4] and GCLK_IO[0] alternate functions. |
| 16 | PA15 | bidirectional | General-purpose I/O on the VDDIO supply domain that also serves as the XOUT output of the main crystal oscillator (XOSC), with EXTINT[15], SERCOM2/PAD[3], TC3/WO[1], FECTRL[5] and GCLK_IO[1] alternate functions. |
| 17 | PA16 | bidirectional | General-purpose I/O on the VDDIO supply domain with I2C, X[4], SERCOM1/SERCOM3 PAD[0], TCC2/WO[0], TCC0/WO[0] and GCLK_IO[2] alternate functions. |
| 18 | PA17 | bidirectional | General-purpose I/O on the VDDIO supply domain with I2C, EXTINT[1], X[5], SERCOM1/SERCOM3 PAD[1], TCC2/WO[1], TCC0/WO[1] and GCLK_IO[3] alternate functions. |
| 19 | PA18 | bidirectional | General-purpose I/O on the VDDIO supply domain with EXTINT[2], X[6], SERCOM1/SERCOM3 PAD[2], TC3/WO[0], TCC0/WO[2] and AC/CMP[0] alternate functions. |
| 20 | PA19 | bidirectional | General-purpose I/O on the VDDIO supply domain with EXTINT[3], X[7], SERCOM1/SERCOM3 PAD[3], TC3/WO[1], TCC0/WO[3] and AC/CMP[1] alternate functions. |
| 21 | DVDD | power_out | Output of the internal digital 1.8 V voltage regulator that must be bypassed with 100 nF capacitors for stable operation. |
| 22 | PA24 | bidirectional | General-purpose I/O on the VDDIO supply domain with EXTINT[12], SERCOM3/SERCOM5 PAD[2], TC5/WO[0], TCC1/WO[2] and USB_DM alternate functions. |
| 23 | PA25 | bidirectional | General-purpose I/O on the VDDIO supply domain with EXTINT[13], SERCOM3/SERCOM5 PAD[3], TC5/WO[1], TCC1/WO[3] and USB_DP alternate functions. |
| 24 | VDDIO | power_in | Digital I/O supply voltage of 1.8 V to 3.6 V, decoupled with 100 nF and 10 µF capacitors. |
| 25 | PA27 | bidirectional | General-purpose I/O on the VDDIO supply domain with EXTINT[15], SERCOM3/PAD[0] and GCLK_IO[0] alternate functions. |
| 26 | RESET | input | Active-low external reset input with an internal pull-up, where the reset low level threshold is below 0.33 × VDDIO at 1.8 V to 2.0 V and below 0.36 × VDDIO at 2.7 V to 3.6 V. |
| 27 | PA28 | bidirectional | General-purpose I/O on the VDDIO supply domain with EXTINT[8], SERCOM3/PAD[1] and GCLK_IO[0] alternate functions. |
| 28 | GND | power_in | Digital ground connection for the device. |
| 29 | VDDCORE | power_out | Core supply pin for the internal regulator output, which requires decoupling capacitors close to the device. |
| 30 | VDDIN | power_in | Input supply voltage for the device, which is part of the single 1.8 V to 3.6 V supply and requires decoupling capacitors close to the pin. |
| 31 | PA30 | bidirectional | General-purpose I/O on the VDDIO supply domain that carries the SWCLK serial wire debug clock, which needs a 1 kΩ pull-up resistor for reliable operation, with EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0] and GCLK_IO[0] alternate functions. |
| 32 | PA31 | bidirectional | General-purpose I/O on the VDDIO supply domain that carries the SWDIO serial wire debug data pin, with EXTINT[11], SERCOM1/PAD[3] and TCC1/WO[1] alternate functions. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-32-EP(5x5) |
| Category | Radio Frequency Chip/Antenna |
| Pins | 33 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDDIO supply voltage | VDDIO | 1.8 | | 3.6 | V | Powers I/O lines, OSC8M and XOSC; same voltage as VDD | 20 |
| VDDIN supply voltage | VDDIN | 1.8 | | 3.6 | V | Powers I/O lines, internal regulator and stacked serial Flash; same voltage as VDD | 20 |
| VDDANA supply voltage | VDDANA | 1.8 | | 3.6 | V | Powers I/O lines, ADC, AC, PTC, OSCULP32K, OSC32K, XOSC32K; same voltage as VDD | 20 |
| Operating temperature range (MFT package grade) | | -40 | | 125 | °C | Package Grade F = -40 - 125°C Matte Sn Plating (suffix F in ATSAMR21E18A-MFT) | 6 |
| External crystal frequency range (XOSC) | | 0.4 | | 32 | MHz | Crystal oscillator mode, crystal between XIN and XOUT | 147 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. | 871 |
## CAD (KiCad official)
- Symbol: `ATSAMR21E18A-MFT`
- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`
- 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files: `atsamr21e18a-mft-etched.step` / `atsamr21e18a-mft-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `atsamr21e18a-mft.step` / `atsamr21e18a-mft.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/atsamr21e18a-mft-datasheet.pdf) (1200 pp, sha256 `1343e1031f25f537`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/atsamr21e18a-mft-datasheet.pdf)