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ATSAML21J18B-AUT

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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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30 Oct 2026RayPublished by the parts factory: tier mfr, 64 pinsfiles match
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  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATSAML21J18B-AUT · TQFP-64(10x10) · 64 pins
  • ✓copper: 64 copper pads, none touching another net
  • ✓datasheet: all 64 pin names found in the 1158-page datasheet
  • ✓distributor: lcsc C2053781, digikey ATSAML21J18B-AUTTR-ND, mouser 556-ATSAML21J18B-AUT
  • ✓family: TQFP-64_10x10mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-husase4n/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 64 pins = 64 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 64 pins agree
  • ✓visibility: public, source open
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ATSAML21J18B-AUT

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-64(10x10)

ATSAML21J18B-AUT from Microchip Tech, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA00 bidirectional PORT I/O pin on the VSWOUT supply, also multiplexed to EXTINT[0]/EXTWAKE[0], SERCOM1 PAD[0], TCC2 WO[0] and the XIN32 32 kHz oscillator input; it is a Backup pin with different properties than normal pins.
2 PA01 bidirectional PORT I/O pin on the VSWOUT supply, also multiplexed to EXTINT[1]/EXTWAKE[1], SERCOM1 PAD[1], TCC2 WO[1] and the XOUT32 32 kHz oscillator output; it is a Backup pin with different properties than normal pins.
3 PA02 bidirectional PORT I/O pin on the VDDANA domain, also multiplexed to EXTINT[2]/EXTWAKE[2], analog AIN[0], PTC Y[0], DAC VOUT[0] and OPAMP OA_NEG[0]; enabling an analog peripheral makes its analog output interfere with the alternative functions of this pin.
4 PA03 bidirectional PORT I/O pin on the VDDANA domain, also multiplexed to EXTINT[3]/EXTWAKE[3], VREFA, analog AIN[1] and PTC Y[1]; enabling an analog peripheral makes its analog output interfere with the alternative functions of this pin.
5 PB04 bidirectional PORT I/O pin on the VDDANA domain, also multiplexed to EXTINT[4], analog AIN[12] and PTC Y[10].
6 PB05 bidirectional PORT I/O pin on the VDDANA domain, also multiplexed to EXTINT[5], analog AIN[13], PTC Y[11] and OPAMP OA_NEG[1].
7 GNDANA power_in Ground for the analog power domain, paired with VDDANA (pin 8).
8 VDDANA power_in Analog supply voltage of 1.6V to 3.6V, decoupled with 100nF and 10µF capacitors, with a ferrite bead to keep VDD noise out of the analog domain.
9 PB06 bidirectional PORT I/O pin on the VDDANA domain, also multiplexed to EXTINT[6], analog AIN[14], PTC Y[12], OPAMP OA_NEG[2] and CCL2 IN[0].
10 PB07 bidirectional PORT I/O pin on the VDDANA domain, also multiplexed to EXTINT[7], analog AIN[15], PTC Y[13] and CCL2 IN[1].
11 PB08 bidirectional PORT I/O pin on the VDDANA domain, also multiplexed to EXTINT[8], analog AIN[2], OPAMP OA_OUT[1], SERCOM4 PAD[0], TC0 WO[0] and CCL2 IN[2]; it is an analog-interference pin when an analog peripheral is enabled.
12 PB09 bidirectional PORT I/O pin on the VDDANA domain, also multiplexed to EXTINT[9], analog AIN[3], PTC Y[15], OPAMP OA_POS[1], SERCOM4 PAD[1], TC0 WO[1] and CCL2 OUT.
13 PA04 bidirectional PORT I/O pin on the VDDANA domain, also multiplexed to EXTINT[4]/EXTWAKE[4], VREFB, analog AIN[4] and AIN[0], OPAMP OA_OUT[2], SERCOM0 PAD[0], TCC0 WO[0] and CCL0 IN[0].
14 PA05 bidirectional PORT I/O pin on the VDDANA domain, also multiplexed to EXTINT[5]/EXTWAKE[5], analog AIN[5] and AIN[1], DAC VOUT[1], OPAMP OA_POS[2], SERCOM0 PAD[1], TCC0 WO[1] and CCL0 IN[1].
15 PA06 bidirectional PORT I/O pin on the VDDANA domain, also multiplexed to EXTINT[6]/EXTWAKE[6], analog AIN[6] and AIN[2], PTC Y[4], OPAMP OA_POS[0], SERCOM0 PAD[2], TCC1 WO[0] and CCL0 IN[2].
16 PA07 bidirectional PORT I/O pin on the VDDANA domain, also multiplexed to EXTINT[7]/EXTWAKE[7], analog AIN[7] and AIN[3], OPAMP OA_OUT[0], SERCOM0 PAD[3], TCC1 WO[1] and CCL0 OUT.
17 PA08 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to NMI, analog AIN[16], PTC X[0]/Y[6], SERCOM0 PAD[0], SERCOM2 PAD[0], TCC0 WO[0], TCC1 WO[2] and CCL1 IN[0]; it is a High Sink pin and supports I2C.
18 PA09 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[9], analog AIN[17], PTC X[1]/Y[7], SERCOM0 PAD[1], SERCOM2 PAD[1], TCC0 WO[1], TCC1 WO[3] and CCL1 IN[1]; it is a High Sink pin and supports I2C.
19 PA10 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[10], analog AIN[18], PTC X[2]/Y[8], SERCOM0 PAD[2], SERCOM2 PAD[2], TCC1 WO[0], TCC0 WO[2], GCLK_IO[4] and CCL1 IN[2].
20 PA11 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[11], analog AIN[19], PTC X[3]/Y[9], SERCOM0 PAD[3], SERCOM2 PAD[3], TCC1 WO[1], TCC0 WO[3], GCLK_IO[5] and CCL1 OUT.
21 VDDIO power_in Digital I/O supply of 1.6V to 3.6V, decoupled with 100nF and 10µF capacitors, paired with GND pin 22.
22 GND power_in Digital ground for the VDDIO domain.
23 PB10 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[10], PTC Y[2], SERCOM4 PAD[2], TC1 WO[0], TCC0 WO[4], GCLK_IO[4] and CCL1 IN[2].
24 PB11 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[11], PTC Y[3], SERCOM4 PAD[3], TC1 WO[1], TCC0 WO[5], GCLK_IO[5] and CCL1 OUT.
25 PB12 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[12], PTC X[12]/Y[5], SERCOM4 PAD[0], TC0 WO[0], TCC0 WO[6] and GCLK_IO[6]; it supports I2C.
26 PB13 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[13], PTC X[13]/Y[14], SERCOM4 PAD[1], TC0 WO[1], TCC0 WO[7] and GCLK_IO[7]; it supports I2C.
27 PB14 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[14], PTC X[14], SERCOM4 PAD[2], TC1 WO[0], GCLK_IO[0] and CCL3 IN[0].
28 PB15 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[15], PTC X[15], SERCOM4 PAD[3], TC1 WO[1], GCLK_IO[1] and CCL3 IN[1].
29 PA12 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[12], SERCOM2 PAD[0], SERCOM4 PAD[0], TCC2 WO[0], TCC0 WO[6] and analog comparator AC CMP[0]; it supports I2C with reduced low-level output current in Sm/Fm modes.
30 PA13 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[13], SERCOM2 PAD[1], SERCOM4 PAD[1], TCC2 WO[1], TCC0 WO[7] and analog comparator AC CMP[1]; it supports I2C with reduced low-level output current in Sm/Fm modes.
31 PA14 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[14], SERCOM2 PAD[2], SERCOM4 PAD[2], TC4 WO[0], TCC0 WO[4] and GCLK_IO[0], and used as the XOSC crystal input XIN.
32 PA15 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[15], SERCOM2 PAD[3], SERCOM4 PAD[3], TC4 WO[1], TCC0 WO[5] and GCLK_IO[1], and used as the XOSC crystal output XOUT.
33 GND power_in Digital ground for the second VDDIO domain, paired with VDDIO pin 34.
34 VDDIO power_in Digital I/O supply of 1.6V to 3.6V, decoupled with 100nF and 10µF capacitors, paired with GND pin 33.
35 PA16 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[0], PTC X[4], SERCOM1 PAD[0], SERCOM3 PAD[0], TCC2 WO[0], TCC0 WO[6], GCLK_IO[2] and CCL0 IN[0]; it is a High Sink pin and supports I2C.
36 PA17 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[1], PTC X[5], SERCOM1 PAD[1], SERCOM3 PAD[1], TCC2 WO[1], TCC0 WO[7], GCLK_IO[3] and CCL0 IN[1]; it is a High Sink pin and supports I2C.
37 PA18 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[2], PTC X[6], SERCOM1 PAD[2], SERCOM3 PAD[2], TC4 WO[0], TCC0 WO[2], analog comparator AC CMP[0] and CCL0 IN[2].
38 PA19 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[3], PTC X[7], SERCOM1 PAD[3], SERCOM3 PAD[3], TC4 WO[1], TCC0 WO[3], analog comparator AC CMP[1] and CCL0 OUT.
39 PB16 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[0], SERCOM5 PAD[0], TC2 WO[0], TCC0 WO[4], GCLK_IO[2] and CCL3 IN[2]; it supports I2C.
40 PB17 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[1], SERCOM5 PAD[1], TC2 WO[1], TCC0 WO[5], GCLK_IO[3] and CCL3 OUT; it supports I2C.
41 PA20 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[4], PTC X[8], SERCOM5 PAD[2], SERCOM3 PAD[2], TC3 WO[0], TCC0 WO[6] and GCLK_IO[4].
42 PA21 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[5], PTC X[9], SERCOM5 PAD[3], SERCOM3 PAD[3], TC3 WO[1], TCC0 WO[7] and GCLK_IO[5].
43 PA22 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[6], PTC X[10], SERCOM3 PAD[0], SERCOM5 PAD[0], TC0 WO[0], TCC0 WO[4], GCLK_IO[6] and CCL2 IN[0]; it is a High Sink pin and supports I2C.
44 PA23 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[7], PTC X[11], SERCOM3 PAD[1], SERCOM5 PAD[1], TC0 WO[1], TCC0 WO[5], the USB 1 kHz SOF output, GCLK_IO[7] and CCL2 IN[1]; it is a High Sink pin and supports I2C.
45 PA24 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[12], SERCOM3 PAD[2], SERCOM5 PAD[2], TC1 WO[0], TCC1 WO[2], USB DM and CCL2 IN[2]; its pull-up/pull-down resistance is 50 to 150 kΩ.
46 PA25 bidirectional PORT I/O pin on the VDDIO supply, also multiplexed to EXTINT[13], SERCOM3 PAD[3], SERCOM5 PAD[3], TC1 WO[1], TCC1 WO[3], USB DP and CCL2 OUT; its pull-up/pull-down resistance is 50 to 150 kΩ.
47 GND power_in Digital ground for the third VDDIO domain, paired with VDDIO pin 48.
48 VDDIO power_in Digital I/O supply of 1.6V to 3.6V, decoupled with 100nF and 10µF capacitors, paired with GND pin 47.
49 PB22 bidirectional PORT I/O pin on the VDDIN supply, also multiplexed to EXTINT[6], SERCOM5 PAD[2], TC3 WO[0], GCLK_IO[0] and CCL0 IN[0].
50 PB23 bidirectional PORT I/O pin on the VDDIN supply, also multiplexed to EXTINT[7], SERCOM5 PAD[3], TC3 WO[1], GCLK_IO[1] and CCL0 OUT.
51 PA27 bidirectional PORT I/O pin on the VDDIN supply, also multiplexed to EXTINT[15] and GCLK_IO[0]; it is a High Sink pin.
52 RESET input Active-low external reset input with an internal pull-up; the low threshold is below 0.33×VDDIO at 1.6-2.0V and below 0.36×VDDIO at 2.7-3.6V, and a 100nF filter capacitor with 330Ω series resistor is recommended for a reset switch.
53 VSW power_out On-chip switching-mode regulator output, which must connect to VDDCORE through a 10µH inductor with saturation current above 150mA and DCR below 1Ω in switching mode and is not connected in linear regulator mode.
54 GND power_in Ground for the VDDIN and core supply domain.
55 VDDCORE power_out Core supply of 0.9V to 1.2V typical, decoupled with 100nF and 1µF capacitors, which is an output in linear regulator mode and an input connected to VSW through the inductor in switched regulator mode.
56 VDDIN power_in Digital supply input of 1.6V to 3.6V, decoupled with 100nF and 10µF capacitors and filtered by a 10µH inductor from the external supply.
57 PA30 bidirectional PORT I/O pin on the VDDIN supply, also multiplexed to EXTINT[10], SERCOM1 PAD[2], TCC1 WO[0], GCLK_IO[0] and CCL1 IN[0], and used as the Serial Wire Debug clock SWCLK.
58 PA31 bidirectional PORT I/O pin on the VDDIN supply, also multiplexed to EXTINT[11], SERCOM1 PAD[3], TCC1 WO[1] and CCL1 OUT, and used as the Serial Wire Debug data pin SWDIO, which is only activated in the presence of a debugger; it is a High Sink pin.
59 PB30 bidirectional PORT I/O pin on the VDDIN supply, also multiplexed to EXTINT[14], SERCOM5 PAD[0], TCC0 WO[0] and TCC1 WO[2]; it supports I2C.
60 PB31 bidirectional PORT I/O pin on the VDDIN supply, also multiplexed to EXTINT[15], SERCOM5 PAD[1], TCC0 WO[1] and TCC1 WO[3]; it supports I2C.
61 PB00 bidirectional Backup-type PORT I/O pin on the VSWOUT supply, also multiplexed to EXTINT[0], analog AIN[8], SERCOM5 PAD[2], TC3 WO[0] and CCL0 IN[1], and used as the SUPC PSOK input.
62 PB01 bidirectional Backup-type PORT I/O pin on the VSWOUT supply, also multiplexed to EXTINT[1], analog AIN[9], SERCOM5 PAD[3], TC3 WO[1] and CCL0 IN[2], and used as the SUPC OUT[0] output.
63 PB02 bidirectional Backup-type PORT I/O pin on the VSWOUT supply, also multiplexed to EXTINT[2], analog AIN[10], SERCOM5 PAD[0], TC2 WO[0] and CCL0 OUT, and used as the SUPC OUT[1] output.
64 PB03 bidirectional Backup-type PORT I/O pin on the VSWOUT supply, also multiplexed to EXTINT[3], analog AIN[11], SERCOM5 PAD[1] and TC2 WO[1], and used as the SUPC VBAT battery supply input.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-64(10x10)
Category Single Chip Microcomputer/Microcontroller
Pins 64

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. 1034

CAD (KiCad official)

  • Symbol: ATSAML21J18B-AUT
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: atsaml21j18b-aut-etched.step / atsaml21j18b-aut-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsaml21j18b-aut.step / atsaml21j18b-aut.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1158 pp, sha256 c7ade1efde79dc98, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF