ATSAML10D14A-MF from Microchip Tech, in a WQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PA31/SWDIO	bidirectional	High Sink GPIO on VDDIO with EXTINT[7], XY[19], SERCOM1/PAD[3], TC1/WO[1] and CCL OUT[1] functions, and SWDIO serial wire debug data.
2	PA00/XIN32	bidirectional	GPIO on VDDANA with EXTINT[0], XY[0], OA1NEG, SERCOM1/PAD[0], TC2/WO[0], also XIN32 32.768 kHz crystal oscillator input or external clock input.
3	PA01/XOUT32	bidirectional	GPIO on VDDANA with EXTINT[1], XY[1], OA1POS, SERCOM1/PAD[1], TC2/WO[1], also XOUT32 32.768 kHz crystal oscillator output.
4	PA02	bidirectional	GPIO on VDDANA with EXTINT[2], ADC AIN[0], XY[2], DAC VOUT, OA0NEG and SERCOM0/PAD[2]; transition time must exceed 50 us to avoid affecting XOSC32 jitter.
5	PA03	bidirectional	GPIO on VDDANA with EXTINT[3], VREFA external reference, ADC AIN[1], XY[3], OA2NEG and SERCOM0/PAD[3].
6	PA04	bidirectional	GPIO on VDDANA with EXTINT[4], VREFB external reference, ADC AIN[2], AC AIN[0], OA2OUT, SERCOM0/PAD[0], TC0/WO[0] and CCL IN[0].
7	PA05	bidirectional	GPIO on VDDANA with EXTINT[5], ADC AIN[3], AC AIN[1], XY[4], OA2POS, SERCOM0/PAD[1], TC0/WO[1] and CCL IN[1].
8	VDDANA	power_in	Analog supply, 1.62V to 3.63V, must be the same voltage as VDDIO, with 100 nF and 10 uF decoupling suggested.
9	GNDANA	power_in	Ground for the analog power domain.
10	PA08	bidirectional	GPIO on VDDIO with NMI, ADC AIN[6], XY[6], SERCOM1/PAD[0], SERCOM2/PAD[0], RTC/IN[0] and CCL IN[3].
11	PA14/XIN	bidirectional	GPIO on VDDIO with EXTINT[3], XY[10], SERCOM0/PAD[2], TC0/WO[0], GCLK_IO[0], also XIN crystal oscillator input or external clock input.
12	PA15/XOUT	bidirectional	GPIO on VDDIO with EXTINT[4], XY[11], SERCOM0/PAD[3], TC0/WO[1], GCLK_IO[1], also XOUT crystal oscillator output.
13	PA16	bidirectional	High Sink GPIO on VDDIO with EXTINT[5], XY[12], SERCOM1/PAD[0], SERCOM0/PAD[0], RTC/IN[2], GCLK_IO[2] and CCL IN[0].
14	PA17	bidirectional	High Sink GPIO on VDDIO with EXTINT[6], XY[13], SERCOM1/PAD[1], SERCOM0/PAD[1], RTC/IN[3], GCLK_IO[3] and CCL IN[1].
15	PA18	bidirectional	GPIO on VDDIO with EXTINT[7], XY[14], SERCOM1/PAD[2], SERCOM0/PAD[2], TC2/WO[0], RTC/OUT[0], AC/CMP[0] and CCL IN[2].
16	PA19	bidirectional	GPIO on VDDIO with EXTINT[0], XY[15], SERCOM1/PAD[3], SERCOM0/PAD[3], TC2/WO[1], RTC/OUT[1], AC/CMP[1] and CCL OUT[0].
17	PA22	bidirectional	High Sink GPIO on VDDIO with EXTINT[1], XY[16], SERCOM0/PAD[0], SERCOM2/PAD[0], TC0/WO[0], RTC/OUT[2] and GCLK_IO[2].
18	PA23	bidirectional	High Sink GPIO on VDDIO with EXTINT[2], XY[17], SERCOM0/PAD[1], SERCOM2/PAD[1], TC0/WO[1], RTC/OUT[3] and GCLK_IO[1].
19	RESET	input	External reset input on VDDIO, active low, with internal pull-up at reset.
20	VDDCORE	power_out	Core supply of 0.9V to 1.2V typical: decoupling pin in linear regulator mode, or core supply input connected to VDDOUT via inductor in switching mode.
21	GND	power_in	Ground.
22	VDDOUT	power_out	On-chip switching regulator output requiring a 10 uH inductor in switching mode; not connected in linear mode.
23	VDDIO	power_in	Digital supply, 1.62V to 3.63V, must equal VDDANA, with 100 nF and 10 uF decoupling suggested.
24	PA30/SWCLK	bidirectional	GPIO on VDDIO with EXTINT[6], XY[18], SERCOM1/PAD[2], TC1/WO[0], CCL IN[3], and SWCLK debug clock (default function, reset state input with pull-up).
25	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	WQFN-24-EP(4x4)
Category	Embedded Processors & Controllers
Pins	25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Max	Unit	Conditions	Page
Operating supply voltage (VDD)	VDD	1.62	3.63	V	VDDIO and VDDANA, same source	1
Operating temperature		-40	125	°C	F grade (-40 to +125°C)	1
CPU operating frequency		0	32	MHz	DC to 32 MHz	1
Core supply voltage range	VDDCORE	0.9	1.2	V		24

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts		tin	indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor.	976

CAD (KiCad official)

Symbol: ATSAML10D14A-MF
Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
3D model: WQFN-24-EP(4x4) (KiCad packages3D, STEP)
3D model files: atsaml10d14a-mf-etched.step / atsaml10d14a-mf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsaml10d14a-mf.step / atsaml10d14a-mf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (1127 pp, sha256 ee9c04451141173b, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

ATSAML10D14A-MF

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3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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