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ATSAMG55J19A-AUT

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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ATSAMG55J19A-AUT

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-64(10x10)

ATSAMG55J19A-AUT from Microchip Tech, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDDIO power_in Peripheral I/O lines, voltage regulator and ADC power supply, specified at 1.62V to 3.6V.
2 NRST bidirectional Microcontroller reset I/O, active low, referenced to VDDIO with a pull-up resistor.
3 PB12 bidirectional Parallel I/O Controller B line PB12, referenced to VDDIO; pulled-up input at reset.
4 PA4 bidirectional Parallel I/O Controller A line PA4, referenced to VDDIO; pulled-up input at reset with no pull-down.
5 PA3 bidirectional Parallel I/O Controller A line PA3, referenced to VDDIO; pulled-up input at reset with no pull-down.
6 PA0 bidirectional Parallel I/O Controller A line PA0, referenced to VDDIO; pulled-up input at reset.
7 PA1 bidirectional Parallel I/O Controller A line PA1, referenced to VDDIO; pulled-up input at reset.
8 PA5 bidirectional Parallel I/O Controller A line PA5, referenced to VDDIO; pulled-up input at reset.
9 VDDCORE power_in Core chip power supply, connected externally to VDDOUT or VDDCOREXT100 or VDDCOREXT120.
10 TEST input Test mode select input, referenced to VDDIO with a pull-down resistor (named TST in Table 3-1).
11 PA7 bidirectional Parallel I/O Controller A line PA7, referenced to VDDIO; pulled-up input at reset.
12 PA8 bidirectional Parallel I/O Controller A line PA8, referenced to VDDIO; pulled-up input at reset.
13 GND power_in Ground.
14 PB15 bidirectional Parallel I/O Controller B line PB15, referenced to VDDIO; pulled-up input at reset.
15 PB14 bidirectional Parallel I/O Controller B line PB14, referenced to VDDIO; pulled-up input at reset.
16 PA31 bidirectional Parallel I/O Controller A line PA31, referenced to VDDIO; pulled-up input at reset.
17 PA6 bidirectional Parallel I/O Controller A line PA6, referenced to VDDIO; pulled-up input at reset.
18 PA16 bidirectional Parallel I/O Controller A line PA16, referenced to VDDIO; pulled-up input at reset.
19 PA30 bidirectional Parallel I/O Controller A line PA30, referenced to VDDIO; pulled-up input at reset.
20 PA29 bidirectional Parallel I/O Controller A line PA29, referenced to VDDIO; pulled-up input at reset.
21 PA28 bidirectional Parallel I/O Controller A line PA28, referenced to VDDIO; pulled-up input at reset.
22 PA15 bidirectional Parallel I/O Controller A line PA15, referenced to VDDIO; pulled-up input at reset.
23 PA23 bidirectional Parallel I/O Controller A line PA23, referenced to VDDIO; pulled-up input at reset.
24 PA22 bidirectional Parallel I/O Controller A line PA22, referenced to VDDIO; pulled-up input at reset.
25 PA21 bidirectional Parallel I/O Controller A line PA21, referenced to VDDIO; pulled-up input at reset.
26 VDDUSB power_in USB power supply, available only on the 64-pin package.
27 VDDIO power_in Peripheral I/O lines, voltage regulator and ADC power supply, specified at 1.62V to 3.6V.
28 ADVREF input ADC voltage reference input, available only on the 64-pin package.
29 GND power_in Ground.
30 VDDOUT power_out Voltage regulator output, specified at 1.08V to 1.32V.
31 VDDIO power_in Peripheral I/O lines, voltage regulator and ADC power supply, specified at 1.62V to 3.6V.
32 VDDIO power_in Peripheral I/O lines, voltage regulator and ADC power supply, specified at 1.62V to 3.6V.
33 PA17 bidirectional Parallel I/O Controller A line PA17, referenced to VDDIO; pulled-up input at reset.
34 PA18 bidirectional Parallel I/O Controller A line PA18, referenced to VDDIO; pulled-up input at reset.
35 PA19 bidirectional Parallel I/O Controller A line PA19, referenced to VDDIO; pulled-up input at reset.
36 PA20 bidirectional Parallel I/O Controller A line PA20, referenced to VDDIO; pulled-up input at reset.
37 PB0 bidirectional Parallel I/O Controller B line PB0, referenced to VDDIO; pulled-up input at reset.
38 PB1 bidirectional Parallel I/O Controller B line PB1, referenced to VDDIO; pulled-up input at reset.
39 PB2 bidirectional Parallel I/O Controller B line PB2, referenced to VDDIO; pulled-up input at reset.
40 PB3 bidirectional Parallel I/O Controller B line PB3, referenced to VDDIO; pulled-up input at reset.
41 PA14 bidirectional Parallel I/O Controller A line PA14, referenced to VDDIO; pulled-up input at reset with no pull-down.
42 PA13 bidirectional Parallel I/O Controller A line PA13, referenced to VDDIO; pulled-up input at reset.
43 PA12 bidirectional Parallel I/O Controller A line PA12, referenced to VDDIO; pulled-up input at reset.
44 PA11 bidirectional Parallel I/O Controller A line PA11, referenced to VDDIO; pulled-up input at reset.
45 VDDCORE power_in Core chip power supply, connected externally to VDDOUT or VDDCOREXT100 or VDDCOREXT120.
46 PB10 bidirectional Parallel I/O Controller B line PB10, referenced to VDDIO; pulled-up input at reset.
47 PB11 bidirectional Parallel I/O Controller B line PB11, referenced to VDDIO; pulled-up input at reset.
48 PA10 bidirectional Parallel I/O Controller A line PA10, referenced to VDDIO; pulled-up input at reset.
49 PA9 bidirectional Parallel I/O Controller A line PA9, referenced to VDDIO; pulled-up input at reset.
50 PB5 bidirectional Parallel I/O Controller B line PB5, referenced to VDDIO; pulled-up input at reset.
51 PA27 bidirectional Parallel I/O Controller A line PA27, referenced to VDDIO; pulled-up input at reset.
52 PA26 bidirectional Parallel I/O Controller A line PA26, referenced to VDDIO; pulled-up input at reset.
53 GND power_in Ground.
54 PB6 bidirectional Parallel I/O Controller B line PB6, referenced to VDDIO; pulled-up input at reset.
55 PB7 bidirectional Parallel I/O Controller B line PB7, referenced to VDDIO; pulled-up input at reset.
56 PA25 bidirectional Parallel I/O Controller A line PA25, referenced to VDDIO; pulled-up input at reset.
57 PB13 bidirectional Parallel I/O Controller B line PB13, referenced to VDDIO; pulled-up input at reset.
58 PA24 bidirectional Parallel I/O Controller A line PA24, referenced to VDDIO; pulled-up input at reset.
59 PB8/XOUT bidirectional Parallel I/O Controller B line PB8 shared with main oscillator output XOUT; pull-up disabled on PB8/PB9.
60 PB9/XIN bidirectional Parallel I/O Controller B line PB9 shared with main oscillator input XIN, referenced to VDDIO; pull-up disabled on PB8/PB9.
61 PA2 bidirectional Parallel I/O Controller A line PA2, referenced to VDDIO; pulled-up input at reset.
62 PB4 bidirectional Parallel I/O Controller B line PB4, referenced to VDDIO; pulled-up input at reset.
63 JTAGSEL input JTAG selection input, active high, referenced to VDDIO with a pull-down resistor.
64 VDDIO power_in Peripheral I/O lines, voltage regulator and ADC power supply, specified at 1.62V to 3.6V.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package LQFP-64(10x10)
Category Single Chip Microcomputer/Microcontroller
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Peripheral I/O, voltage regulator and ADC supply voltage (VDDIO) VDDIO 1.62 3.6 V Printed as 1.62V to 3.6V in Table 3-1 (signal description) and in the device summary; no separate recommended operating conditions table is given 6
Voltage regulator output voltage (VDDOUT) VDDOUT 1.08 1.32 V Printed as 1.08V to 1.32V in Table 3-1 (voltage regulator output) 6
Operating temperature range (industrial) -40 85 °C Industrial grade, as printed for the ordering codes in Table 6-1 (ATSAMG55J19A-AUT is the A-revision, reel, LQFP64 entry) 14
Maximum CPU / bus clock frequency (fMAX) fMAX 120 MHz 120 MHz with VDDCOREXT120 or with VDDCORE trimmed by regulator (note 1 of the features list) 2

CAD (KiCad official)

  • Symbol: ATSAMG55J19A-AUT
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: atsamg55j19a-aut-etched.step / atsamg55j19a-aut-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsamg55j19a-aut.step / atsamg55j19a-aut.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (16 pp, sha256 f9261aacb7b11e9f, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF