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README

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ATSAMD51G18A-MUT

Microchip Tech · Pre-ordered MCUs · QFN-48-EP(7x7)

ATSAMD51G18A-MUT from Microchip Tech, in a QFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA00 bidirectional General-purpose I/O PA00 (PORT group A, bit 0), alternately EIC EXTINT[0], SERCOM1 PAD[0] or TC2 WO[0] per the 48-pin multiplexing table.
2 PA01 bidirectional General-purpose I/O PA01, alternately EIC EXTINT[1], SERCOM1 PAD[1] or TC2 WO[1] per the 48-pin multiplexing table.
3 PA02 bidirectional General-purpose I/O PA02, alternately EIC EXTINT[2], ADC0 AIN[0] or DAC VOUT[0] per the 48-pin multiplexing table.
4 PA03 bidirectional General-purpose I/O PA03, alternately EIC EXTINT[3], ANAREF VREFA, ADC0 AIN[1] or PTC X0/Y0 per the 48-pin multiplexing table.
5 GNDANA power_in Analog ground pin of the 48-pin VQFN, listed in the pinout figure.
6 VDDANA power_in Analog supply pin of the 48-pin VQFN; the device operating range is stated as 1.71 V to 3.63 V.
7 PB08 bidirectional General-purpose I/O PB08, alternately EIC EXTINT[8], ADC0 AIN[2], ADC1 AIN[0] or SERCOM4 PAD[0] per the 48-pin multiplexing table.
8 PB09 bidirectional General-purpose I/O PB09, alternately EIC EXTINT[9], ADC0 AIN[3], ADC1 AIN[1] or SERCOM4 PAD[1] per the 48-pin multiplexing table.
9 PA04 bidirectional General-purpose I/O PA04, alternately EIC EXTINT[4], ANAREF VREFB, ADC0 AIN[4] or AC AIN[0] per the 48-pin multiplexing table.
10 PA05 bidirectional General-purpose I/O PA05, alternately EIC EXTINT[5], ADC0 AIN[5], AC AIN[1] or DAC VOUT[1] per the 48-pin multiplexing table.
11 PA06 bidirectional General-purpose I/O PA06, alternately EIC EXTINT[6], ANAREF VREFC, ADC0 AIN[6] or AC AIN[2] per the 48-pin multiplexing table.
12 PA07 bidirectional General-purpose I/O PA07, alternately EIC EXTINT[7], ADC0 AIN[7] or AC AIN[3] per the 48-pin multiplexing table.
13 PA08 bidirectional General-purpose I/O PA08 and a high-sink pin with different properties from regular pins (Table 6-1 note 3); alternately EIC NMI, ADC0 AIN[8], SERCOM0 PAD[0] or TCC0 WO[0].
14 PA09 bidirectional General-purpose I/O PA09 and a high-sink pin with different properties from regular pins (Table 6-1 note 3); alternately EIC EXTINT[9], ADC0 AIN[9], SERCOM0 PAD[1] or TCC0 WO[1].
15 PA10 bidirectional General-purpose I/O PA10, alternately EIC EXTINT[10], ADC0 AIN[10], SERCOM0 PAD[2] or TCC0 WO[2] per the 48-pin multiplexing table.
16 PA11 bidirectional General-purpose I/O PA11, alternately EIC EXTINT[11], ADC0 AIN[11], SERCOM0 PAD[3] or TCC0 WO[3] per the 48-pin multiplexing table.
17 VDDIO power_in I/O supply pin of the 48-pin VQFN; the device operating range is stated as 1.71 V to 3.63 V.
18 GND power_in Ground pin of the 48-pin VQFN; the exposed pad should also be connected to ground on the PCB.
19 PB10 bidirectional General-purpose I/O PB10, alternately EIC EXTINT[10], SERCOM4 PAD[2], TC5 WO[0] or TCC0 WO[4] per the 48-pin multiplexing table.
20 PB11 bidirectional General-purpose I/O PB11, alternately EIC EXTINT[11], SERCOM4 PAD[3], TC5 WO[1] or TCC0 WO[5] per the 48-pin multiplexing table.
21 PA12 bidirectional General-purpose I/O PA12, a high-sink pin with different properties from regular pins (Table 6-1 note 3); its peripheral mapping is on a page not included in the provided text.
22 PA13 bidirectional General-purpose I/O PA13, a high-sink pin with different properties from regular pins (Table 6-1 note 3); its peripheral mapping is on a page not included in the provided text.
23 PA14 bidirectional General-purpose I/O PA14, which is the XIN pin of crystal oscillator XOSC0 per Table 6-2.
24 PA15 bidirectional General-purpose I/O PA15, which is the XOUT pin of crystal oscillator XOSC0 per Table 6-2.
25 PA16 bidirectional General-purpose I/O PA16, a high-sink pin with different properties from regular pins (Table 6-1 note 3); its peripheral mapping is on a page not included in the provided text.
26 PA17 bidirectional General-purpose I/O PA17, a high-sink pin with different properties from regular pins (Table 6-1 note 3); its peripheral mapping is on a page not included in the provided text.
27 PA18 bidirectional General-purpose I/O PA18; its peripheral mapping is on a page not included in the provided text.
28 PA19 bidirectional General-purpose I/O PA19; its peripheral mapping is on a page not included in the provided text.
29 PA20 bidirectional General-purpose I/O PA20, alternately EIC EXTINT[4], PTC X14/Y14, SERCOM3 PAD[2] or TC7 WO[0] per the 48-pin multiplexing table.
30 PA21 bidirectional General-purpose I/O PA21, alternately EIC EXTINT[5], PTC X15/Y15, SERCOM3 PAD[3] or TC7 WO[1] per the 48-pin multiplexing table.
31 PA22 bidirectional General-purpose I/O PA22, a high-sink pin with different properties from regular pins (Table 6-1 note 3); alternately EIC EXTINT[6], PTC X16/Y16, SERCOM3 PAD[0] or TC4 WO[0].
32 PA23 bidirectional General-purpose I/O PA23, a high-sink pin with different properties from regular pins (Table 6-1 note 3); alternately EIC EXTINT[7], PTC X17/Y17, SERCOM3 PAD[1] or TC4 WO[1].
33 PA24 bidirectional General-purpose I/O PA24, alternately EIC EXTINT[8], USB DM, SERCOM3 PAD[2] or TC5 WO[0] per the 48-pin multiplexing table.
34 PA25 bidirectional General-purpose I/O PA25, alternately EIC EXTINT[9], USB DP, SERCOM3 PAD[3] or TC5 WO[1] per the 48-pin multiplexing table.
35 GND power_in Ground pin of the 48-pin VQFN.
36 VDDIO power_in I/O supply pin of the 48-pin VQFN; the device operating range is stated as 1.71 V to 3.63 V.
37 PB22 bidirectional General-purpose I/O PB22, alternately EIC EXTINT[6], SERCOM1 PAD[2], TC7 WO[0] or USB SOF_1KHZ; it is also the XIN pin of XOSC1 per Table 6-2.
38 PB23 bidirectional General-purpose I/O PB23, alternately EIC EXTINT[7], SERCOM1 PAD[3], TC7 WO[1] or GCLK IO[1]; it is also the XOUT pin of XOSC1 per Table 6-2.
39 PA27 bidirectional General-purpose I/O PA27, alternately EIC EXTINT[11], PTC X18/Y18 or GCLK IO[1] per the 48-pin multiplexing table.
40 RESETN input Active-low external reset input (RESETN pin) for the device, per Table 5-1 and Section 12.4.
41 VDDCORE power_in Core supply pin of the 48-pin VQFN, shown in the pinout figure; its connection requirements are in Section 7, which is not in the provided text.
42 GND power_in Ground pin of the 48-pin VQFN.
43 VSW power_out Pin VSW of the 48-pin VQFN, shown in the pinout figure; the datasheet features list an embedded Buck/LDO regulator, but the pin's connection requirements are in Section 7, which is not in the provided text.
44 VDDIO power_in I/O supply pin of the 48-pin VQFN; the device operating range is stated as 1.71 V to 3.63 V.
45 PA30 bidirectional General-purpose I/O PA30, which is the SWCLK pin of the Serial Wire Debug interface per Table 6-4, and also EIC EXTINT[14], TC6 WO[0] or GCLK IO[0].
46 PA31 bidirectional General-purpose I/O PA31, which is the SWDIO pin of the Serial Wire Debug interface per Table 6-4, and also EIC EXTINT[15], TC6 WO[1] or TCC2 WO[1].
47 PB02 bidirectional General-purpose I/O PB02, alternately EIC EXTINT[2], ADC0 AIN[14], PTC X20/Y20 or CCL OUT[0]; it is also listed for XOSC32K jitter minimization in Table 6-3 and as RTC IN1 in Table 6-7.
48 PB03 bidirectional General-purpose I/O PB03, alternately EIC EXTINT[3], ADC0 AIN[15], PTC X21/Y21, SERCOM5 PAD[1] or TC6 WO[1] per the 48-pin multiplexing table.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-48-EP(7x7)
Category Embedded Processors & Controllers
Pins 49

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDDIO (I/O, XOSCn, regulator input) VDDIO 1.71 3.63 V 46
Supply voltage VDDANA (I/O, ADC0/1, AC, DAC, PTC) VDDANA 1.71 3.63 V 46
Supply voltage VDDIOB (I/O B lines) VDDIOB 1.71 3.63 V 46
Supply voltage VBAT (Automatic Power Switch) VBAT 1.71 3.63 V 46
Internal core voltage VDDCORE (regulator output, linear mode) VDDCORE 1.2 V 46
Operating temperature, industrial grade U (-40°C to +85°C) -40 85 °C Grade U, 1.71V to 3.63V, DC to 120 MHz 1
Maximum CPU operating frequency, grade U 120 MHz 1.71V to 3.63V, -40°C to +85°C 1

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pet nu1RBase nu1 I Crypto RAM u2RLength Base of R Base of R value filled repetitively with u4FillValue 1316
contacts tin including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the Self Capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. 1697

CAD (KiCad official)

  • Symbol: ATSAMD51G18A-MUT
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: QFN-48-EP(7x7) (KiCad packages3D, STEP)
  • 3D model files: atsamd51g18a-mut-etched.step / atsamd51g18a-mut-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsamd51g18a-mut.step / atsamd51g18a-mut.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1934 pp, sha256 6f02ccc3e69325ab, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF