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ATSAMD21J18A-AU

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Microchip Tech MICROCHIP, TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersatsamd21j18a-aufactory-2.0.0extractor-text

Verified ATSAMD21J18A-AU

by Ray · last 31 Oct 2026 · 1 record · files match
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Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 64 pinsfiles match
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  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATSAMD21J18A-AU · TQFP-64(10x10) · 64 pins
  • ✓copper: 64 copper pads, none touching another net
  • ✓datasheet: all 64 pin names found in the 1202-page datasheet
  • ✓distributor: lcsc C967932, digikey ATSAMD21J18A-AU-ND, mouser 556-ATSAMD21J18A-AU
  • ✓family: TQFP-64_10x10mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-haurily_/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 64 pins = 64 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 64 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ atsamd21j18a-au.kicad_sym✓ atsamd21j18a-au.kicad_mod✓ atsamd21j18a-au.step
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Contents

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ATSAMD21J18A-AU

Microchip Tech · MICROCHIP · TQFP-64(10x10)

ATSAMD21J18A-AU from Microchip Tech, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA00 bidirectional GPIO on VDDANA with EXTINT[0], SERCOM1/PAD[0] and TCC2/WO[0]; also XIN32 for the 32kHz crystal oscillator.
2 PA01 bidirectional GPIO on VDDANA with EXTINT[1], SERCOM1/PAD[1] and TCC2/WO[1]; also XOUT32 for the 32kHz crystal oscillator.
3 PA02 bidirectional GPIO on VDDANA with EXTINT[2], ADC AIN[0], PTC Y[0], DAC VOUT and TCC3/WO[0].
4 PA03 bidirectional GPIO on VDDANA with EXTINT[3], ADC/DAC external reference VREFA, ADC AIN[1], PTC Y[1] and TCC3/WO[1].
5 PB04 bidirectional GPIO on VDDANA with EXTINT[4], ADC AIN[12] and PTC Y[10].
6 PB05 bidirectional GPIO on VDDANA with EXTINT[5], ADC AIN[13] and PTC Y[11].
7 GNDANA power_in Ground for the analog power domain.
8 VDDANA power_in Analog supply, 1.62V-3.63V, decoupled with 100nF and 10µF (ferrite bead from VDD recommended).
9 PB06 bidirectional GPIO on VDDANA with EXTINT[6], ADC AIN[14] and PTC Y[12].
10 PB07 bidirectional GPIO on VDDANA with EXTINT[7], ADC AIN[15] and PTC Y[13].
11 PB08 bidirectional GPIO on VDDANA with EXTINT[8], ADC AIN[2], PTC Y[14], SERCOM4/PAD[0], TC4/WO[0] and TCC3/WO[6].
12 PB09 bidirectional GPIO on VDDANA with EXTINT[9], ADC AIN[3], PTC Y[15], SERCOM4/PAD[1], TC4/WO[1] and TCC3/WO[7].
13 PA04 bidirectional GPIO on VDDANA with EXTINT[4], ADC/VREFB, ADC AIN[4], AC AIN[0], PTC Y[2], SERCOM0/PAD[0], TCC0/WO[0] and TCC3/WO[2].
14 PA05 bidirectional GPIO on VDDANA with EXTINT[5], ADC AIN[5], AC AIN[1], PTC Y[3], SERCOM0/PAD[1], TCC0/WO[1] and TCC3/WO[3].
15 PA06 bidirectional GPIO on VDDANA with EXTINT[6], ADC AIN[6], AC AIN[2], PTC Y[4], SERCOM0/PAD[2], TCC1/WO[0] and TCC3/WO[4].
16 PA07 bidirectional GPIO on VDDANA with EXTINT[7], ADC AIN[7], AC AIN[3], PTC Y[5], SERCOM0/PAD[3], TCC1/WO[1], TCC3/WO[5] and I2S/SD[0].
17 PA08 bidirectional GPIO on VDDIO with NMI, ADC AIN[16], PTC X[0], SERCOM0/PAD[0] or SERCOM2/PAD[0], TCC0/WO[0], TCC1/WO[2] and I2S/SD[1]; supports I2C Hs mode.
18 PA09 bidirectional GPIO on VDDIO with EXTINT[9], ADC AIN[17], PTC X[1], SERCOM0/PAD[1] or SERCOM2/PAD[1], TCC0/WO[1], TCC1/WO[3] and I2S/MCK[0]; supports I2C Hs mode.
19 PA10 bidirectional GPIO on VDDIO with EXTINT[10], ADC AIN[18], PTC X[2], SERCOM0/PAD[2] or SERCOM2/PAD[2], TCC1/WO[0], TCC0/WO[2], I2S/SCK[0] and GCLK_IO[4].
20 PA11 bidirectional GPIO on VDDIO with EXTINT[11], ADC AIN[19], PTC X[3], SERCOM0/PAD[3] or SERCOM2/PAD[3], TCC1/WO[1], TCC0/WO[3], I2S/FS[0] and GCLK_IO[5].
21 VDDIO power_in Digital I/O supply, 1.62V-3.63V, decoupled with 100nF and 10µF.
22 GND power_in Digital ground.
23 PB10 bidirectional GPIO on VDDIO with EXTINT[10], SERCOM4/PAD[2], TC5/WO[0], TCC0/WO[4], I2S/MCK[1] and GCLK_IO[4].
24 PB11 bidirectional GPIO on VDDIO with EXTINT[11], SERCOM4/PAD[3], TC5/WO[1], TCC0/WO[5], I2S/SCK[1] and GCLK_IO[5].
25 PB12 bidirectional GPIO on VDDIO with EXTINT[12], PTC X[12], SERCOM4/PAD[0], TC4/WO[0], TCC0/WO[6], I2S/FS[1] and GCLK_IO[6]; supports I2C Hs mode.
26 PB13 bidirectional GPIO on VDDIO with EXTINT[13], PTC X[13], SERCOM4/PAD[1], TC4/WO[1], TCC0/WO[7] and GCLK_IO[7]; supports I2C Hs mode.
27 PB14 bidirectional GPIO on VDDIO with EXTINT[14], PTC X[14], SERCOM4/PAD[2], TC5/WO[0] and GCLK_IO[0].
28 PB15 bidirectional GPIO on VDDIO with EXTINT[15], PTC X[15], SERCOM4/PAD[3], TC5/WO[1] and GCLK_IO[1].
29 PA12 bidirectional GPIO on VDDIO with EXTINT[12], SERCOM2/PAD[0] or SERCOM4/PAD[0], TCC2/WO[0], TCC0/WO[6] and AC/CMP[0]; supports I2C Hs mode.
30 PA13 bidirectional GPIO on VDDIO with EXTINT[13], SERCOM2/PAD[1] or SERCOM4/PAD[1], TCC2/WO[1], TCC0/WO[7] and AC/CMP[1]; supports I2C Hs mode.
31 PA14 bidirectional GPIO on VDDIO with EXTINT[14], SERCOM2/PAD[2] or SERCOM4/PAD[2], TC3/WO[0], TCC0/WO[4] and GCLK_IO[0]; also XIN for the crystal oscillator.
32 PA15 bidirectional GPIO on VDDIO with EXTINT[15], SERCOM2/PAD[3] or SERCOM4/PAD[3], TC3/WO[1], TCC0/WO[5] and GCLK_IO[1]; also XOUT for the crystal oscillator.
33 GND power_in Digital ground.
34 VDDIO power_in Digital I/O supply, 1.62V-3.63V, decoupled with 100nF and 10µF.
35 PA16 bidirectional GPIO on VDDIO with EXTINT[0], PTC X[4], SERCOM1/PAD[0] or SERCOM3/PAD[0], TCC2/WO[0], TCC0/WO[6] and GCLK_IO[2]; supports I2C Hs mode.
36 PA17 bidirectional GPIO on VDDIO with EXTINT[1], PTC X[5], SERCOM1/PAD[1] or SERCOM3/PAD[1], TCC2/WO[1], TCC0/WO[7] and GCLK_IO[3]; supports I2C Hs mode.
37 PA18 bidirectional GPIO on VDDIO with EXTINT[2], PTC X[6], SERCOM1/PAD[2] or SERCOM3/PAD[2], TC3/WO[0], TCC0/WO[2] and AC/CMP[0].
38 PA19 bidirectional GPIO on VDDIO with EXTINT[3], PTC X[7], SERCOM1/PAD[3] or SERCOM3/PAD[3], TC3/WO[1], TCC0/WO[3], I2S/SD[0] and AC/CMP[1].
39 PB16 bidirectional GPIO on VDDIO with EXTINT[0], SERCOM5/PAD[0], TC6/WO[0], TCC0/WO[4], I2S/SD[1] and GCLK_IO[2]; supports I2C Hs mode.
40 PB17 bidirectional GPIO on VDDIO with EXTINT[1], SERCOM5/PAD[1], TC6/WO[1], TCC0/WO[5], I2S/MCK[0] and GCLK_IO[3]; supports I2C Hs mode.
41 PA20 bidirectional GPIO on VDDIO with EXTINT[4], PTC X[8], SERCOM5/PAD[2] or SERCOM3/PAD[2], TC7/WO[0], TCC0/WO[6], I2S/SCK[0] and GCLK_IO[4].
42 PA21 bidirectional GPIO on VDDIO with EXTINT[5], PTC X[9], SERCOM5/PAD[3] or SERCOM3/PAD[3], TC7/WO[1], TCC0/WO[7], I2S/FS[0] and GCLK_IO[5].
43 PA22 bidirectional GPIO on VDDIO with EXTINT[6], PTC X[10], SERCOM3/PAD[0] or SERCOM5/PAD[0], TC4/WO[0], TCC0/WO[4] and GCLK_IO[6]; supports I2C Hs mode.
44 PA23 bidirectional GPIO on VDDIO with EXTINT[7], PTC X[11], SERCOM3/PAD[1] or SERCOM5/PAD[1], TC4/WO[1], TCC0/WO[5], USB SOF 1kHz output and GCLK_IO[7]; supports I2C Hs mode.
45 PA24 bidirectional GPIO on VDDIO with EXTINT[12], SERCOM3/PAD[2] or SERCOM5/PAD[2], TC5/WO[0], TCC1/WO[2] and USB DM; if unconnected, enable a pull-up in input GPIO mode to avoid extra consumption (<1mA).
46 PA25 bidirectional GPIO on VDDIO with EXTINT[13], SERCOM3/PAD[3] or SERCOM5/PAD[3], TC5/WO[1], TCC1/WO[3] and USB DP; if unconnected, enable a pull-up in input GPIO mode to avoid extra consumption (<1mA).
47 GND power_in Digital ground.
48 VDDIO power_in Digital I/O supply, 1.62V-3.63V, decoupled with 100nF and 10µF.
49 PB22 bidirectional GPIO on VDDIO with EXTINT[6], SERCOM5/PAD[2], TC7/WO[0], TCC3/WO[0] and GCLK_IO[0].
50 PB23 bidirectional GPIO on VDDIO with EXTINT[7], SERCOM5/PAD[3], TC7/WO[1], TCC3/WO[1] and GCLK_IO[1].
51 PA27 bidirectional GPIO on VDDIO with EXTINT[15], TCC3/WO[6] and GCLK_IO[0].
52 RESET input Active-low external reset input with internal pull-up; low threshold below 0.33VDDIO (VDDIO 1.6-2.0V) or 0.36VDDIO (VDDIO 2.7-3.6V).
53 PA28 bidirectional GPIO on VDDIO with EXTINT[8], TCC3/WO[7] and GCLK_IO[0].
54 GND power_in Digital ground.
55 VDDCORE power_out Regulated core supply output (1.6V to 1.8V) from the internal regulator, requires 1µF external decoupling.
56 VDDIN power_in Voltage regulator input supply, 1.62V-3.63V.
57 PA30 bidirectional GPIO on VDDIO with EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0], TCC3/WO[4] and GCLK_IO[0]; also SWCLK serial wire debug clock (1kΩ pull-up recommended).
58 PA31 bidirectional GPIO on VDDIO with EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1] and TCC3/WO[5]; becomes SWDIO serial wire debug data when a debugger is present.
59 PB30 bidirectional GPIO on VDDIO with EXTINT[14], SERCOM5/PAD[0], TCC0/WO[0] and TCC1/WO[2]; supports I2C Hs mode.
60 PB31 bidirectional GPIO on VDDIO with EXTINT[15], SERCOM5/PAD[1], TCC0/WO[1] and TCC1/WO[3]; supports I2C Hs mode.
61 PB00 bidirectional GPIO on VDDANA with EXTINT[0], ADC AIN[8], PTC Y[6], SERCOM5/PAD[2] and TC7/WO[0].
62 PB01 bidirectional GPIO on VDDANA with EXTINT[1], ADC AIN[9], PTC Y[7], SERCOM5/PAD[3] and TC7/WO[1].
63 PB02 bidirectional GPIO on VDDANA with EXTINT[2], ADC AIN[10], PTC Y[8], SERCOM5/PAD[0], TC6/WO[0] and TCC3/WO[2].
64 PB03 bidirectional GPIO on VDDANA with EXTINT[3], ADC AIN[11], PTC Y[9], SERCOM5/PAD[1], TC6/WO[1] and TCC3/WO[3].

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating voltage VDD 1.62 3.63 V VDDIO, VDDIN and VDDANA must be the same voltage 2
Operating temperature (U grade) -40 85 °C U = -40 - 85°C Matte Sn Plating 15
CPU clock frequency 48 MHz ARM Cortex-M0+ CPU running at up to 48 MHz 1
Internal regulated core voltage VDDCORE 1.2 V Internal regulated voltage output 35

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin configurations, including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. 977

CAD (KiCad official)

  • Symbol: ATSAMD21J18A-AU
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: atsamd21j18a-au-etched.step / atsamd21j18a-au-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsamd21j18a-au.step / atsamd21j18a-au.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1202 pp, sha256 655d8381f8c852a0, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF