component

ATSAMD21J17A-MU

Public Made by Adom

by adom

Microchip Tech Pre-ordered MCUs, QFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersatsamd21j17a-mufactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7d ago
viewers atsamd21j17a-mu: viewers · Ray 7d ago
atsamd21j17a-mu-etched.glb Publish 0.1.0 · Ray 7d ago
atsamd21j17a-mu-etched.step atsamd21j17a-mu: factory component page (tier=mfr) · Ray 7d ago
atsamd21j17a-mu-hero.glb atsamd21j17a-mu: hero GLB from the etched model (keeps the MPN mark) · Ray 7d ago
atsamd21j17a-mu-hero.overlay.json Publish 0.1.0 · Ray 7d ago
atsamd21j17a-mu.glb Publish 0.1.0 · Ray 7d ago
atsamd21j17a-mu.kicad_mod Publish 0.1.0 · Ray 7d ago
atsamd21j17a-mu.kicad_sym Publish 0.1.0 · Ray 7d ago
atsamd21j17a-mu.lbr Publish 0.1.0 · Ray 7d ago
atsamd21j17a-mu.step Publish 0.1.0 · Ray 7d ago
package.json Publish 0.1.0 · Ray 7d ago
page.json Set visibility: public · Ray 7d ago
README.md Publish 0.1.0 · Ray 7d ago

ATSAMD21J17A-MU

Microchip Tech · Pre-ordered MCUs · QFN-64-EP(9x9)

ATSAMD21J17A-MU from Microchip Tech, in a QFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA00 bidirectional Port A general-purpose I/O pin on VDDANA, also EXTINT[0] and the XIN32 32kHz crystal input.
2 PA01 bidirectional Port A general-purpose I/O pin on VDDANA, also EXTINT[1] and the XOUT32 32kHz crystal output.
3 PA02 bidirectional Port A general-purpose I/O pin on VDDANA with analog input AIN[0], DAC output VOUT and EXTINT[2].
4 PA03 bidirectional Port A general-purpose I/O pin on VDDANA with analog input AIN[1], ADC/DAC reference VREFA and EXTINT[3].
5 PB04 bidirectional Port B general-purpose I/O pin on VDDANA with analog input AIN[12] and EXTINT[4].
6 PB05 bidirectional Port B general-purpose I/O pin on VDDANA with analog input AIN[13] and EXTINT[5].
7 GNDANA power_in Ground for the analog section of the device.
8 VDDANA power_in Analog supply pin for the ADC, DAC and analog comparators; the SAM D21 operating range is 1.62V to 3.63V.
9 PB06 bidirectional Port B general-purpose I/O pin on VDDANA with analog input AIN[14] and EXTINT[6].
10 PB07 bidirectional Port B general-purpose I/O pin on VDDANA with analog input AIN[15] and EXTINT[7].
11 PB08 bidirectional Port B general-purpose I/O pin on VDDANA with analog input AIN[2], SERCOM4 PAD[0] and EXTINT[8].
12 PB09 bidirectional Port B general-purpose I/O pin on VDDANA with analog input AIN[3], SERCOM4 PAD[1] and EXTINT[9].
13 PA04 bidirectional Port A general-purpose I/O pin on VDDANA with analog input AIN[4], SERCOM0 PAD[0] and EXTINT[4].
14 PA05 bidirectional Port A general-purpose I/O pin on VDDANA with analog input AIN[5], SERCOM0 PAD[1] and EXTINT[5].
15 PA06 bidirectional Port A general-purpose I/O pin on VDDANA with analog input AIN[6], SERCOM0 PAD[2] and EXTINT[6].
16 PA07 bidirectional Port A general-purpose I/O pin on VDDANA with analog input AIN[7], SERCOM0 PAD[3] and EXTINT[7].
17 PA08 bidirectional Port A general-purpose I/O pin on VDDIO with NMI, analog input AIN[16], SERCOM0/SERCOM2 PAD[0] and TCC0 WO[0].
18 PA09 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[9], analog input AIN[17], SERCOM0/SERCOM2 PAD[1] and TCC0 WO[1].
19 PA10 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[10], analog input AIN[18], SERCOM0/SERCOM2 PAD[2] and I2S MCK[0].
20 PA11 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[11], analog input AIN[19], SERCOM0/SERCOM2 PAD[3] and I2S SCK[0].
21 VDDIO power_in Digital I/O supply for the port pins; the SAM D21 operating range is 1.62V to 3.63V.
22 GND power_in Digital ground for the device.
23 PB10 bidirectional Port B general-purpose I/O pin on VDDIO with EXTINT[10], SERCOM4 PAD[2], TC5 WO[0] and I2S MCK[1].
24 PB11 bidirectional Port B general-purpose I/O pin on VDDIO with EXTINT[11], SERCOM4 PAD[3], TC5 WO[1] and I2S SCK[1].
25 PB12 bidirectional Port B general-purpose I/O pin on VDDIO with EXTINT[12], PTC X[12], SERCOM4 PAD[0] and I2S FS[1].
26 PB13 bidirectional Port B general-purpose I/O pin on VDDIO with EXTINT[13], PTC X[13], SERCOM4 PAD[1] and GCLK_IO[7].
27 PB14 bidirectional Port B general-purpose I/O pin on VDDIO with EXTINT[14], PTC X[14], SERCOM4 PAD[2] and TC5 WO[0].
28 PB15 bidirectional Port B general-purpose I/O pin on VDDIO with EXTINT[15], PTC X[15], SERCOM4 PAD[3] and TC5 WO[1].
29 PA12 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[12], SERCOM2/SERCOM4 PAD[0], TCC2 WO[0] and analog comparator output AC CMP[0].
30 PA13 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[13], SERCOM2/SERCOM4 PAD[1], TCC2 WO[1] and analog comparator output AC CMP[1].
31 PA14 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[14], SERCOM2/SERCOM4 PAD[2], and the XIN crystal input for XOSC.
32 PA15 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[15], SERCOM2/SERCOM4 PAD[3], and the XOUT crystal output for XOSC.
33 GND power_in Digital ground for the device.
34 VDDIO power_in Digital I/O supply for the port pins; the SAM D21 operating range is 1.62V to 3.63V.
35 PA16 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[0], PTC X[4], SERCOM1/SERCOM3 PAD[0] and TCC2 WO[0].
36 PA17 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[1], PTC X[5], SERCOM1/SERCOM3 PAD[1] and TCC2 WO[1].
37 PA18 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[2], PTC X[6], SERCOM1/SERCOM3 PAD[2] and analog comparator output AC CMP[0].
38 PA19 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[3], PTC X[7], SERCOM1/SERCOM3 PAD[3] and analog comparator output AC CMP[1].
39 PB16 bidirectional Port B general-purpose I/O pin on VDDIO with EXTINT[0], SERCOM5 PAD[0], TC6 WO[0] and I2S SD[1].
40 PB17 bidirectional Port B general-purpose I/O pin on VDDIO with EXTINT[1], SERCOM5 PAD[1], TC6 WO[1] and I2S MCK[0].
41 PA20 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[4], PTC X[8], SERCOM5/SERCOM3 PAD[2] and I2S SCK[0].
42 PA21 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[5], PTC X[9], SERCOM5/SERCOM3 PAD[3] and I2S FS[0].
43 PA22 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[6], PTC X[10], SERCOM3/SERCOM5 PAD[0] and TC4 WO[0].
44 PA23 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[7], PTC X[11], SERCOM3/SERCOM5 PAD[1] and USB SOF 1kHz.
45 PA24 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[12], SERCOM3/SERCOM5 PAD[2] and USB DM; the pin has no drive strength option and a pull-up is recommended if unconnected.
46 PA25 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[13], SERCOM3/SERCOM5 PAD[3] and USB DP; the pin has no drive strength option and a pull-up is recommended if unconnected.
47 GND power_in Digital ground for the device.
48 VDDIO power_in Digital I/O supply for the port pins; the SAM D21 operating range is 1.62V to 3.63V.
49 PB22 bidirectional Port B general-purpose I/O pin on VDDIO with EXTINT[6], SERCOM5 PAD[2], TC7 WO[0] and TCC3 WO[0].
50 PB23 bidirectional Port B general-purpose I/O pin on VDDIO with EXTINT[7], SERCOM5 PAD[3], TC7 WO[1] and TCC3 WO[1].
51 PA27 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[15], TCC3 WO[6] and GCLK_IO[0].
52 RESET input External reset input (active low) for the device.
53 PA28 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[8], TCC3 WO[7] and GCLK_IO[0].
54 GND power_in Digital ground for the device.
55 VDDCORE power_out Regulated output supply of the internal voltage regulator that feeds the core logic.
56 VDDIN power_in Input supply to the internal voltage regulator; the SAM D21 operating range is 1.62V to 3.63V.
57 PA30 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[10], SERCOM1 PAD[2], TCC1 WO[0], TCC3 WO[4], and the SWCLK debug clock.
58 PA31 bidirectional Port A general-purpose I/O pin on VDDIO with EXTINT[11], SERCOM1 PAD[3], TCC1 WO[1], TCC3 WO[5], and the SWDIO debug data (active only with a debugger present).
59 PB30 bidirectional Port B general-purpose I/O pin on VDDIO with EXTINT[14], SERCOM5 PAD[0], TCC0 WO[0] and TCC1 WO[2].
60 PB31 bidirectional Port B general-purpose I/O pin on VDDIO with EXTINT[15], SERCOM5 PAD[1], TCC0 WO[1] and TCC1 WO[3].
61 PB00 bidirectional Port B general-purpose I/O pin on VDDANA with EXTINT[0], analog input AIN[8], PTC Y[6], SERCOM5 PAD[2] and TC7 WO[0].
62 PB01 bidirectional Port B general-purpose I/O pin on VDDANA with EXTINT[1], analog input AIN[9], PTC Y[7], SERCOM5 PAD[3] and TC7 WO[1].
63 PB02 bidirectional Port B general-purpose I/O pin on VDDANA with EXTINT[2], analog input AIN[10], PTC Y[8], SERCOM5 PAD[0] and TC6 WO[0].
64 PB03 bidirectional Port B general-purpose I/O pin on VDDANA with EXTINT[3], analog input AIN[11], PTC Y[9], SERCOM5 PAD[1] and TC6 WO[1].
65 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-64-EP(9x9)
Category Embedded Processors & Controllers
Pins 65

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. 859

CAD (KiCad official)

  • Symbol: ATSAMD21J17A-MU
  • Footprint: Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • 3D model: QFN-64-EP(9x9) (KiCad packages3D, STEP)
  • 3D model files: atsamd21j17a-mu-etched.step / atsamd21j17a-mu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsamd21j17a-mu.step / atsamd21j17a-mu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1148 pp, sha256 18ca1ccab5aa330f, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF