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ATSAMD21J16B-AFT

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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrolleratsamd21j16b-aftfactory-2.0.0extractor-text

Verified ATSAMD21J16B-AFT

by Ray · last 30 Oct 2026 · 1 record · files match
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Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 64 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATSAMD21J16B-AFT · TQFP-64(10x10) · 64 pins
  • ✓copper: 64 copper pads, none touching another net
  • ✓datasheet: all 64 pin names found in the 1115-page datasheet
  • ✓distributor: lcsc C2054861, digikey ATSAMD21J16B-AFTTR-ND, mouser 556-ATSAMD21J16B-AFT
  • ✓family: TQFP-64_10x10mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-w3xf9qxc/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 64 pins = 64 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 64 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ atsamd21j16b-aft.kicad_sym✓ atsamd21j16b-aft.kicad_mod✓ atsamd21j16b-aft.step
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Contents

README

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ATSAMD21J16B-AFT

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-64(10x10)

ATSAMD21J16B-AFT from Microchip Tech, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA00 bidirectional Port A general-purpose I/O on the VDDANA domain, with EXTINT[0] external interrupt and the XIN32 32 kHz crystal input function when XOSC32K is used.
2 PA01 bidirectional Port A general-purpose I/O on the VDDANA domain, with EXTINT[1] external interrupt and the XOUT32 32 kHz crystal output function when XOSC32K is used.
3 PA02 bidirectional Port A general-purpose I/O on the VDDANA domain, with EXTINT[2], analog input AIN[0], PTC input Y[0], DAC output VOUT and TCC3/WO[0].
4 PA03 bidirectional Port A general-purpose I/O on the VDDANA domain, with EXTINT[3], analog input AIN[1], PTC input Y[1], ADC/DAC external reference VREFA and TCC3/WO[1].
5 PB04 bidirectional Port B general-purpose I/O on the VDDANA domain, with EXTINT[4], analog input AIN[12] and PTC input Y[10].
6 PB05 bidirectional Port B general-purpose I/O on the VDDANA domain, with EXTINT[5], analog input AIN[13] and PTC input Y[11].
7 GNDANA power_in Ground for the analog power domain.
8 VDDANA power_in Analog supply voltage, 1.62V to 3.63V, to be decoupled with 100nF and 10µF capacitors close to the device.
9 PB06 bidirectional Port B general-purpose I/O on the VDDANA domain, with EXTINT[6], analog input AIN[14] and PTC input Y[12].
10 PB07 bidirectional Port B general-purpose I/O on the VDDANA domain, with EXTINT[7], analog input AIN[15] and PTC input Y[13].
11 PB08 bidirectional Port B general-purpose I/O on the VDDANA domain, with EXTINT[8], analog input AIN[2], PTC input Y[14], SERCOM4/PAD[0], TC4/WO[0] and TCC3/WO[6].
12 PB09 bidirectional Port B general-purpose I/O on the VDDANA domain, with EXTINT[9], analog input AIN[3], PTC input Y[15], SERCOM4/PAD[1], TC4/WO[1] and TCC3/WO[7].
13 PA04 bidirectional Port A general-purpose I/O on the VDDANA domain, with EXTINT[4], analog inputs AIN[4] and AIN[0], ADC external reference VREFB, PTC input Y[2], SERCOM0/PAD[0] and TCC0/WO[0].
14 PA05 bidirectional Port A general-purpose I/O on the VDDANA domain, with EXTINT[5], analog inputs AIN[5] and AIN[1], PTC input Y[3], SERCOM0/PAD[1] and TCC0/WO[1].
15 PA06 bidirectional Port A general-purpose I/O on the VDDANA domain, with EXTINT[6], analog inputs AIN[6] and AIN[2], PTC input Y[4], SERCOM0/PAD[2] and TCC1/WO[0].
16 PA07 bidirectional Port A general-purpose I/O on the VDDANA domain, with EXTINT[7], analog inputs AIN[7] and AIN[3], PTC input Y[5], SERCOM0/PAD[3] and TCC1/WO[1].
17 PA08 bidirectional Port A general-purpose I/O on the VDDIO domain, with NMI, analog input AIN[16], PTC input X[0], SERCOM0/SERCOM2 PAD[0], TCC0/WO[0] and I2C-capable SERCOM pad.
18 PA09 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[9], analog input AIN[17], PTC input X[1], SERCOM0/SERCOM2 PAD[1] and TCC0/WO[1].
19 PA10 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[10], analog input AIN[18], PTC input X[2], SERCOM0/SERCOM2 PAD[2], TCC1/WO[0] and GCLK_IO[4].
20 PA11 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[11], analog input AIN[19], PTC input X[3], SERCOM0/SERCOM2 PAD[3], TCC1/WO[1] and GCLK_IO[5].
21 VDDIO power_in Digital supply voltage, 1.62V to 3.63V, decoupled with 100nF and 10µF capacitors close to the device.
22 GND power_in Digital ground reference for the device.
23 PB10 bidirectional Port B general-purpose I/O on the VDDIO domain, with EXTINT[10], SERCOM4/PAD[2], TC5/WO[0] and TCC0/WO[4].
24 PB11 bidirectional Port B general-purpose I/O on the VDDIO domain, with EXTINT[11], SERCOM4/PAD[3], TC5/WO[1] and TCC0/WO[5].
25 PB12 bidirectional Port B general-purpose I/O on the VDDIO domain, with EXTINT[12], PTC input X[12], SERCOM4/PAD[0], TC4/WO[0] and TCC0/WO[6].
26 PB13 bidirectional Port B general-purpose I/O on the VDDIO domain, with EXTINT[13], PTC input X[13], SERCOM4/PAD[1], TC4/WO[1] and TCC0/WO[7].
27 PB14 bidirectional Port B general-purpose I/O on the VDDIO domain, with EXTINT[14], PTC input X[14], SERCOM4/PAD[2] and TC5/WO[0].
28 PB15 bidirectional Port B general-purpose I/O on the VDDIO domain, with EXTINT[15], PTC input X[15], SERCOM4/PAD[3] and TC5/WO[1].
29 PA12 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[12], SERCOM2/SERCOM4 PAD[0], TCC2/WO[0], TCC0/WO[6] and analog comparator output AC/CMP[0].
30 PA13 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[13], SERCOM2/SERCOM4 PAD[1], TCC2/WO[1], TCC0/WO[7] and analog comparator output AC/CMP[1].
31 PA14 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[14], SERCOM2/SERCOM4 PAD[2], TC3/WO[0], TCC0/WO[4] and the XIN crystal input of the XOSC oscillator.
32 PA15 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[15], SERCOM2/SERCOM4 PAD[3], TC3/WO[1], TCC0/WO[5] and the XOUT crystal output of the XOSC oscillator.
33 GND power_in Digital ground reference for the device.
34 VDDIO power_in Digital supply voltage, 1.62V to 3.63V, decoupled with 100nF and 10µF capacitors close to the device.
35 PA16 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[0], PTC input X[4], SERCOM1/SERCOM3 PAD[0], TCC2/WO[0], TCC0/WO[6] and GCLK_IO[2].
36 PA17 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[1], PTC input X[5], SERCOM1/SERCOM3 PAD[1], TCC2/WO[1], TCC0/WO[7] and GCLK_IO[3].
37 PA18 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[2], PTC input X[6], SERCOM1/SERCOM3 PAD[2], TC3/WO[0], TCC0/WO[2] and analog comparator output AC/CMP[0].
38 PA19 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[3], PTC input X[7], SERCOM1/SERCOM3 PAD[3], TC3/WO[1], TCC0/WO[3] and analog comparator output AC/CMP[1].
39 PB16 bidirectional Port B general-purpose I/O on the VDDIO domain, with EXTINT[0], SERCOM5/PAD[0], TC6/WO[0] and TCC0/WO[4].
40 PB17 bidirectional Port B general-purpose I/O on the VDDIO domain, with EXTINT[1], SERCOM5/PAD[1], TC6/WO[1] and TCC0/WO[5].
41 PA20 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[4], PTC input X[8], SERCOM5/SERCOM3 PAD[2], TC7/WO[0] and TCC0/WO[6].
42 PA21 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[5], PTC input X[9], SERCOM5/SERCOM3 PAD[3], TC7/WO[1] and TCC0/WO[7].
43 PA22 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[6], PTC input X[10], SERCOM3/SERCOM5 PAD[0], TC4/WO[0], TCC0/WO[4] and I2C high-speed capable SERCOM pad.
44 PA23 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[7], PTC input X[11], SERCOM3/SERCOM5 PAD[1], TC4/WO[1], TCC0/WO[5], USB SOF 1kHz output and GCLK_IO[7].
45 PA24 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[12], SERCOM3/SERCOM5 PAD[2], TC5/WO[0], TCC1/WO[2] and USB DM; if left unconnected, a pull-up should be enabled through input GPIO mode to avoid up to 1mA extra consumption.
46 PA25 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[13], SERCOM3/SERCOM5 PAD[3], TC5/WO[1], TCC1/WO[3] and USB DP; if left unconnected, a pull-up should be enabled through input GPIO mode to avoid up to 1mA extra consumption.
47 GND power_in Digital ground reference for the device.
48 VDDIO power_in Digital supply voltage, 1.62V to 3.63V, decoupled with 100nF and 10µF capacitors close to the device.
49 PB22 bidirectional Port B general-purpose I/O on the VDDIO domain, with EXTINT[6], SERCOM5/PAD[2], TC7/WO[0], TCC3/WO[0] and GCLK_IO[0].
50 PB23 bidirectional Port B general-purpose I/O on the VDDIO domain, with EXTINT[7], SERCOM5/PAD[3], TC7/WO[1], TCC3/WO[1] and GCLK_IO[1].
51 PA27 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[15], TCC3/WO[6] and GCLK_IO[0].
52 RESET input External active-low reset input with an internal pull-up resistor; an external pull-up is optional.
53 PA28 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[8], TCC3/WO[7] and GCLK_IO[0].
54 GND power_in Digital ground reference for the device.
55 VDDCORE power_out Regulated core supply output of 1.6V to 1.8V from the internal regulator, requiring a 1µF decoupling capacitor close to the device.
56 VDDIN power_in Input supply pin for the device, which operates from a single 1.62V to 3.63V supply.
57 PA30 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0], TCC3/WO[4], GCLK_IO[0] and SWCLK debug clock pin.
58 PA31 bidirectional Port A general-purpose I/O on the VDDIO domain, with EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1], TCC3/WO[5] and SWDIO, which is only activated in the presence of a debugger.
59 PB30 bidirectional Port B general-purpose I/O on the VDDIO domain, with EXTINT[14], SERCOM5/PAD[0], TCC0/WO[0] and TCC1/WO[2].
60 PB31 bidirectional Port B general-purpose I/O on the VDDIO domain, with EXTINT[15], SERCOM5/PAD[1], TCC0/WO[1] and TCC1/WO[3].
61 PB00 bidirectional Port B general-purpose I/O on the VDDANA domain, with EXTINT[0], analog input AIN[8], PTC input Y[6], SERCOM5/PAD[2] and TC7/WO[0].
62 PB01 bidirectional Port B general-purpose I/O on the VDDANA domain, with EXTINT[1], analog input AIN[9], PTC input Y[7], SERCOM5/PAD[3] and TC7/WO[1].
63 PB02 bidirectional Port B general-purpose I/O on the VDDANA domain, with EXTINT[2], analog input AIN[10], PTC input Y[8], SERCOM5/PAD[0], TC6/WO[0] and TCC3/WO[2].
64 PB03 bidirectional Port B general-purpose I/O on the VDDANA domain, with EXTINT[3], analog input AIN[11], PTC input Y[9], SERCOM5/PAD[1], TC6/WO[1] and TCC3/WO[3].

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-64(10x10)
Category Single Chip Microcomputer/Microcontroller
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, VDDIO (I/O lines, OSC8M, XOSC) VDDIO 1.62 3.63 V 36
Supply voltage, VDDIN (I/O lines and internal regulator) VDDIN 1.62 3.63 V 36
Supply voltage, VDDANA (I/O lines, ADC, AC, DAC, PTC, oscillators) VDDANA 1.62 3.63 V 36
Operating temperature range, package grade F (-40 - 125°C Matte Sn plating) -40 125 °C Ordering code grade F 17

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. 860

CAD (KiCad official)

  • Symbol: ATSAMD21J16B-AFT
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: atsamd21j16b-aft-etched.step / atsamd21j16b-aft-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsamd21j16b-aft.step / atsamd21j16b-aft.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1115 pp, sha256 89dcd7e783742e44, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF