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ATSAMD21G17A-AU

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Microchip Tech Pre-ordered MCUs, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersatsamd21g17a-aufactory-2.0.0extractor-text

Verified ATSAMD21G17A-AU

by Ray · last 30 Oct 2026 · 1 record · files match
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Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 48 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATSAMD21G17A-AU · TQFP-48(7x7) · 48 pins
  • ✓copper: 48 copper pads, none touching another net
  • ✓datasheet: all 48 pin names found in the 1115-page datasheet
  • ✓distributor: lcsc C1341489, digikey ATSAMD21G17A-AU-ND, mouser 556-ATSAMD21G17A-AU
  • ✓family: TQFP-48_7x7mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-0g1e4n3r/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 48 pins = 48 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 48 pins agree
  • ✓visibility: public, source open
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Verified files✓ atsamd21g17a-au.kicad_sym✓ atsamd21g17a-au.kicad_mod✓ atsamd21g17a-au.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 5d ago
viewers atsamd21g17a-au: viewers · Ray 5d ago
atsamd21g17a-au-etched.glb Publish 0.1.0 · Ray 5d ago
atsamd21g17a-au-etched.step atsamd21g17a-au: factory component page (tier=mfr) · Ray 5d ago
atsamd21g17a-au-hero.glb atsamd21g17a-au: hero GLB from the etched model (keeps the MPN mark) · Ray 5d ago
atsamd21g17a-au-hero.overlay.json Publish 0.1.0 · Ray 5d ago
atsamd21g17a-au.glb Publish 0.1.0 · Ray 5d ago
atsamd21g17a-au.kicad_mod Publish 0.1.0 · Ray 5d ago
atsamd21g17a-au.kicad_sym Publish 0.1.0 · Ray 5d ago
atsamd21g17a-au.lbr Publish 0.1.0 · Ray 5d ago
atsamd21g17a-au.step Publish 0.1.0 · Ray 5d ago
package.json Publish 0.1.0 · Ray 5d ago
page.json Set visibility: public · Ray 5d ago
README.md Publish 0.1.0 · Ray 5d ago
verification.json Verified: Published by the parts factory: tier mfr, 48 pins · Ray 5d ago

ATSAMD21G17A-AU

Microchip Tech · Pre-ordered MCUs · TQFP-48(7x7)

ATSAMD21G17A-AU from Microchip Tech, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA00 bidirectional Port A I/O pin 0 supplied from VDDANA, also EXTINT[0] and the XIN32 32 kHz crystal input per Table 7-3.
2 PA01 bidirectional Port A I/O pin 1 supplied from VDDANA, also EXTINT[1] and the XOUT32 32 kHz crystal output per Table 7-3.
3 PA02 bidirectional Port A I/O pin 2 supplied from VDDANA with analog functions (EXTINT[2], ADC AIN[0], PTC Y[0], DAC VOUT) on peripheral function B.
4 PA03 bidirectional Port A I/O pin 3 supplied from VDDANA with analog functions (EXTINT[3], ADC AIN[1] and VREFA, DAC VREFA, PTC Y[1]) on peripheral function B.
5 GNDANA power_in Ground for the analog power domain (VDDANA).
6 VDDANA power_in Analog supply voltage; the SAM D21 operates from a single supply of 1.62 V to 3.63 V and VDDANA should be decoupled per the schematic checklist.
7 PB08 bidirectional Port B I/O pin 8 supplied from VDDANA, also EXTINT[8], ADC AIN[2], PTC Y[14], SERCOM4/PAD[0] and TC4/WO[0].
8 PB09 bidirectional Port B I/O pin 9 supplied from VDDANA, also EXTINT[9], ADC AIN[3], PTC Y[15], SERCOM4/PAD[1] and TC4/WO[1].
9 PA04 bidirectional Port A I/O pin 4 supplied from VDDANA, also EXTINT[4], ADC VREFB and AIN[4], PTC Y[2] and SERCOM0/PAD[0].
10 PA05 bidirectional Port A I/O pin 5 supplied from VDDANA, also EXTINT[5], ADC AIN[5], PTC Y[3] and SERCOM0/PAD[1].
11 PA06 bidirectional Port A I/O pin 6 supplied from VDDANA, also EXTINT[6], ADC AIN[6], PTC Y[4] and SERCOM0/PAD[2].
12 PA07 bidirectional Port A I/O pin 7 supplied from VDDANA, also EXTINT[7], ADC AIN[7], PTC Y[5] and SERCOM0/PAD[3].
13 PA08 bidirectional Port A I/O pin 8 supplied from VDDIO, also NMI, ADC AIN[16], PTC X[0], SERCOM0/PAD[0] and SERCOM2/PAD[0]; it supports SERCOM I2C High-speed mode.
14 PA09 bidirectional Port A I/O pin 9 supplied from VDDIO, also EXTINT[9], ADC AIN[17], PTC X[1], SERCOM0/PAD[1] and SERCOM2/PAD[1]; it supports SERCOM I2C High-speed mode.
15 PA10 bidirectional Port A I/O pin 10 supplied from VDDIO, also EXTINT[10], ADC AIN[18], PTC X[2], SERCOM0/PAD[2], SERCOM2/PAD[2] and TCC1/WO[0].
16 PA11 bidirectional Port A I/O pin 11 supplied from VDDIO, also EXTINT[11], ADC AIN[19], PTC X[3], SERCOM0/PAD[3], SERCOM2/PAD[3] and TCC1/WO[1].
17 VDDIO power_in Digital I/O supply voltage of 1.62 V to 3.63 V, to be decoupled with 100 nF and 10 µF capacitors per the schematic checklist.
18 GND power_in Digital ground for the VDDIO domain.
19 PB10 bidirectional Port B I/O pin 10 supplied from VDDIO, also EXTINT[10], SERCOM4/PAD[2], TC5/WO[0], TCC0/WO[4] and I2S MCK[1].
20 PB11 bidirectional Port B I/O pin 11 supplied from VDDIO, also EXTINT[11], SERCOM4/PAD[3], TC5/WO[1], TCC0/WO[5] and I2S SCK[1].
21 PA12 bidirectional Port A I/O pin 12 supplied from VDDIO, also EXTINT[12], SERCOM2/PAD[0], SERCOM4/PAD[0], AC/CMP[0] and TCC0/WO[6]; it supports SERCOM I2C High-speed mode.
22 PA13 bidirectional Port A I/O pin 13 supplied from VDDIO, also EXTINT[13], SERCOM2/PAD[1], SERCOM4/PAD[1], AC/CMP[1] and TCC0/WO[7]; it supports SERCOM I2C High-speed mode.
23 PA14 bidirectional Port A I/O pin 14 supplied from VDDIO, also EXTINT[14], the XIN crystal input per Table 7-3, SERCOM2/PAD[2], SERCOM4/PAD[2], TC3/WO[0] and GCLK_IO[0].
24 PA15 bidirectional Port A I/O pin 15 supplied from VDDIO, also EXTINT[15], the XOUT crystal output per Table 7-3, SERCOM2/PAD[3], SERCOM4/PAD[3], TC3/WO[1] and GCLK_IO[1].
25 PA16 bidirectional Port A I/O pin 16 supplied from VDDIO, also EXTINT[0], PTC X[4], SERCOM1/PAD[0], SERCOM3/PAD[0], TCC2/WO[0] and GCLK_IO[2]; it supports SERCOM I2C High-speed mode.
26 PA17 bidirectional Port A I/O pin 17 supplied from VDDIO, also EXTINT[1], PTC X[5], SERCOM1/PAD[1], SERCOM3/PAD[1], TCC2/WO[1] and GCLK_IO[3]; it supports SERCOM I2C High-speed mode.
27 PA18 bidirectional Port A I/O pin 18 supplied from VDDIO, also EXTINT[2], PTC X[6], SERCOM1/PAD[2], SERCOM3/PAD[2], TC3/WO[0] and AC/CMP[0].
28 PA19 bidirectional Port A I/O pin 19 supplied from VDDIO, also EXTINT[3], PTC X[7], SERCOM1/PAD[3], SERCOM3/PAD[3], TC3/WO[1] and AC/CMP[1].
29 PA20 bidirectional Port A I/O pin 20 supplied from VDDIO, also EXTINT[4], PTC X[8], SERCOM5/PAD[2], SERCOM3/PAD[2], TCC0/WO[6] and GCLK_IO[4].
30 PA21 bidirectional Port A I/O pin 21 supplied from VDDIO, also EXTINT[5], PTC X[9], SERCOM5/PAD[3], SERCOM3/PAD[3], TCC0/WO[7] and GCLK_IO[5].
31 PA22 bidirectional Port A I/O pin 22 supplied from VDDIO, also EXTINT[6], PTC X[10], SERCOM3/PAD[0], SERCOM5/PAD[0], TC4/WO[0], TCC0/WO[4] and GCLK_IO[6]; it supports SERCOM I2C High-speed mode.
32 PA23 bidirectional Port A I/O pin 23 supplied from VDDIO, also EXTINT[7], PTC X[11], SERCOM3/PAD[1], SERCOM5/PAD[1], TC4/WO[1], TCC0/WO[5], USB SOF 1kHz and GCLK_IO[7]; it supports SERCOM I2C High-speed mode.
33 PA24 bidirectional Port A I/O pin 24 supplied from VDDIO, used as USB DM, also EXTINT[12], SERCOM3/PAD[2], SERCOM5/PAD[2] and TC5/WO[0]; it has no drive strength option and a pull-up through input GPIO mode is recommended if the pin is unconnected (footnote 6).
34 PA25 bidirectional Port A I/O pin 25 supplied from VDDIO, used as USB DP, also EXTINT[13], SERCOM3/PAD[3], SERCOM5/PAD[3] and TC5/WO[1]; it has no drive strength option and a pull-up through input GPIO mode is recommended if the pin is unconnected (footnote 6).
35 GND power_in Digital ground for the VDDIO domain.
36 VDDIO power_in Digital I/O supply voltage of 1.62 V to 3.63 V, to be decoupled per the schematic checklist.
37 PB22 bidirectional Port B I/O pin 22 supplied from VDDIO, also EXTINT[6], SERCOM5/PAD[2], TCC3/WO[0] and GCLK_IO[0].
38 PB23 bidirectional Port B I/O pin 23 supplied from VDDIO, also EXTINT[7], SERCOM5/PAD[3], TCC3/WO[1] and GCLK_IO[1].
39 PA27 bidirectional Port A I/O pin 27 supplied from VDDIO, also EXTINT[15], TCC3/WO[6] and GCLK_IO[0].
40 RESET input External active-low reset input with an internal pull-up; it must be pulled below 0.33 × VDDIO at 1.6 V to 2.0 V VDDIO or below 0.36 × VDDIO at 2.7 V to 3.6 V VDDIO.
41 PA28 bidirectional Port A I/O pin 28 supplied from VDDIO, also EXTINT[8], TCC3/WO[7] and GCLK_IO[0].
42 GND power_in Digital ground for the VDDIO domain.
43 VDDCORE power_out Regulated core supply output of 1.6 V to 1.8 V, requiring a 1 µF decoupling capacitor close to the pin.
44 VDDIN power_in Input supply for the internal voltage regulator, operating within the single 1.62 V to 3.63 V supply range.
45 PA30 bidirectional Port A I/O pin 30 supplied from VDDIO, also EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0], TCC3/WO[4], GCLK_IO[0] and SWCLK (debug interface, mapped per Table 7-4).
46 PA31 bidirectional Port A I/O pin 31 supplied from VDDIO, also EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1], TCC3/WO[5] and SWDIO, which is only activated when a debugger is present.
47 PB02 bidirectional Port B I/O pin 2 supplied from VDDANA, also EXTINT[2], ADC AIN[10], PTC Y[8], SERCOM5/PAD[0] and TCC3/WO[2]; TC6 is not available on SAM D21 G devices.
48 PB03 bidirectional Port B I/O pin 3 supplied from VDDANA, also EXTINT[3], ADC AIN[11], PTC Y[9], SERCOM5/PAD[1] and TCC3/WO[3]; TC6 is not available on SAM D21 G devices.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating voltage (SAM D21 family) VDD 1.62 3.63 V SAM D21 operating voltage; same voltage on VDDIN, VDDIO and VDDANA 2
Operating temperature (package grade U, -40 to 85°C) -40 85 °C Package grade U = -40 - 85°C Matte Sn Plating (ordering information) 17

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. 860

CAD (KiCad official)

  • Symbol: ATSAMD21G17A-AU
  • Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
  • 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: atsamd21g17a-au-etched.step / atsamd21g17a-au-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsamd21g17a-au.step / atsamd21g17a-au.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1115 pp, sha256 c6d97462f2439487, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF