component

ATSAMD21G16B-MU

Public Made by Adom

by adom

Microchip Tech Pre-ordered MCUs, QFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersatsamd21g16b-mufactory-2.0.0extractor-text

Verified ATSAMD21G16B-MU

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 49 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATSAMD21G16B-MU · QFN-48-EP(7x7) · 49 pins
  • ✓copper: 49 copper pads, none touching another net
  • ✓datasheet: all 49 pin names found in the 1148-page datasheet
  • ✓distributor: lcsc C614467, digikey ATSAMD21G16B-MU-ND, mouser 556-ATSAMD21G16B-MU
  • ✓family: QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-v7b7d35x/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.1073)
  • ✓pads: 49 pins = 49 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 49 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ atsamd21g16b-mu.kicad_sym✓ atsamd21g16b-mu.kicad_mod✓ atsamd21g16b-mu.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 5d ago
viewers atsamd21g16b-mu: viewers · Ray 5d ago
atsamd21g16b-mu-etched.glb Publish 0.1.0 · Ray 5d ago
atsamd21g16b-mu-etched.step atsamd21g16b-mu: factory component page (tier=mfr) · Ray 5d ago
atsamd21g16b-mu-hero.glb atsamd21g16b-mu: hero GLB from the etched model (keeps the MPN mark) · Ray 5d ago
atsamd21g16b-mu-hero.overlay.json Publish 0.1.0 · Ray 5d ago
atsamd21g16b-mu.glb Publish 0.1.0 · Ray 5d ago
atsamd21g16b-mu.kicad_mod Publish 0.1.0 · Ray 5d ago
atsamd21g16b-mu.kicad_sym Publish 0.1.0 · Ray 5d ago
atsamd21g16b-mu.lbr Publish 0.1.0 · Ray 5d ago
atsamd21g16b-mu.step Publish 0.1.0 · Ray 5d ago
package.json Publish 0.1.0 · Ray 5d ago
page.json Set visibility: public · Ray 5d ago
README.md Publish 0.1.0 · Ray 5d ago
verification.json Verified: Published by the parts factory: tier mfr, 49 pins · Ray 5d ago

ATSAMD21G16B-MU

Microchip Tech · Pre-ordered MCUs · QFN-48-EP(7x7)

ATSAMD21G16B-MU from Microchip Tech, in a QFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA00 bidirectional General-purpose I/O on VDDANA with EXTINT[0], SERCOM1/PAD[0] and TCC2/WO[0] functions, and XIN32 for the 32kHz crystal oscillator.
2 PA01 bidirectional General-purpose I/O on VDDANA with EXTINT[1], SERCOM1/PAD[1] and TCC2/WO[1] functions, and XOUT32 for the 32kHz crystal oscillator.
3 PA02 bidirectional General-purpose I/O on VDDANA with EXTINT[2], ADC AIN[0], PTC Y[0] and DAC VOUT functions.
4 PA03 bidirectional General-purpose I/O on VDDANA with EXTINT[3], ADC/DAC VREFA, ADC AIN[1] and PTC Y[1] functions.
5 GNDANA power_in Analog ground; supplies the VDDANA I/O cluster.
6 VDDANA power_in Analog supply for the analog I/O pins (PA00-PA07, PB00-PB05, PB08-PB09).
7 PB08 bidirectional General-purpose I/O on VDDANA with EXTINT[8], ADC AIN[2], PTC Y[14], SERCOM4/PAD[0] and TC4/WO[0] functions.
8 PB09 bidirectional General-purpose I/O on VDDANA with EXTINT[9], ADC AIN[3], PTC Y[15], SERCOM4/PAD[1] and TC4/WO[1] functions.
9 PA04 bidirectional General-purpose I/O on VDDANA with EXTINT[4], ADC VREFB, ADC AIN[4], AC AIN[0], PTC Y[2], SERCOM0/PAD[0] and TCC0/WO[0] functions.
10 PA05 bidirectional General-purpose I/O on VDDANA with EXTINT[5], ADC AIN[5], AC AIN[1], PTC Y[3], SERCOM0/PAD[1] and TCC0/WO[1] functions.
11 PA06 bidirectional General-purpose I/O on VDDANA with EXTINT[6], ADC AIN[6], AC AIN[2], PTC Y[4], SERCOM0/PAD[2] and TCC1/WO[0] functions.
12 PA07 bidirectional General-purpose I/O on VDDANA with EXTINT[7], ADC AIN[7], AC AIN[3], PTC Y[5], SERCOM0/PAD[3], TCC1/WO[1] and I2S SD[0] functions.
13 PA08 bidirectional General-purpose I/O on VDDIO with NMI, ADC AIN[16], PTC X[0], SERCOM0/2 PAD[0] and TCC0/WO[0] functions; supports I2C mode.
14 PA09 bidirectional General-purpose I/O on VDDIO with EXTINT[9], ADC AIN[17], PTC X[1], SERCOM0/2 PAD[1] and TCC0/WO[1] functions; supports I2C mode.
15 PA10 bidirectional General-purpose I/O on VDDIO with EXTINT[10], ADC AIN[18], PTC X[2], SERCOM0/2 PAD[2], TCC1/WO[0] and GCLK_IO[4] functions.
16 PA11 bidirectional General-purpose I/O on VDDIO with EXTINT[11], ADC AIN[19], PTC X[3], SERCOM0/2 PAD[3], TCC1/WO[1] and GCLK_IO[5] functions.
17 VDDIO power_in Digital I/O supply for the I/O pins of this cluster (PA08-PA15, PB10-PB11).
18 GND power_in Ground for the digital I/O supply.
19 PB10 bidirectional General-purpose I/O on VDDIO with EXTINT[10], SERCOM4/PAD[2], TC5/WO[0], TCC0/WO[4], I2S MCK[1] and GCLK_IO[4] functions.
20 PB11 bidirectional General-purpose I/O on VDDIO with EXTINT[11], SERCOM4/PAD[3], TC5/WO[1], TCC0/WO[5], I2S SCK[1] and GCLK_IO[5] functions.
21 PA12 bidirectional General-purpose I/O on VDDIO with EXTINT[12], SERCOM2/PAD[0], SERCOM4/PAD[0], TCC2/WO[0], TCC0/WO[6] and AC CMP[0] functions; supports I2C mode.
22 PA13 bidirectional General-purpose I/O on VDDIO with EXTINT[13], SERCOM2/PAD[1], SERCOM4/PAD[1], TCC2/WO[1], TCC0/WO[7] and AC CMP[1] functions; supports I2C mode.
23 PA14 bidirectional General-purpose I/O on VDDIO with EXTINT[14], SERCOM2/PAD[2], TC3/WO[0] and GCLK_IO[0] functions, and XIN for the crystal oscillator.
24 PA15 bidirectional General-purpose I/O on VDDIO with EXTINT[15], SERCOM2/PAD[3], TC3/WO[1] and GCLK_IO[1] functions, and XOUT for the crystal oscillator.
25 PA16 bidirectional General-purpose I/O on VDDIO with EXTINT[0], PTC X[4], SERCOM1/3 PAD[0], TCC2/WO[0], TCC0/WO[6] and GCLK_IO[2] functions; supports I2C mode.
26 PA17 bidirectional General-purpose I/O on VDDIO with EXTINT[1], PTC X[5], SERCOM1/3 PAD[1], TCC2/WO[1], TCC0/WO[7] and GCLK_IO[3] functions; supports I2C mode.
27 PA18 bidirectional General-purpose I/O on VDDIO with EXTINT[2], PTC X[6], SERCOM1/3 PAD[2], TC3/WO[0], TCC0/WO[2] and AC CMP[0] functions.
28 PA19 bidirectional General-purpose I/O on VDDIO with EXTINT[3], PTC X[7], SERCOM1/3 PAD[3], TC3/WO[1], TCC0/WO[3], I2S SD[0] and AC CMP[1] functions.
29 PA20 bidirectional General-purpose I/O on VDDIO with EXTINT[4], PTC X[8], SERCOM5/3 PAD[2], TC7/WO[0], TCC0/WO[6], I2S SCK[0] and GCLK_IO[4] functions.
30 PA21 bidirectional General-purpose I/O on VDDIO with EXTINT[5], PTC X[9], SERCOM5/3 PAD[3], TC7/WO[1], TCC0/WO[7], I2S FS[0] and GCLK_IO[5] functions.
31 PA22 bidirectional General-purpose I/O on VDDIO with EXTINT[6], PTC X[10], SERCOM3/5 PAD[0], TC4/WO[0], TCC0/WO[4] and GCLK_IO[6] functions; supports I2C mode.
32 PA23 bidirectional General-purpose I/O on VDDIO with EXTINT[7], PTC X[11], SERCOM3/5 PAD[1], TC4/WO[1], TCC0/WO[5], USB SOF 1kHz and GCLK_IO[7] functions; supports I2C mode.
33 PA24 bidirectional General-purpose I/O on VDDIO with EXTINT[12], SERCOM3/5 PAD[2], TC5/WO[0], TCC1/WO[2] and USB DM functions; a pull-up is recommended if unconnected.
34 PA25 bidirectional General-purpose I/O on VDDIO with EXTINT[13], SERCOM3/5 PAD[3], TC5/WO[1], TCC1/WO[3] and USB DP functions; a pull-up is recommended if unconnected.
35 GND power_in Ground for the digital I/O supply.
36 VDDIO power_in Digital I/O supply for the I/O pins of this cluster (PA16-PA25, PB22-PB23, PA27-PA28).
37 PB22 bidirectional General-purpose I/O on VDDIO with EXTINT[6], SERCOM5/PAD[2], TC7/WO[0], TCC3/WO[0] and GCLK_IO[0] functions.
38 PB23 bidirectional General-purpose I/O on VDDIO with EXTINT[7], SERCOM5/PAD[3], TC7/WO[1], TCC3/WO[1] and GCLK_IO[1] functions.
39 PA27 bidirectional General-purpose I/O on VDDIO with EXTINT[15], TCC3/WO[6] and GCLK_IO[0] functions.
40 RESET input External reset input, active low.
41 PA28 bidirectional General-purpose I/O on VDDIO with EXTINT[8], TCC3/WO[7] and GCLK_IO[0] functions.
42 GND power_in Ground for the VDDIN supply.
43 VDDCORE power_out Regulated output supply for the core.
44 VDDIN power_in Input supply for the device and internal voltage regulator.
45 PA30 bidirectional General-purpose I/O on VDDIO with EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0], TCC3/WO[4], GCLK_IO[0] and SWCLK (serial wire debug clock) functions.
46 PA31 bidirectional General-purpose I/O on VDDIO with EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1] and TCC3/WO[5] functions; SWDIO is active only when a debugger is present.
47 PB02 bidirectional General-purpose I/O on VDDANA with EXTINT[2], ADC AIN[10], PTC Y[8], SERCOM5/PAD[0], TC6/WO[0] and TCC3/WO[2] functions.
48 PB03 bidirectional General-purpose I/O on VDDANA with EXTINT[3], ADC AIN[11], PTC Y[9], SERCOM5/PAD[1], TC6/WO[1] and TCC3/WO[3] functions.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-48-EP(7x7)
Category Embedded Processors & Controllers
Pins 49

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating voltage (SAM D21) VDD 1.62 3.63 V SAM D21: 1.62V, 3.63V 2
VDDIO supply voltage VDDIO 1.62 3.63 V Powers I/O lines, OSC8M and XOSC 35
VDDIN supply voltage VDDIN 1.62 3.63 V Powers I/O lines and the internal regulator 35
VDDANA supply voltage VDDANA 1.62 3.63 V Powers I/O lines and the ADC, AC, DAC, PTC, OSCULP32K, OSC32K, XOSC32K 35
Operating temperature (U grade) -40 85 °C U = -40 - 85°C Matte Sn Plating 16
CPU clock frequency Fmax 48 MHz Arm Cortex-M0+ CPU running at up to 48 MHz 1
VDDCORE regulated output voltage VDDCORE 1.2 V Internal regulated voltage output 35

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. 859

CAD (KiCad official)

  • Symbol: ATSAMD21G16B-MU
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: QFN-48-EP(7x7) (KiCad packages3D, STEP)
  • 3D model files: atsamd21g16b-mu-etched.step / atsamd21g16b-mu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsamd21g16b-mu.step / atsamd21g16b-mu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1148 pp, sha256 18ca1ccab5aa330f, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF