component
ATSAMD21E17D-AU
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Contents
README
markdownATSAMD21E17D-AU
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-32(7x7)
ATSAMD21E17D-AU from Microchip Tech, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA00 | bidirectional | Port A general-purpose I/O on VDDANA, multiplexed to EXTINT[0], AIN[0] when used as analog, and the XIN32 32 kHz crystal input when XOSC32K is enabled. |
| 2 | PA01 | bidirectional | Port A general-purpose I/O on VDDANA, multiplexed to EXTINT[1] and the XOUT32 32 kHz crystal output when XOSC32K is enabled. |
| 3 | PA02 | bidirectional | Port A general-purpose I/O on VDDANA, multiplexed to EXTINT[2], AIN[0], VOUT (DAC output) and TCC3/WO[0]. |
| 4 | PA03 | bidirectional | Port A general-purpose I/O on VDDANA, multiplexed to EXTINT[3], AIN[1], the ADC/DAC VREFA reference input and TCC3/WO[1]. |
| 5 | PA04 | bidirectional | Port A general-purpose I/O on VDDANA, multiplexed to EXTINT[4], AIN[4], the ADC VREFB reference input, SERCOM0/PAD[0] and TCC0/WO[0]. |
| 6 | PA05 | bidirectional | Port A general-purpose I/O on VDDANA, multiplexed to EXTINT[5], AIN[5], SERCOM0/PAD[1] and TCC0/WO[1]. |
| 7 | PA06 | bidirectional | Port A general-purpose I/O on VDDANA, multiplexed to EXTINT[6], AIN[6], SERCOM0/PAD[2] and TCC1/WO[0]. |
| 8 | PA07 | bidirectional | Port A general-purpose I/O on VDDANA, multiplexed to EXTINT[7], AIN[7], SERCOM0/PAD[3] and TCC1/WO[1]. |
| 9 | VDDANA | power_in | Analog supply pin for the analog blocks and the VDDANA-supplied pins of the device. |
| 10 | GND | power_in | Ground reference pin for the device digital supply. |
| 11 | PA08 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to NMI, AIN[16], SERCOM0/PAD[0], SERCOM2/PAD[0], TCC0/WO[0] and I2S/SD[0], with I2C support per Table 7-5. |
| 12 | PA09 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[9], AIN[17], SERCOM0/PAD[1], SERCOM2/PAD[1], TCC0/WO[1] and I2S/SD[1], with I2C support per Table 7-5. |
| 13 | PA10 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[10], AIN[18], SERCOM0/PAD[2], SERCOM2/PAD[2], TCC1/WO[0] and I2S/MCK[0]. |
| 14 | PA11 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[11], AIN[19], SERCOM0/PAD[3], SERCOM2/PAD[3], TCC1/WO[1] and I2S/SCK[0]. |
| 15 | PA14 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[14], SERCOM2/PAD[2], SERCOM4/PAD[2], TC3/WO[0], TCC0/WO[4] and GCLK_IO[0], and the XIN crystal input when XOSC is enabled. |
| 16 | PA15 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[15], SERCOM2/PAD[3], SERCOM4/PAD[3], TC3/WO[1], TCC0/WO[5] and GCLK_IO[1], and the XOUT crystal output when XOSC is enabled. |
| 17 | PA16 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[0], SERCOM1/PAD[0], SERCOM3/PAD[0], TCC2/WO[0], TCC0/WO[6] and GCLK_IO[2]. |
| 18 | PA17 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[1], SERCOM1/PAD[1], SERCOM3/PAD[1], TCC2/WO[1], TCC0/WO[7] and GCLK_IO[3]. |
| 19 | PA18 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[2], SERCOM1/PAD[2], SERCOM3/PAD[2], TC3/WO[0], TCC0/WO[2] and AC/CMP[0]. |
| 20 | PA19 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[3], SERCOM1/PAD[3], SERCOM3/PAD[3], TC3/WO[1], TCC0/WO[3], I2S/SD[0] and AC/CMP[1]. |
| 21 | PA22 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[6], SERCOM3/PAD[0], SERCOM5/PAD[0], TC4/WO[0], TCC0/WO[4] and GCLK_IO[6], with I2C support per Table 7-5. |
| 22 | PA23 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[7], SERCOM3/PAD[1], SERCOM5/PAD[1], TC4/WO[1], TCC0/WO[5], USB SOF 1kHz and GCLK_IO[7], with I2C support per Table 7-5. |
| 23 | PA24 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[12], SERCOM3/PAD[2], SERCOM5/PAD[2], TC5/WO[0], TCC1/WO[2] and the USB DM data line; leave unconnected pins with an internal pull-up enabled per note 6. |
| 24 | PA25 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[13], SERCOM3/PAD[3], SERCOM5/PAD[3], TC5/WO[1], TCC1/WO[3] and the USB DP data line; leave unconnected pins with an internal pull-up enabled per note 6. |
| 25 | PA27 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[15], TCC3/WO[6] and GCLK_IO[0]. |
| 26 | RESET | input | External active-low reset input of the Power Manager. |
| 27 | PA28 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[8], TCC3/WO[7] and GCLK_IO[0]. |
| 28 | GND | power_in | Ground reference pin for the device digital supply. |
| 29 | VDDCORE | power_out | Regulated output supply of the internal voltage regulator that powers the core logic. |
| 30 | VDDIN | power_in | Input supply pin for the internal voltage regulator and the core supply path. |
| 31 | PA30 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0], TCC3/WO[4], GCLK_IO[0] and the SWCLK serial wire debug clock. |
| 32 | PA31 | bidirectional | Port A general-purpose I/O on VDDIO, multiplexed to EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1], TCC3/WO[5] and the SWDIO serial wire debug data pin when a debugger is present. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-32(7x7) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 32 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating supply voltage (VDD) | VDD | 1.62 | 3.63 | V | SAM D21 family; VDDIN, VDDIO and VDDANA at common VDD | 35 | |
| Operating temperature range | -40 | 85 | °C | Ordering grade U, -40 to 85°C matte Sn plating (AU suffix) | 16 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. | 859 |
CAD (KiCad official)
- Symbol:
ATSAMD21E17D-AU - Footprint:
Package_QFP:TQFP-32_7x7mm_P0.8mm - 3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
atsamd21e17d-au-etched.step/atsamd21e17d-au-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atsamd21e17d-au.step/atsamd21e17d-au.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (1148 pp, sha256
18ca1ccab5aa330f, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).