component
ATSAMD21E16B-MF
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ATSAMD21E16B-MF
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · QFN-32-EP(5x5)
ATSAMD21E16B-MF from Microchip Tech, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA00 | bidirectional | Port A I/O pin PA00 on the VDDANA domain, also usable as XIN32 (32.768 kHz crystal input), EXTINT[0], SERCOM1/PAD[0] and TCC2/WO[0]. |
| 2 | PA01 | bidirectional | Port A I/O pin PA01 on the VDDANA domain, also usable as XOUT32 (32 kHz crystal output), EXTINT[1], SERCOM1/PAD[1] and TCC2/WO[1]. |
| 3 | PA02 | bidirectional | Port A I/O pin PA02 on the VDDANA domain, with analog input AIN[0], PTC input Y[0], DAC output VOUT, EXTINT[2] and TCC3/WO[0]. |
| 4 | PA03 | bidirectional | Port A I/O pin PA03 on the VDDANA domain, with analog input AIN[1], ADC/DAC reference VREFA, PTC input Y[1], EXTINT[3] and TCC3/WO[1]. |
| 5 | PA04 | bidirectional | Port A I/O pin PA04 on the VDDANA domain, with ADC input AIN[4], AC input AIN[0], ADC reference VREFB, PTC input Y[2], EXTINT[4], SERCOM0/PAD[0] and TCC0/WO[0]. |
| 6 | PA05 | bidirectional | Port A I/O pin PA05 on the VDDANA domain, with ADC input AIN[5], AC input AIN[1], PTC input Y[3], EXTINT[5], SERCOM0/PAD[1] and TCC0/WO[1]. |
| 7 | PA06 | bidirectional | Port A I/O pin PA06 on the VDDANA domain, with ADC input AIN[6], AC input AIN[2], PTC input Y[4], EXTINT[6], SERCOM0/PAD[2] and TCC1/WO[0]. |
| 8 | PA07 | bidirectional | Port A I/O pin PA07 on the VDDANA domain, with ADC input AIN[7], AC input AIN[3], PTC input Y[5], EXTINT[7], SERCOM0/PAD[3] and TCC1/WO[1]. |
| 9 | VDDANA | power_in | Analog supply pin for the analog domain, specified at 1.62 V to 3.63 V and decoupled with 100 nF and 10 µF capacitors as per the schematic checklist. |
| 10 | GND | power_in | Ground pin for the digital domain of the device. |
| 11 | PA08 | bidirectional | Port A I/O pin PA08 on the I/O supply domain, also NMI, ADC input AIN[16], PTC input X[0], SERCOM0/PAD[0], SERCOM2/PAD[0], TCC0/WO[0] and TCC1/WO[2], and usable as an I2C High-speed pin. |
| 12 | PA09 | bidirectional | Port A I/O pin PA09 on the I/O supply domain, with EXTINT[9], ADC input AIN[17], PTC input X[1], SERCOM0/PAD[1], SERCOM2/PAD[1], TCC0/WO[1] and TCC1/WO[3], and usable as an I2C High-speed pin. |
| 13 | PA10 | bidirectional | Port A I/O pin PA10 on the I/O supply domain, with EXTINT[10], ADC input AIN[18], PTC input X[2], SERCOM0/PAD[2], SERCOM2/PAD[2], TCC1/WO[0] and TCC0/WO[2]. |
| 14 | PA11 | bidirectional | Port A I/O pin PA11 on the I/O supply domain, with EXTINT[11], ADC input AIN[19], PTC input X[3], SERCOM0/PAD[3], SERCOM2/PAD[3], TCC1/WO[1] and TCC0/WO[3]. |
| 15 | PA14 | bidirectional | Port A I/O pin PA14 on the I/O supply domain, also XIN (crystal oscillator input when XOSC is enabled), with EXTINT[14], SERCOM2/PAD[2], SERCOM4/PAD[2], TC3/WO[0], TCC0/WO[4] and GCLK_IO[0]. |
| 16 | PA15 | bidirectional | Port A I/O pin PA15 on the I/O supply domain, also XOUT (crystal oscillator output when XOSC is enabled), with EXTINT[15], SERCOM2/PAD[3], SERCOM4/PAD[3], TC3/WO[1], TCC0/WO[5] and GCLK_IO[1]. |
| 17 | PA16 | bidirectional | Port A I/O pin PA16 on the I/O supply domain, with EXTINT[0], PTC input X[4], SERCOM1/PAD[0], SERCOM3/PAD[0], TCC2/WO[0], TCC0/WO[6] and GCLK_IO[2], and usable as an I2C High-speed pin. |
| 18 | PA17 | bidirectional | Port A I/O pin PA17 on the I/O supply domain, with EXTINT[1], PTC input X[5], SERCOM1/PAD[1], SERCOM3/PAD[1], TCC2/WO[1], TCC0/WO[7] and GCLK_IO[3], and usable as an I2C High-speed pin. |
| 19 | PA18 | bidirectional | Port A I/O pin PA18 on the I/O supply domain, with EXTINT[2], PTC input X[6], SERCOM1/PAD[2], SERCOM3/PAD[2], TC3/WO[0], TCC0/WO[2] and AC output CMP[0]. |
| 20 | PA19 | bidirectional | Port A I/O pin PA19 on the I/O supply domain, with EXTINT[3], PTC input X[7], SERCOM1/PAD[3], SERCOM3/PAD[3], TC3/WO[1], TCC0/WO[3] and AC output CMP[1]. |
| 21 | PA22 | bidirectional | Port A I/O pin PA22 on the I/O supply domain, with EXTINT[6], PTC input X[10], SERCOM3/PAD[0], SERCOM5/PAD[0], TC4/WO[0], TCC0/WO[4] and GCLK_IO[6], and usable as an I2C High-speed pin. |
| 22 | PA23 | bidirectional | Port A I/O pin PA23 on the I/O supply domain, with EXTINT[7], PTC input X[11], SERCOM3/PAD[1], SERCOM5/PAD[1], TC4/WO[1], TCC0/WO[5], USB SOF 1 kHz and GCLK_IO[7], and usable as an I2C High-speed pin. |
| 23 | PA24 | bidirectional | Port A I/O pin PA24 with USB DM, EXTINT[12], SERCOM3/PAD[2], SERCOM5/PAD[2], TC5/WO[0] and TCC1/WO[2]; if unconnected, an input pull-up should be enabled to avoid up to 1 mA extra consumption, and the pin has no drive-strength option. |
| 24 | PA25 | bidirectional | Port A I/O pin PA25 with USB DP, EXTINT[13], SERCOM3/PAD[3], SERCOM5/PAD[3], TC5/WO[1] and TCC1/WO[3]; if unconnected, an input pull-up should be enabled to avoid up to 1 mA extra consumption, and the pin has no drive-strength option. |
| 25 | PA27 | bidirectional | Port A I/O pin PA27 on the I/O supply domain, with EXTINT[15], TCC3/WO[6] and GCLK_IO[0]. |
| 26 | RESET | input | External active-low reset input with an internal pull-up resistor; the low-level threshold is below 0.36 x VDDIO for 2.7 V to 3.6 V (below 0.33 x VDDIO for 1.6 V to 2.0 V). |
| 27 | PA28 | bidirectional | Port A I/O pin PA28 on the I/O supply domain, with EXTINT[8], TCC3/WO[7] and GCLK_IO[0]. |
| 28 | GND | power_in | Ground pin for the digital (I/O) domain of the device. |
| 29 | VDDCORE | power_out | Core supply of 1.6 V to 1.8 V from the internal voltage regulator, which requires a 1 µF decoupling capacitor close to the pin. |
| 30 | VDDIN | power_in | Input supply pin (1.62 V to 3.63 V) that feeds the internal regulator and, on this 32-pin package, the I/O pads, decoupled with 10 µF and 100 nF capacitors close to the device. |
| 31 | PA30 | bidirectional | Port A I/O pin PA30, also SWCLK (Serial Wire Debug clock, where a pull-up on SWCLK is recommended), with EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0], TCC3/WO[4] and GCLK_IO[0]. |
| 32 | PA31 | bidirectional | Port A I/O pin PA31, also SWDIO (Serial Wire Debug data, activated only in the presence of a debugger), with EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1] and TCC3/WO[5]. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-32-EP(5x5) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| I/O supply voltage (VDDIO) | VDDIO | 1.62 | 3.63 | V | 36 | ||
| Input supply voltage (VDDIN) | VDDIN | 1.62 | 3.63 | V | 36 | ||
| Analog supply voltage (VDDANA) | VDDANA | 1.62 | 3.63 | V | 36 | ||
| Operating temperature range, package grade F | -40 | 125 | °C | Grade F (-40 - 125°C Matte Sn plating) per ordering information | 17 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. | 860 |
CAD (KiCad official)
- Symbol:
ATSAMD21E16B-MF - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
atsamd21e16b-mf-etched.step/atsamd21e16b-mf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atsamd21e16b-mf.step/atsamd21e16b-mf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (1115 pp, sha256
ecf2cbbc85ccd5f6, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ATSAMD21E16B-MF
**Microchip Tech** · Microcontroller Units (MCUs/MPUs/SOCs) · QFN-32-EP(5x5)
ATSAMD21E16B-MF from Microchip Tech, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA00 | bidirectional | Port A I/O pin PA00 on the VDDANA domain, also usable as XIN32 (32.768 kHz crystal input), EXTINT[0], SERCOM1/PAD[0] and TCC2/WO[0]. |
| 2 | PA01 | bidirectional | Port A I/O pin PA01 on the VDDANA domain, also usable as XOUT32 (32 kHz crystal output), EXTINT[1], SERCOM1/PAD[1] and TCC2/WO[1]. |
| 3 | PA02 | bidirectional | Port A I/O pin PA02 on the VDDANA domain, with analog input AIN[0], PTC input Y[0], DAC output VOUT, EXTINT[2] and TCC3/WO[0]. |
| 4 | PA03 | bidirectional | Port A I/O pin PA03 on the VDDANA domain, with analog input AIN[1], ADC/DAC reference VREFA, PTC input Y[1], EXTINT[3] and TCC3/WO[1]. |
| 5 | PA04 | bidirectional | Port A I/O pin PA04 on the VDDANA domain, with ADC input AIN[4], AC input AIN[0], ADC reference VREFB, PTC input Y[2], EXTINT[4], SERCOM0/PAD[0] and TCC0/WO[0]. |
| 6 | PA05 | bidirectional | Port A I/O pin PA05 on the VDDANA domain, with ADC input AIN[5], AC input AIN[1], PTC input Y[3], EXTINT[5], SERCOM0/PAD[1] and TCC0/WO[1]. |
| 7 | PA06 | bidirectional | Port A I/O pin PA06 on the VDDANA domain, with ADC input AIN[6], AC input AIN[2], PTC input Y[4], EXTINT[6], SERCOM0/PAD[2] and TCC1/WO[0]. |
| 8 | PA07 | bidirectional | Port A I/O pin PA07 on the VDDANA domain, with ADC input AIN[7], AC input AIN[3], PTC input Y[5], EXTINT[7], SERCOM0/PAD[3] and TCC1/WO[1]. |
| 9 | VDDANA | power_in | Analog supply pin for the analog domain, specified at 1.62 V to 3.63 V and decoupled with 100 nF and 10 µF capacitors as per the schematic checklist. |
| 10 | GND | power_in | Ground pin for the digital domain of the device. |
| 11 | PA08 | bidirectional | Port A I/O pin PA08 on the I/O supply domain, also NMI, ADC input AIN[16], PTC input X[0], SERCOM0/PAD[0], SERCOM2/PAD[0], TCC0/WO[0] and TCC1/WO[2], and usable as an I2C High-speed pin. |
| 12 | PA09 | bidirectional | Port A I/O pin PA09 on the I/O supply domain, with EXTINT[9], ADC input AIN[17], PTC input X[1], SERCOM0/PAD[1], SERCOM2/PAD[1], TCC0/WO[1] and TCC1/WO[3], and usable as an I2C High-speed pin. |
| 13 | PA10 | bidirectional | Port A I/O pin PA10 on the I/O supply domain, with EXTINT[10], ADC input AIN[18], PTC input X[2], SERCOM0/PAD[2], SERCOM2/PAD[2], TCC1/WO[0] and TCC0/WO[2]. |
| 14 | PA11 | bidirectional | Port A I/O pin PA11 on the I/O supply domain, with EXTINT[11], ADC input AIN[19], PTC input X[3], SERCOM0/PAD[3], SERCOM2/PAD[3], TCC1/WO[1] and TCC0/WO[3]. |
| 15 | PA14 | bidirectional | Port A I/O pin PA14 on the I/O supply domain, also XIN (crystal oscillator input when XOSC is enabled), with EXTINT[14], SERCOM2/PAD[2], SERCOM4/PAD[2], TC3/WO[0], TCC0/WO[4] and GCLK_IO[0]. |
| 16 | PA15 | bidirectional | Port A I/O pin PA15 on the I/O supply domain, also XOUT (crystal oscillator output when XOSC is enabled), with EXTINT[15], SERCOM2/PAD[3], SERCOM4/PAD[3], TC3/WO[1], TCC0/WO[5] and GCLK_IO[1]. |
| 17 | PA16 | bidirectional | Port A I/O pin PA16 on the I/O supply domain, with EXTINT[0], PTC input X[4], SERCOM1/PAD[0], SERCOM3/PAD[0], TCC2/WO[0], TCC0/WO[6] and GCLK_IO[2], and usable as an I2C High-speed pin. |
| 18 | PA17 | bidirectional | Port A I/O pin PA17 on the I/O supply domain, with EXTINT[1], PTC input X[5], SERCOM1/PAD[1], SERCOM3/PAD[1], TCC2/WO[1], TCC0/WO[7] and GCLK_IO[3], and usable as an I2C High-speed pin. |
| 19 | PA18 | bidirectional | Port A I/O pin PA18 on the I/O supply domain, with EXTINT[2], PTC input X[6], SERCOM1/PAD[2], SERCOM3/PAD[2], TC3/WO[0], TCC0/WO[2] and AC output CMP[0]. |
| 20 | PA19 | bidirectional | Port A I/O pin PA19 on the I/O supply domain, with EXTINT[3], PTC input X[7], SERCOM1/PAD[3], SERCOM3/PAD[3], TC3/WO[1], TCC0/WO[3] and AC output CMP[1]. |
| 21 | PA22 | bidirectional | Port A I/O pin PA22 on the I/O supply domain, with EXTINT[6], PTC input X[10], SERCOM3/PAD[0], SERCOM5/PAD[0], TC4/WO[0], TCC0/WO[4] and GCLK_IO[6], and usable as an I2C High-speed pin. |
| 22 | PA23 | bidirectional | Port A I/O pin PA23 on the I/O supply domain, with EXTINT[7], PTC input X[11], SERCOM3/PAD[1], SERCOM5/PAD[1], TC4/WO[1], TCC0/WO[5], USB SOF 1 kHz and GCLK_IO[7], and usable as an I2C High-speed pin. |
| 23 | PA24 | bidirectional | Port A I/O pin PA24 with USB DM, EXTINT[12], SERCOM3/PAD[2], SERCOM5/PAD[2], TC5/WO[0] and TCC1/WO[2]; if unconnected, an input pull-up should be enabled to avoid up to 1 mA extra consumption, and the pin has no drive-strength option. |
| 24 | PA25 | bidirectional | Port A I/O pin PA25 with USB DP, EXTINT[13], SERCOM3/PAD[3], SERCOM5/PAD[3], TC5/WO[1] and TCC1/WO[3]; if unconnected, an input pull-up should be enabled to avoid up to 1 mA extra consumption, and the pin has no drive-strength option. |
| 25 | PA27 | bidirectional | Port A I/O pin PA27 on the I/O supply domain, with EXTINT[15], TCC3/WO[6] and GCLK_IO[0]. |
| 26 | RESET | input | External active-low reset input with an internal pull-up resistor; the low-level threshold is below 0.36 x VDDIO for 2.7 V to 3.6 V (below 0.33 x VDDIO for 1.6 V to 2.0 V). |
| 27 | PA28 | bidirectional | Port A I/O pin PA28 on the I/O supply domain, with EXTINT[8], TCC3/WO[7] and GCLK_IO[0]. |
| 28 | GND | power_in | Ground pin for the digital (I/O) domain of the device. |
| 29 | VDDCORE | power_out | Core supply of 1.6 V to 1.8 V from the internal voltage regulator, which requires a 1 µF decoupling capacitor close to the pin. |
| 30 | VDDIN | power_in | Input supply pin (1.62 V to 3.63 V) that feeds the internal regulator and, on this 32-pin package, the I/O pads, decoupled with 10 µF and 100 nF capacitors close to the device. |
| 31 | PA30 | bidirectional | Port A I/O pin PA30, also SWCLK (Serial Wire Debug clock, where a pull-up on SWCLK is recommended), with EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0], TCC3/WO[4] and GCLK_IO[0]. |
| 32 | PA31 | bidirectional | Port A I/O pin PA31, also SWDIO (Serial Wire Debug data, activated only in the presence of a debugger), with EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1] and TCC3/WO[5]. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-32-EP(5x5) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| I/O supply voltage (VDDIO) | VDDIO | 1.62 | | 3.63 | V | | 36 |
| Input supply voltage (VDDIN) | VDDIN | 1.62 | | 3.63 | V | | 36 |
| Analog supply voltage (VDDANA) | VDDANA | 1.62 | | 3.63 | V | | 36 |
| Operating temperature range, package grade F | | -40 | | 125 | °C | Grade F (-40 - 125°C Matte Sn plating) per ordering information | 17 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. | 860 |
## CAD (KiCad official)
- Symbol: `ATSAMD21E16B-MF`
- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`
- 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files: `atsamd21e16b-mf-etched.step` / `atsamd21e16b-mf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `atsamd21e16b-mf.step` / `atsamd21e16b-mf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/atsamd21e16b-mf-datasheet.pdf) (1115 pp, sha256 `ecf2cbbc85ccd5f6`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/atsamd21e16b-mf-datasheet.pdf)