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ATSAMD21E15B-MU

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Microchip Tech Pre-ordered MCUs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersatsamd21e15b-mufactory-2.0.0extractor-text

Verified ATSAMD21E15B-MU

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 33 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATSAMD21E15B-MU · QFN-32-EP(5x5) · 33 pins
  • ✓copper: 33 copper pads, none touching another net
  • ✓datasheet: all 33 pin names found in the 1148-page datasheet
  • ✓distributor: lcsc C614238, digikey ATSAMD21E15B-MU-ND, mouser 556-ATSAMD21E15B-MU
  • ✓family: QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-pyctqpam/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.1089)
  • ✓pads: 33 pins = 33 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 33 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ atsamd21e15b-mu.kicad_sym✓ atsamd21e15b-mu.kicad_mod✓ atsamd21e15b-mu.step
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Ray Publish 0.1.0 e1e4288 5d ago

ATSAMD21E15B-MU

Microchip Tech · Pre-ordered MCUs · QFN-32-EP(5x5)

ATSAMD21E15B-MU from Microchip Tech, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA00 bidirectional GPIO on VDDANA with EXTINT[0], SERCOM1/PAD[0], TCC2/WO[0]; also XIN32 for the 32kHz crystal oscillator.
2 PA01 bidirectional GPIO on VDDANA with EXTINT[1], SERCOM1/PAD[1], TCC2/WO[1]; also XOUT32 for the 32kHz crystal oscillator.
3 PA02 bidirectional GPIO on VDDANA with EXTINT[2], ADC AIN[0], PTC Y[0] and DAC VOUT.
4 PA03 bidirectional GPIO on VDDANA with EXTINT[3], ADC/DAC VREFA, ADC AIN[1] and PTC Y[1].
5 PA04 bidirectional GPIO on VDDANA with EXTINT[4], ADC VREFB, ADC AIN[4], AC AIN[0], PTC Y[2], SERCOM0/PAD[0].
6 PA05 bidirectional GPIO on VDDANA with EXTINT[5], ADC AIN[5], AC AIN[1], PTC Y[3], SERCOM0/PAD[1].
7 PA06 bidirectional GPIO on VDDANA with EXTINT[6], ADC AIN[6], AC AIN[2], PTC Y[4], SERCOM0/PAD[2].
8 PA07 bidirectional GPIO on VDDANA with EXTINT[7], ADC AIN[7], AC AIN[3], PTC Y[5], SERCOM0/PAD[3], I2S SD[0].
9 VDDANA power_in Analog supply input; powers the VDDANA-domain pins (PA00-PA07) and analog blocks.
10 GND power_in Ground.
11 PA08 bidirectional GPIO on VDDIO with NMI, ADC AIN[16], PTC X[0], SERCOM0/PAD[0] or SERCOM2/PAD[0]; supports I2C mode.
12 PA09 bidirectional GPIO on VDDIO with EXTINT[9], ADC AIN[17], PTC X[1], SERCOM0/PAD[1] or SERCOM2/PAD[1]; supports I2C mode.
13 PA10 bidirectional GPIO on VDDIO with EXTINT[10], ADC AIN[18], PTC X[2], SERCOM0/2 PAD[2], GCLK_IO[4].
14 PA11 bidirectional GPIO on VDDIO with EXTINT[11], ADC AIN[19], PTC X[3], SERCOM0/2 PAD[3], GCLK_IO[5].
15 PA14 bidirectional GPIO on VDDIO with EXTINT[14], SERCOM2/PAD[2], TC3/WO[0], GCLK_IO[0]; also XIN for the crystal oscillator.
16 PA15 bidirectional GPIO on VDDIO with EXTINT[15], SERCOM2/PAD[3], TC3/WO[1], GCLK_IO[1]; also XOUT for the crystal oscillator.
17 PA16 bidirectional GPIO on VDDIO with EXTINT[0], PTC X[4], SERCOM1/3 PAD[0], GCLK_IO[2]; supports I2C mode.
18 PA17 bidirectional GPIO on VDDIO with EXTINT[1], PTC X[5], SERCOM1/3 PAD[1], GCLK_IO[3]; supports I2C mode.
19 PA18 bidirectional GPIO on VDDIO with EXTINT[2], PTC X[6], SERCOM1/3 PAD[2], TC3/WO[0], AC/CMP[0].
20 PA19 bidirectional GPIO on VDDIO with EXTINT[3], PTC X[7], SERCOM1/3 PAD[3], TC3/WO[1], I2S SD[0], AC/CMP[1].
21 PA22 bidirectional GPIO on VDDIO with EXTINT[6], PTC X[10], SERCOM3/PAD[0], TC4/WO[0], GCLK_IO[6]; supports I2C mode.
22 PA23 bidirectional GPIO on VDDIO with EXTINT[7], PTC X[11], SERCOM3/PAD[1], TC4/WO[1], USB SOF 1kHz, GCLK_IO[7]; supports I2C mode.
23 PA24 bidirectional GPIO on VDDIO with EXTINT[12], SERCOM3/PAD[2], TC5/WO[0] and USB DM; enable a pull-up if unconnected to avoid extra consumption (<1mA).
24 PA25 bidirectional GPIO on VDDIO with EXTINT[13], SERCOM3/PAD[3], TC5/WO[1] and USB DP; enable a pull-up if unconnected to avoid extra consumption (<1mA).
25 PA27 bidirectional GPIO on VDDIO with EXTINT[15] and GCLK_IO[0].
26 RESET input External reset input, active low.
27 PA28 bidirectional GPIO on VDDIO with EXTINT[8] and GCLK_IO[0].
28 GND power_in Ground.
29 VDDCORE power_out Regulated output supply for the core.
30 VDDIN power_in Input supply for the device and internal regulator.
31 PA30 bidirectional GPIO on VDDIO with EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0], GCLK_IO[0]; SWCLK for serial wire debug.
32 PA31 bidirectional GPIO on VDDIO with EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1]; SWDIO for serial wire debug, active only with a debugger present.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-32-EP(5x5)
Category Embedded Processors & Controllers
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating supply voltage (SAM D21) VDD 1.62 3.63 V SAM D21: 1.62V, 3.63V 2
Operating temperature range (U grade) -40 85 °C U = -40 - 85°C Matte Sn Plating 16
VDDIO supply voltage VDDIO 1.62 3.63 V Powers I/O lines, OSC8M and XOSC 35
VDDIN supply voltage VDDIN 1.62 3.63 V Powers I/O lines and the internal regulator 35
VDDANA supply voltage VDDANA 1.62 3.63 V Powers I/O lines and the ADC, AC, DAC, PTC, OSCULP32K, OSC32K, XOSC32K 35
VDDCORE internal regulated voltage VDDCORE 1.2 V Internal regulated voltage output 35

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. 859

CAD (KiCad official)

  • Symbol: ATSAMD21E15B-MU
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: atsamd21e15b-mu-etched.step / atsamd21e15b-mu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsamd21e15b-mu.step / atsamd21e15b-mu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1148 pp, sha256 18ca1ccab5aa330f, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF