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ATSAMD20G18A-MU
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, QFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownATSAMD20G18A-MU
Microchip Tech · Pre-ordered MCUs · QFN-48-EP(7x7)
ATSAMD20G18A-MU from Microchip Tech, in a QFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA00 | bidirectional | Port A digital I/O line PA00 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 2 | PA01 | bidirectional | Port A digital I/O line PA01 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 3 | PA02 | bidirectional | Port A digital I/O line PA02 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 4 | PA03 | bidirectional | Port A digital I/O line PA03 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 5 | GNDANA | power_in | Ground pin for the analog domain as labelled on the QFN48 pinout. |
| 6 | VDDANA | power_in | Analog supply pin as labelled on the QFN48 pinout; the device operating voltage is stated as 1.62V to 3.63V in the features list. |
| 7 | PB08 | bidirectional | Port B digital I/O line PB08 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 8 | PB09 | bidirectional | Port B digital I/O line PB09 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 9 | PA04 | bidirectional | Port A digital I/O line PA04 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 10 | PA05 | bidirectional | Port A digital I/O line PA05 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 11 | PA06 | bidirectional | Port A digital I/O line PA06 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 12 | PA07 | bidirectional | Port A digital I/O line PA07 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 13 | PA08 | bidirectional | Port A digital I/O line PA08 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 14 | PA09 | bidirectional | Port A digital I/O line PA09 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 15 | PA10 | bidirectional | Port A digital I/O line PA10 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 16 | PA11 | bidirectional | Port A digital I/O line PA11 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 17 | VDDIO | power_in | I/O supply pin as labelled on the QFN48 pinout; the device operating voltage is stated as 1.62V to 3.63V in the features list. |
| 18 | GND | power_in | Digital ground pin as labelled on the QFN48 pinout. |
| 19 | PB10 | bidirectional | Port B digital I/O line PB10 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 20 | PB11 | bidirectional | Port B digital I/O line PB11 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 21 | PA12 | bidirectional | Port A digital I/O line PA12 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 22 | PA13 | bidirectional | Port A digital I/O line PA13 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 23 | PA14 | bidirectional | Port A digital I/O line PA14 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 24 | PA15 | bidirectional | Port A digital I/O line PA15 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 25 | PA16 | bidirectional | Port A digital I/O line PA16 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 26 | PA17 | bidirectional | Port A digital I/O line PA17 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 27 | PA18 | bidirectional | Port A digital I/O line PA18 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 28 | PA19 | bidirectional | Port A digital I/O line PA19 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 29 | PA20 | bidirectional | Port A digital I/O line PA20 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 30 | PA21 | bidirectional | Port A digital I/O line PA21 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 31 | PA22 | bidirectional | Port A digital I/O line PA22 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 32 | PA23 | bidirectional | Port A digital I/O line PA23 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 33 | PA24 | bidirectional | Port A digital I/O line PA24 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 34 | PA25 | bidirectional | Port A digital I/O line PA25 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 35 | GND | power_in | Digital ground pin as labelled on the QFN48 pinout. |
| 36 | VDDIO | power_in | I/O supply pin as labelled on the QFN48 pinout; the device operating voltage is stated as 1.62V to 3.63V in the features list. |
| 37 | PB22 | bidirectional | Port B digital I/O line PB22 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 38 | PB23 | bidirectional | Port B digital I/O line PB23 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 39 | PA27 | bidirectional | Port A digital I/O line PA27 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 40 | RESET | input | Reset pin as labelled on the QFN48 pinout; the summary gives no further electrical limits for it. |
| 41 | PA28 | bidirectional | Port A digital I/O line PA28 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 42 | GND | power_in | Digital ground pin as labelled on the QFN48 pinout. |
| 43 | VDDCORE | power_out | Core voltage pin labelled as a regulated output supply on the QFN48 pinout; the summary gives no voltage value for it. |
| 44 | VDDIN | power_in | Main supply input pin as labelled on the QFN48 pinout; the device operating voltage is stated as 1.62V to 3.63V in the features list. |
| 45 | PA30 | bidirectional | Port A digital I/O line PA30 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 46 | PA31 | bidirectional | Port A digital I/O line PA31 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 47 | PB02 | bidirectional | Port B digital I/O line PB02 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 48 | PB03 | bidirectional | Port B digital I/O line PB03 as labelled on the QFN48 pinout; electrical limits for this pin are not stated in the summary. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-48-EP(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 49 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating voltage | 1.62 | 3.63 | V | Listed under Features as Operating Voltage; no test conditions printed | 2 | ||
| Maximum CPU frequency | 48 | MHz | Configuration summary table, all SAM D20 variants | 5 | |||
| Thermal resistance, junction-to-ambient, 48-pin QFN | θJA | 33 | °C/W | 48-pin QFN package, Table 8-1 | 39 | ||
| Thermal resistance, junction-to-case, 48-pin QFN | θJC | 11.4 | °C/W | 48-pin QFN package, Table 8-1 | 39 |
CAD (KiCad official)
- Symbol:
ATSAMD20G18A-MU - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: QFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files:
atsamd20g18a-mu-etched.step/atsamd20g18a-mu-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atsamd20g18a-mu.step/atsamd20g18a-mu.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (51 pp, sha256
17550497371e62e4, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).