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ATSAMD20E18A-AU
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Microchip Tech Pre-ordered MCUs, TQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ATSAMD20E18A-AU
Microchip Tech · Pre-ordered MCUs · TQFP-32(7x7)
ATSAMD20E18A-AU from Microchip Tech, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA00 | bidirectional | Port A general-purpose I/O pin PA00 (VDDANA domain) with EXTINT[0], SERCOM1 PAD[0] and TC2 WO[0] peripheral functions, and XIN32 32 kHz crystal input when XOSC32K is used. |
| 2 | PA01 | bidirectional | Port A general-purpose I/O pin PA01 (VDDANA domain) with EXTINT[1], SERCOM1 PAD[1] and TC2 WO[1] peripheral functions, and XOUT32 32 kHz crystal output when XOSC32K is used. |
| 3 | PA02 | bidirectional | Port A general-purpose I/O pin PA02 (VDDANA domain) with EXTINT[2], analog input AIN[0], PTC Y[0] and DAC output VOUT functions. |
| 4 | PA03 | bidirectional | Port A general-purpose I/O pin PA03 (VDDANA domain) with EXTINT[3], ADC/DAC VREFA reference input, and analog input AIN[1] with PTC Y[1]. |
| 5 | PA04 | bidirectional | Port A general-purpose I/O pin PA04 (VDDANA domain) with EXTINT[4], ADC VREFB reference input, analog input AIN[4] and AIN[0] with PTC Y[2], SERCOM0 PAD[0] and TC0 WO[0]. |
| 6 | PA05 | bidirectional | Port A general-purpose I/O pin PA05 (VDDANA domain) with EXTINT[5], analog inputs AIN[5] and AIN[1] with PTC Y[3], SERCOM0 PAD[1] and TC0 WO[1]. |
| 7 | PA06 | bidirectional | Port A general-purpose I/O pin PA06 (VDDANA domain) with EXTINT[6], analog inputs AIN[6] and AIN[2] with PTC Y[4], SERCOM0 PAD[2] and TC1 WO[0]. |
| 8 | PA07 | bidirectional | Port A general-purpose I/O pin PA07 (VDDANA domain) with EXTINT[7], analog inputs AIN[7] and AIN[3] with PTC Y[5], SERCOM0 PAD[3] and TC1 WO[1]. |
| 9 | VDDANA | power_in | Analog supply pin powering the ADC, AC, DAC, PTC and 32 kHz oscillators, with voltage 1.62 V to 3.63 V; VDDIO and VDDANA are internally connected in this package. |
| 10 | GND | power_in | Ground pin for the digital power domain. |
| 11 | PA08 | bidirectional | Port A general-purpose I/O pin PA08 (VDDIO domain) with I2C, NMI, analog input AIN[16], PTC X[0], SERCOM0 PAD[0], SERCOM2 PAD[0] and TC0 WO[0]. |
| 12 | PA09 | bidirectional | Port A general-purpose I/O pin PA09 (VDDIO domain) with I2C, EXTINT[9], analog input AIN[17], PTC X[1], SERCOM0 PAD[1], SERCOM2 PAD[1] and TC0 WO[1]. |
| 13 | PA10 | bidirectional | Port A general-purpose I/O pin PA10 (VDDIO domain) with EXTINT[10], analog input AIN[18], PTC X[2], SERCOM0 PAD[2], SERCOM2 PAD[2], TC1 WO[0] and GCLK_IO[4]. |
| 14 | PA11 | bidirectional | Port A general-purpose I/O pin PA11 (VDDIO domain) with EXTINT[11], analog input AIN[19], PTC X[3], SERCOM0 PAD[3], SERCOM2 PAD[3], TC1 WO[1] and GCLK_IO[5]. |
| 15 | PA14 | bidirectional | Port A general-purpose I/O pin PA14 (VDDIO domain) with EXTINT[14], SERCOM2 PAD[2], SERCOM4 PAD[2], TC3 WO[0] and GCLK_IO[0]; it is also the XIN crystal oscillator input when XOSC is used. |
| 16 | PA15 | bidirectional | Port A general-purpose I/O pin PA15 (VDDIO domain) with EXTINT[15], SERCOM2 PAD[3], SERCOM4 PAD[3], TC3 WO[1] and GCLK_IO[1]; it is also the XOUT crystal oscillator output when XOSC is used. |
| 17 | PA16 | bidirectional | Port A general-purpose I/O pin PA16 (VDDIO domain) with I2C, EXTINT[0], PTC X[4], SERCOM1 PAD[0], SERCOM3 PAD[0], TC2 WO[0] and GCLK_IO[2]. |
| 18 | PA17 | bidirectional | Port A general-purpose I/O pin PA17 (VDDIO domain) with I2C, EXTINT[1], PTC X[5], SERCOM1 PAD[1], SERCOM3 PAD[1], TC2 WO[1] and GCLK_IO[3]. |
| 19 | PA18 | bidirectional | Port A general-purpose I/O pin PA18 (VDDIO domain) with EXTINT[2], PTC X[6], SERCOM1 PAD[2], SERCOM3 PAD[2], TC3 WO[0] and AC CMP[0]. |
| 20 | PA19 | bidirectional | Port A general-purpose I/O pin PA19 (VDDIO domain) with EXTINT[3], PTC X[7], SERCOM1 PAD[3], SERCOM3 PAD[3], TC3 WO[1] and AC CMP[1]. |
| 21 | PA22 | bidirectional | Port A general-purpose I/O pin PA22 (VDDIO domain) with I2C, EXTINT[6], PTC X[10], SERCOM3 PAD[0], SERCOM5 PAD[0], TC4 WO[0] and GCLK_IO[6]. |
| 22 | PA23 | bidirectional | Port A general-purpose I/O pin PA23 (VDDIO domain) with I2C, EXTINT[7], PTC X[11], SERCOM3 PAD[1], SERCOM5 PAD[1], TC4 WO[1] and GCLK_IO[7]. |
| 23 | PA24 | bidirectional | Port A general-purpose I/O pin PA24 (VDDIO domain) with EXTINT[12], SERCOM3 PAD[2], SERCOM5 PAD[2] and TC5 WO[0]. |
| 24 | PA25 | bidirectional | Port A general-purpose I/O pin PA25 (VDDIO domain) with EXTINT[13], SERCOM3 PAD[3], SERCOM5 PAD[3] and TC5 WO[1]. |
| 25 | PA27 | bidirectional | Port A general-purpose I/O pin PA27 (VDDIO domain) with EXTINT[15] and GCLK_IO[0]. |
| 26 | RESET | input | External active-low reset input; the RESET pin has an internal pull-up and its low-level threshold is below 0.33 times VDDIO for 1.6 V to 2.0 V VDDIO or below 0.36 times VDDIO for 2.7 V to 3.6 V VDDIO. |
| 27 | PA28 | bidirectional | Port A general-purpose I/O pin PA28 (VDDIO domain) with EXTINT[8] and GCLK_IO[0]. |
| 28 | GND | power_in | Ground pin for the digital power domain. |
| 29 | VDDCORE | power_out | Internal regulated core voltage output of 1.2 V that powers the core, memories, peripherals and DFLL48M, decoupled per the schematic checklist. |
| 30 | VDDIN | power_in | Input supply for I/O lines and the internal voltage regulator, operating from 1.62 V to 3.63 V. |
| 31 | PA30 | bidirectional | Port A general-purpose I/O pin PA30 (VDDIO domain) with EXTINT[10], SERCOM1 PAD[2], TC1 WO[0], GCLK_IO[0] and the SWCLK serial wire debug clock function. |
| 32 | PA31 | bidirectional | Port A general-purpose I/O pin PA31 (VDDIO domain) with EXTINT[11], SERCOM1 PAD[3] and TC1 WO[1], and the SWDIO serial wire debug data function active when a debugger is present. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| I/O supply voltage | VDDIO | 1.62 | 3.63 | V | Powers I/O lines, OSC8M and XOSC | 27 | |
| Input supply voltage | VDDIN | 1.62 | 3.63 | V | Powers I/O lines and the internal regulator | 27 | |
| Analog supply voltage | VDDANA | 1.62 | 3.63 | V | Powers I/O lines and ADC, AC, DAC, PTC, OSCULP32K, OSC32K, XOSC32K | 27 | |
| Operating temperature | -40 | 85 | °C | Grade U (-40 to 85 °C) with 1.62V-3.63V, DC up to 48 MHz | 1 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. | 551 |
CAD (KiCad official)
- Symbol:
ATSAMD20E18A-AU - Footprint:
Package_QFP:TQFP-32_7x7mm_P0.8mm - 3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
atsamd20e18a-au-etched.step/atsamd20e18a-au-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atsamd20e18a-au.step/atsamd20e18a-au.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (731 pp, sha256
2505526f248dd8c2, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ATSAMD20E18A-AU
**Microchip Tech** · Pre-ordered MCUs · TQFP-32(7x7)
ATSAMD20E18A-AU from Microchip Tech, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA00 | bidirectional | Port A general-purpose I/O pin PA00 (VDDANA domain) with EXTINT[0], SERCOM1 PAD[0] and TC2 WO[0] peripheral functions, and XIN32 32 kHz crystal input when XOSC32K is used. |
| 2 | PA01 | bidirectional | Port A general-purpose I/O pin PA01 (VDDANA domain) with EXTINT[1], SERCOM1 PAD[1] and TC2 WO[1] peripheral functions, and XOUT32 32 kHz crystal output when XOSC32K is used. |
| 3 | PA02 | bidirectional | Port A general-purpose I/O pin PA02 (VDDANA domain) with EXTINT[2], analog input AIN[0], PTC Y[0] and DAC output VOUT functions. |
| 4 | PA03 | bidirectional | Port A general-purpose I/O pin PA03 (VDDANA domain) with EXTINT[3], ADC/DAC VREFA reference input, and analog input AIN[1] with PTC Y[1]. |
| 5 | PA04 | bidirectional | Port A general-purpose I/O pin PA04 (VDDANA domain) with EXTINT[4], ADC VREFB reference input, analog input AIN[4] and AIN[0] with PTC Y[2], SERCOM0 PAD[0] and TC0 WO[0]. |
| 6 | PA05 | bidirectional | Port A general-purpose I/O pin PA05 (VDDANA domain) with EXTINT[5], analog inputs AIN[5] and AIN[1] with PTC Y[3], SERCOM0 PAD[1] and TC0 WO[1]. |
| 7 | PA06 | bidirectional | Port A general-purpose I/O pin PA06 (VDDANA domain) with EXTINT[6], analog inputs AIN[6] and AIN[2] with PTC Y[4], SERCOM0 PAD[2] and TC1 WO[0]. |
| 8 | PA07 | bidirectional | Port A general-purpose I/O pin PA07 (VDDANA domain) with EXTINT[7], analog inputs AIN[7] and AIN[3] with PTC Y[5], SERCOM0 PAD[3] and TC1 WO[1]. |
| 9 | VDDANA | power_in | Analog supply pin powering the ADC, AC, DAC, PTC and 32 kHz oscillators, with voltage 1.62 V to 3.63 V; VDDIO and VDDANA are internally connected in this package. |
| 10 | GND | power_in | Ground pin for the digital power domain. |
| 11 | PA08 | bidirectional | Port A general-purpose I/O pin PA08 (VDDIO domain) with I2C, NMI, analog input AIN[16], PTC X[0], SERCOM0 PAD[0], SERCOM2 PAD[0] and TC0 WO[0]. |
| 12 | PA09 | bidirectional | Port A general-purpose I/O pin PA09 (VDDIO domain) with I2C, EXTINT[9], analog input AIN[17], PTC X[1], SERCOM0 PAD[1], SERCOM2 PAD[1] and TC0 WO[1]. |
| 13 | PA10 | bidirectional | Port A general-purpose I/O pin PA10 (VDDIO domain) with EXTINT[10], analog input AIN[18], PTC X[2], SERCOM0 PAD[2], SERCOM2 PAD[2], TC1 WO[0] and GCLK_IO[4]. |
| 14 | PA11 | bidirectional | Port A general-purpose I/O pin PA11 (VDDIO domain) with EXTINT[11], analog input AIN[19], PTC X[3], SERCOM0 PAD[3], SERCOM2 PAD[3], TC1 WO[1] and GCLK_IO[5]. |
| 15 | PA14 | bidirectional | Port A general-purpose I/O pin PA14 (VDDIO domain) with EXTINT[14], SERCOM2 PAD[2], SERCOM4 PAD[2], TC3 WO[0] and GCLK_IO[0]; it is also the XIN crystal oscillator input when XOSC is used. |
| 16 | PA15 | bidirectional | Port A general-purpose I/O pin PA15 (VDDIO domain) with EXTINT[15], SERCOM2 PAD[3], SERCOM4 PAD[3], TC3 WO[1] and GCLK_IO[1]; it is also the XOUT crystal oscillator output when XOSC is used. |
| 17 | PA16 | bidirectional | Port A general-purpose I/O pin PA16 (VDDIO domain) with I2C, EXTINT[0], PTC X[4], SERCOM1 PAD[0], SERCOM3 PAD[0], TC2 WO[0] and GCLK_IO[2]. |
| 18 | PA17 | bidirectional | Port A general-purpose I/O pin PA17 (VDDIO domain) with I2C, EXTINT[1], PTC X[5], SERCOM1 PAD[1], SERCOM3 PAD[1], TC2 WO[1] and GCLK_IO[3]. |
| 19 | PA18 | bidirectional | Port A general-purpose I/O pin PA18 (VDDIO domain) with EXTINT[2], PTC X[6], SERCOM1 PAD[2], SERCOM3 PAD[2], TC3 WO[0] and AC CMP[0]. |
| 20 | PA19 | bidirectional | Port A general-purpose I/O pin PA19 (VDDIO domain) with EXTINT[3], PTC X[7], SERCOM1 PAD[3], SERCOM3 PAD[3], TC3 WO[1] and AC CMP[1]. |
| 21 | PA22 | bidirectional | Port A general-purpose I/O pin PA22 (VDDIO domain) with I2C, EXTINT[6], PTC X[10], SERCOM3 PAD[0], SERCOM5 PAD[0], TC4 WO[0] and GCLK_IO[6]. |
| 22 | PA23 | bidirectional | Port A general-purpose I/O pin PA23 (VDDIO domain) with I2C, EXTINT[7], PTC X[11], SERCOM3 PAD[1], SERCOM5 PAD[1], TC4 WO[1] and GCLK_IO[7]. |
| 23 | PA24 | bidirectional | Port A general-purpose I/O pin PA24 (VDDIO domain) with EXTINT[12], SERCOM3 PAD[2], SERCOM5 PAD[2] and TC5 WO[0]. |
| 24 | PA25 | bidirectional | Port A general-purpose I/O pin PA25 (VDDIO domain) with EXTINT[13], SERCOM3 PAD[3], SERCOM5 PAD[3] and TC5 WO[1]. |
| 25 | PA27 | bidirectional | Port A general-purpose I/O pin PA27 (VDDIO domain) with EXTINT[15] and GCLK_IO[0]. |
| 26 | RESET | input | External active-low reset input; the RESET pin has an internal pull-up and its low-level threshold is below 0.33 times VDDIO for 1.6 V to 2.0 V VDDIO or below 0.36 times VDDIO for 2.7 V to 3.6 V VDDIO. |
| 27 | PA28 | bidirectional | Port A general-purpose I/O pin PA28 (VDDIO domain) with EXTINT[8] and GCLK_IO[0]. |
| 28 | GND | power_in | Ground pin for the digital power domain. |
| 29 | VDDCORE | power_out | Internal regulated core voltage output of 1.2 V that powers the core, memories, peripherals and DFLL48M, decoupled per the schematic checklist. |
| 30 | VDDIN | power_in | Input supply for I/O lines and the internal voltage regulator, operating from 1.62 V to 3.63 V. |
| 31 | PA30 | bidirectional | Port A general-purpose I/O pin PA30 (VDDIO domain) with EXTINT[10], SERCOM1 PAD[2], TC1 WO[0], GCLK_IO[0] and the SWCLK serial wire debug clock function. |
| 32 | PA31 | bidirectional | Port A general-purpose I/O pin PA31 (VDDIO domain) with EXTINT[11], SERCOM1 PAD[3] and TC1 WO[1], and the SWDIO serial wire debug data function active when a debugger is present. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| I/O supply voltage | VDDIO | 1.62 | | 3.63 | V | Powers I/O lines, OSC8M and XOSC | 27 |
| Input supply voltage | VDDIN | 1.62 | | 3.63 | V | Powers I/O lines and the internal regulator | 27 |
| Analog supply voltage | VDDANA | 1.62 | | 3.63 | V | Powers I/O lines and ADC, AC, DAC, PTC, OSCULP32K, OSC32K, XOSC32K | 27 |
| Operating temperature | | -40 | | 85 | °C | Grade U (-40 to 85 °C) with 1.62V-3.63V, DC up to 48 MHz | 1 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. | 551 |
## CAD (KiCad official)
- Symbol: `ATSAMD20E18A-AU`
- Footprint: `Package_QFP:TQFP-32_7x7mm_P0.8mm`
- 3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files: `atsamd20e18a-au-etched.step` / `atsamd20e18a-au-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `atsamd20e18a-au.step` / `atsamd20e18a-au.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/atsamd20e18a-au-datasheet.pdf) (731 pp, sha256 `2505526f248dd8c2`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `off` (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/atsamd20e18a-au-datasheet.pdf)