# ATSAMD10C13A-SSUT

**Microchip Tech** · Pre-ordered MCUs · SOIC-14

ATSAMD10C13A-SSUT from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA05 | bidirectional | General-purpose I/O on the VDD domain with EXTINT[5], ADC AIN[3], AC AIN[1], PTC Y[3], SERCOM0 PAD[3]/PAD[1] and TC1/WO[1], TCC0/WO[1] options. |
| 2 | PA08 | bidirectional | General-purpose I/O on the VDD domain with EXTINT[6], XIN/XIN32 oscillator input, SERCOM1/SERCOM0 PAD[2], TCC0/WO[2],WO[4] and GCLK_IO[0] options. |
| 3 | PA09 | bidirectional | General-purpose I/O on the VDD domain with EXTINT[7], XOUT/XOUT32 oscillator output, SERCOM1/SERCOM0 PAD[3], TCC0/WO[3],WO[5] and GCLK_IO[1] options. |
| 4 | PA14 | bidirectional | I2C-capable general-purpose I/O with NMI, ADC AIN[6], AC CMP[0], PTC X[0]/Y[6], SERCOM0/SERCOM2 PAD[0], TC1/WO[0], TCC0/WO[0] and GCLK_IO[4] options. |
| 5 | PA15 | bidirectional | I2C-capable general-purpose I/O with EXTINT[1], ADC AIN[7], AC CMP[1], PTC X[1]/Y[7], SERCOM0/SERCOM2 PAD[1], TC1/WO[1], TCC0/WO[1] and GCLK_IO[5] options. |
| 6 | PA28/RST | input | Active-low external reset input (RESET function enabled by default after power-up, with internal pull-up), usable as GPIO PA28 if the reset function is disabled. |
| 7 | PA30 | bidirectional | General-purpose I/O that is also the SWCLK serial wire debug clock (VDDIO domain), with EXTINT[2], SERCOM1 PAD[0]/PAD[2], TC2/WO[0], TCC0/WO[2] and GCLK_IO[0] options; a 1kΩ pull-up is recommended for reliability. |
| 8 | PA31 | bidirectional | General-purpose I/O that switches to the SWDIO serial wire debug data function when a debugger is detected, with EXTINT[3], SERCOM1 PAD[1]/PAD[3], TC2/WO[1], TCC0/WO[3] and GCLK_IO[0] options. |
| 9 | PA24 | bidirectional | General-purpose I/O with EXTINT[4], PTC X[8]/Y[14], SERCOM1/SERCOM2 PAD[2], TCC0/WO[2],WO[4] and GCLK_IO[0] options; enable a pull-up if left unconnected to avoid extra consumption (<1mA). |
| 10 | PA25 | bidirectional | General-purpose I/O with EXTINT[5], PTC X[9]/Y[15], SERCOM1/SERCOM2 PAD[3], TCC0/WO[3] and GCLK_IO[0] options; enable a pull-up if left unconnected to avoid extra consumption (<1mA). |
| 11 | GND | power_in | Ground pin of the device. |
| 12 | VDDIO/IN/ANA | power_in | Single supply input (1.62V to 3.63V) powering I/O lines, oscillators, internal regulator, ADC, AC, DAC and PTC; decouple with 100nF and 4.7µF. |
| 13 | PA02 | bidirectional | General-purpose I/O on the VDD domain with EXTINT[2], ADC AIN[0], PTC Y[0] and DAC VOUT analog output options. |
| 14 | PA04 | bidirectional | General-purpose I/O on the VDD domain with EXTINT[4], ADC/VREFB reference, ADC AIN[2], AC AIN[0], PTC Y[2], SERCOM0 PAD[2]/PAD[0] and TC1/WO[0], TCC0/WO[0] options. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VDDIO/IN/ANA | 1.62 |  | 3.63 | V | Powers I/O lines, internal regulator, ADC, AC, DAC, PTC, oscillators | 17 |
| Operating temperature (U grade) |  | -40 |  | 85 | °C | Package grade U = -40 - 85°C, Matte Sn plating | 5 |
| Maximum CPU frequency |  |  |  | 48 | MHz | SAM D10C 14-pin SOIC | 4 |
| Internal regulated voltage output |  |  | 1.2 |  | V | Powers the core, memories, peripherals, DFLL48M and FDPLL96M | 17 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin | indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. | 800 |

## CAD (KiCad official)

- Symbol: `ATSAMD10C13A-SSUT`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `atsamd10c13a-ssut-etched.step` / `atsamd10c13a-ssut-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `atsamd10c13a-ssut.step` / `atsamd10c13a-ssut.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](docs/atsamd10c13a-ssut-datasheet.pdf) (918 pp, sha256 `b37c3b142e1efb03`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/atsamd10c13a-ssut-datasheet.pdf)