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ATSAMC21J18A-MUT64

Microchip Tech · Microcontrollers (MCU/MPU/SOC) · VQFN-64(9x9)

ATSAMC21J18A-MUT64 from Microchip Tech, in a VQFN-64(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA00 bidirectional General-purpose I/O on VDDANA supply with EXTINT[0], SERCOM1/PAD[0], TCC2/WO[0] and XIN32 (32.768 kHz crystal input).
2 PA01 bidirectional General-purpose I/O on VDDANA supply with EXTINT[1], SERCOM1/PAD[1], TCC2/WO[1] and XOUT32 (32.768 kHz crystal output).
3 PA02 bidirectional General-purpose I/O on VDDANA supply with EXTINT[2], ADC0 AIN[0], ADC1 AIN[4], PTC Y[0] and DAC VOUT.
4 PA03 bidirectional General-purpose I/O on VDDANA supply with EXTINT[3], ADC/DAC VREFA, ADC0 AIN[1], ADC1 AIN[5] and PTC Y[1].
5 PB04 bidirectional General-purpose I/O on VDDANA supply with EXTINT[4], ADC1 AIN[6] and PTC Y[10].
6 PB05 bidirectional General-purpose I/O on VDDANA supply with EXTINT[5], ADC0 AIN[7], ADC1 AIN[6] and PTC Y[11].
7 GNDANA power_in Ground for the analog supply domain (VDDANA).
8 VDDANA power_in Analog supply input powering the analog-domain I/O pins (PA00-PA07, PB00-PB09 and others).
9 PB06 bidirectional General-purpose I/O on VDDANA supply with EXTINT[6], ADC0 AIN[8], ADC1 AIN[7], PTC Y[12], SDADC AINN[2] and CCL2/IN[6].
10 PB07 bidirectional General-purpose I/O on VDDANA supply with EXTINT[7], ADC0 AIN[9], PTC Y[13], SDADC AINP[2] and CCL2/IN[7].
11 PB08 bidirectional General-purpose I/O on VDDANA supply with EXTINT[8], ADC0 AIN[2], ADC1 AIN[4], PTC Y[14], SDADC AINN[1], SERCOM4/PAD[0], TC0/WO[0] and CCL2/IN[8].
12 PB09 bidirectional General-purpose I/O on VDDANA supply with EXTINT[9], ADC0 AIN[3], ADC1 AIN[5], PTC Y[15], SDADC AINP[1], SERCOM4/PAD[1], TC0/WO[1] and CCL2/OUT[2].
13 PA04 bidirectional General-purpose I/O on VDDANA supply with EXTINT[4], SDADC VREFB, ADC0 AIN[4], ADC1 AIN[0], PTC Y[2], SERCOM0/PAD[0], TCC0/WO[0] and CCL0/IN[0].
14 PA05 bidirectional General-purpose I/O on VDDANA supply with EXTINT[5], ADC0 AIN[5], ADC1 AIN[1], PTC Y[3], SERCOM0/PAD[1], TCC0/WO[1] and CCL0/IN[1].
15 PA06 bidirectional General-purpose I/O on VDDANA supply with EXTINT[6], ADC0 AIN[6], ADC1 AIN[2], PTC Y[4], SDADC AINN[0], SERCOM0/PAD[2], TCC1/WO[0] and CCL0/IN[2].
16 PA07 bidirectional General-purpose I/O on VDDANA supply with EXTINT[7], ADC0 AIN[7], ADC1 AIN[3], PTC Y[5], SDADC AINP[0], SERCOM0/PAD[3], TCC1/WO[1] and CCL0/OUT[0].
17 PA08 bidirectional General-purpose I/O on VDDIO supply with NMI, ADC0 AIN[8], ADC1 AIN[10], PTC X[0]/Y[16], SERCOM0/PAD[0], SERCOM2/PAD[0], TCC0/WO[0], TCC1/WO[2] and CCL1/IN[3].
18 PA09 bidirectional General-purpose I/O on VDDIO supply with EXTINT[9], ADC0 AIN[9], ADC1 AIN[11], PTC X[1]/Y[17], SERCOM0/PAD[1], SERCOM2/PAD[1], TCC0/WO[1], TCC1/WO[3] and CCL1/IN[4].
19 PA10 bidirectional General-purpose I/O on VDDIO supply with EXTINT[10], ADC0 AIN[10], PTC X[2]/Y[18], SERCOM0/PAD[2], SERCOM2/PAD[2], TCC1/WO[0], TCC0/WO[2], GCLK_IO[4] and CCL1/IN[5].
20 PA11 bidirectional General-purpose I/O on VDDIO supply with EXTINT[11], ADC0 AIN[11], PTC X[3]/Y[19], SERCOM0/PAD[3], SERCOM2/PAD[3], TCC1/WO[1], TCC0/WO[3], GCLK_IO[5] and CCL1/OUT[1].
21 VDDIO power_in Digital I/O supply input for the VDDIO-domain pins (PA08-PA11, PB10-PB15 cluster).
22 GND power_in Ground.
23 PB10 bidirectional General-purpose I/O on VDDIO supply with EXTINT[10], SERCOM4/PAD[2], TC1/WO[0], TCC0/WO[4], CAN1/TX, GCLK_IO[4] and CCL1/IN[5].
24 PB11 bidirectional General-purpose I/O on VDDIO supply with EXTINT[11], SERCOM4/PAD[3], TC1/WO[1], TCC0/WO[5], CAN1/RX, GCLK_IO[5] and CCL1/OUT[1].
25 PB12 bidirectional General-purpose I/O on VDDIO supply with EXTINT[12], PTC X[12]/Y[28], SERCOM4/PAD[0], TC0/WO[0], TCC0/WO[6] and GCLK_IO[6].
26 PB13 bidirectional General-purpose I/O on VDDIO supply with EXTINT[13], PTC X[13]/Y[29], SERCOM4/PAD[1], TC0/WO[1], TCC0/WO[7] and GCLK_IO[7].
27 PB14 bidirectional General-purpose I/O on VDDIO supply with EXTINT[14], PTC X[14]/Y[30], SERCOM4/PAD[2], TC1/WO[0], CAN1/TX, GCLK_IO[0] and CCL3/IN[9].
28 PB15 bidirectional General-purpose I/O on VDDIO supply with EXTINT[15], PTC X[15]/Y[31], SERCOM4/PAD[3], TC1/WO[1], CAN1/RX, GCLK_IO[1] and CCL3/IN[10].
29 PA12 bidirectional General-purpose I/O on VDDIO supply with EXTINT[12], SERCOM2/PAD[0], SERCOM4/PAD[0], TCC2/WO[0], TCC0/WO[6] and AC CMP[0].
30 PA13 bidirectional General-purpose I/O on VDDIO supply with EXTINT[13], SERCOM2/PAD[1], SERCOM4/PAD[1], TCC2/WO[1], TCC0/WO[7] and AC CMP[1].
31 PA14 bidirectional General-purpose I/O on VDDIO supply with EXTINT[14], SERCOM2/PAD[2], SERCOM4/PAD[2], TC4/WO[0], TCC0/WO[4], GCLK_IO[0] and XIN (crystal or external clock input).
32 PA15 bidirectional General-purpose I/O on VDDIO supply with EXTINT[15], SERCOM2/PAD[3], SERCOM4/PAD[3], TC4/WO[1], TCC0/WO[5], GCLK_IO[1] and XOUT (crystal output).
33 GND power_in Ground.
34 VDDIO power_in Digital I/O supply input for the VDDIO-domain pins.
35 PA16 bidirectional General-purpose I/O on VDDIO supply with EXTINT[0], PTC X[4]/Y[20], SERCOM1/PAD[0], SERCOM3/PAD[0], TCC2/WO[0], TCC0/WO[6], GCLK_IO[2] and CCL0/IN[0].
36 PA17 bidirectional General-purpose I/O on VDDIO supply with EXTINT[1], PTC X[5]/Y[21], SERCOM1/PAD[1], SERCOM3/PAD[1], TCC2/WO[1], TCC0/WO[7], GCLK_IO[3] and CCL0/IN[1].
37 PA18 bidirectional General-purpose I/O on VDDIO supply with EXTINT[2], PTC X[6]/Y[22], SERCOM1/PAD[2], SERCOM3/PAD[2], TC4/WO[0], TCC0/WO[2], AC CMP[0] and CCL0/IN[2].
38 PA19 bidirectional General-purpose I/O on VDDIO supply with EXTINT[3], PTC X[7]/Y[23], SERCOM1/PAD[3], SERCOM3/PAD[3], TC4/WO[1], TCC0/WO[3], AC CMP[1] and CCL0/OUT[0].
39 PB16 bidirectional General-purpose I/O on VDDIO supply with EXTINT[0], SERCOM5/PAD[0], TC2/WO[0], TCC0/WO[4], GCLK_IO[2] and CCL3/IN[11].
40 PB17 bidirectional General-purpose I/O on VDDIO supply with EXTINT[1], SERCOM5/PAD[1], TC2/WO[1], TCC0/WO[5], GCLK_IO[3] and CCL3/OUT[3].
41 PA20 bidirectional General-purpose I/O on VDDIO supply with EXTINT[4], PTC X[8]/Y[24], SERCOM5/PAD[2], SERCOM3/PAD[2], TC3/WO[0], TCC0/WO[6] and GCLK_IO[4].
42 PA21 bidirectional General-purpose I/O on VDDIO supply with EXTINT[5], PTC X[9]/Y[25], SERCOM5/PAD[3], SERCOM3/PAD[3], TC3/WO[1], TCC0/WO[7] and GCLK_IO[5].
43 PA22 bidirectional General-purpose I/O on VDDIO supply with EXTINT[6], PTC X[10]/Y[26], SERCOM3/PAD[0], SERCOM5/PAD[0], TC0/WO[0], TCC0/WO[4], GCLK_IO[6] and CCL2/IN[6].
44 PA23 bidirectional General-purpose I/O on VDDIO supply with EXTINT[7], PTC X[11]/Y[27], SERCOM3/PAD[1], SERCOM5/PAD[1], TC0/WO[1], TCC0/WO[5], GCLK_IO[7] and CCL2/IN[7].
45 PA24 bidirectional General-purpose I/O on VDDIO supply with EXTINT[12], SERCOM3/PAD[2], SERCOM5/PAD[2], TC1/WO[0], TCC1/WO[2], CAN0/TX, AC CMP[2] and CCL2/IN[8].
46 PA25 bidirectional General-purpose I/O on VDDIO supply with EXTINT[13], SERCOM3/PAD[3], SERCOM5/PAD[3], TC1/WO[1], TCC1/WO[3], CAN0/RX, AC CMP[3] and CCL2/OUT[2].
47 GND power_in Ground.
48 VDDIO power_in Digital I/O supply input for the VDDIO-domain pins.
49 PB22 bidirectional General-purpose I/O on VDDIO supply with EXTINT[6], SERCOM5/PAD[2], TC3/WO[0], CAN0/TX, GCLK_IO[0] and CCL0/IN[0].
50 PB23 bidirectional General-purpose I/O on VDDIO supply with EXTINT[7], SERCOM5/PAD[3], TC3/WO[1], CAN0/RX, GCLK_IO[1] and CCL0/OUT[0].
51 PA27 bidirectional General-purpose I/O on VDDIN supply with EXTINT[15] and GCLK_IO[0].
52 RESET input Active-low external reset input.
53 PA28 bidirectional General-purpose I/O on VDDIN supply with EXTINT[8] and GCLK_IO[0].
54 GND power_in Ground.
55 VDDCORE power_out Regulated output supply for the core, to be decoupled externally.
56 VDDIN power_in Input supply for the internal regulator and the VDDIN-domain I/O pins.
57 PA30 bidirectional General-purpose I/O on VDDIN supply with EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0], GCLK_IO[0], CCL1/IN[3] and SWCLK (serial wire debug clock).
58 PA31 bidirectional General-purpose I/O on VDDIN supply with EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1], CCL1/OUT[1] and SWDIO (serial wire debug data).
59 PB30 bidirectional General-purpose I/O on VDDIN supply with EXTINT[14], SERCOM5/PAD[0], TCC0/WO[0], TCC1/WO[2] and AC CMP[2].
60 PB31 bidirectional General-purpose I/O on VDDIN supply with EXTINT[15], SERCOM5/PAD[1], TCC0/WO[1], TCC1/WO[3] and AC CMP[3].
61 PB00 bidirectional General-purpose I/O on VDDANA supply with EXTINT[0], ADC0 AIN[0], PTC Y[6], SERCOM5/PAD[2], TC3/WO[0] and CCL0/IN[1].
62 PB01 bidirectional General-purpose I/O on VDDANA supply with EXTINT[1], ADC0 AIN[1], PTC Y[7], SERCOM5/PAD[3], TC3/WO[1] and CCL0/IN[2].
63 PB02 bidirectional General-purpose I/O on VDDANA supply with EXTINT[2], ADC0 AIN[2], PTC Y[8], SERCOM5/PAD[0], TC2/WO[0] and CCL0/OUT[0].
64 PB03 bidirectional General-purpose I/O on VDDANA supply with EXTINT[3], ADC0 AIN[3], PTC Y[9], SERCOM5/PAD[1] and TC2/WO[1].
65 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package VQFN-64(9x9)
Category Embedded Processors & Controllers
Pins 65

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range (VDDIN, VDDANA; VDDIO) VDD 2.7 5.5 V Operating conditions, -40°C to +85°C, DC to 64 MHz 1
Operating temperature (grade U) -40 85 °C DC to 64 MHz 1
CPU clock frequency fCPU 0 64 MHz -40°C to +85°C 1
VDDCORE internal regulated voltage VDDCORE 1.2 V Internal regulated voltage output 38

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 10.3. Micro Trace Buffer MTB base address corrected from 0x41006000 to 0x41008000. 22. SUPC, Supply Controller 22.6.3.3. VDD Brown-Out Detector (BODVDD): Removed 1198
contacts tin including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the Self Capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. 987

CAD (KiCad official)

  • Symbol: ATSAMC21J18A-MUT64
  • Footprint: Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • 3D model: VQFN-64(9x9) (KiCad packages3D, STEP)
  • 3D model files: atsamc21j18a-mut64-etched.step / atsamc21j18a-mut64-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsamc21j18a-mut64.step / atsamc21j18a-mut64.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1206 pp, sha256 5991eaad10c5cd35, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF