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ATSAMC21J18A-AUT

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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ATSAMC21J18A-AUT

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-64(10x10)

ATSAMC21J18A-AUT from Microchip Tech, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA00 bidirectional PORT group A pin 0, multiplexed to EXTINT[0], SERCOM1 PAD[0], TCC2/WO[0] and CMP[2], and also used as XIN32 (32.768 kHz crystal input) per Table 6-5.
2 PA01 bidirectional PORT group A pin 1, multiplexed to EXTINT[1], SERCOM1 PAD[1], TCC2/WO[1] and CMP[3], and also used as XOUT32 (32.768 kHz crystal output) per Table 6-5.
3 PA02 bidirectional PORT group A pin 2, an analog-capable pin on VDDANA with AIN[0], AIN[4], Y[0] and VOUT (DAC output) functions.
4 PA03 bidirectional PORT group A pin 3, an analog-capable pin on VDDANA with AIN[1], AIN[5], Y[1] and the ADC/DAC VREFA reference function.
5 PB04 bidirectional PORT group B pin 4, an analog-capable pin on VDDANA with EXTINT[4], AIN[6] and Y[10] functions.
6 PB05 bidirectional PORT group B pin 5, an analog-capable pin on VDDANA with EXTINT[5], AIN[7] and Y[11] functions.
7 GNDANA power_in Analog ground reference for the ADC, DAC, and analog comparators.
8 VDDANA power_in Analog supply for the analog peripherals (ADC, DAC, AC, SDADC, PTC).
9 PB06 bidirectional PORT group B pin 6, on VDDIO with EXTINT[6], AIN[8], AINN[2], Y[12], SERCOM7 PAD[1] and CCL2/IN[6] functions.
10 PB07 bidirectional PORT group B pin 7, on VDDIO with EXTINT[7], AIN[9], AINP[2], Y[13], SERCOM7 PAD[3] and CCL2/IN[7] functions.
11 PB08 bidirectional PORT group B pin 8, on VDDIO with EXTINT[8], AIN[2], AIN[4], AINN[1], Y[14], SERCOM4 PAD[0] and TC0/WO[0] functions.
12 PB09 bidirectional PORT group B pin 9, on VDDIO with EXTINT[9], AIN[3], AIN[5], AINP[1], Y[15], SERCOM4 PAD[1] and TC0/WO[1] functions.
13 PA04 bidirectional PORT group A pin 4, on VDDANA with EXTINT[4], SDADC/VREFB, AIN[4], AIN[0], Y[2], SERCOM0 PAD[0] and TCC0/WO[0] functions.
14 PA05 bidirectional PORT group A pin 5, on VDDANA with EXTINT[5], AIN[5], AIN[1], Y[3], SERCOM0 PAD[1] and TCC0/WO[1] functions.
15 PA06 bidirectional PORT group A pin 6, on VDDANA with EXTINT[6], AIN[6], AIN[2], Y[4], AINN[0], SERCOM0 PAD[2] and TCC1/WO[0] functions.
16 PA07 bidirectional PORT group A pin 7, on VDDANA with EXTINT[7], AIN[7], AIN[3], Y[5], AINP[0], SERCOM0 PAD[3] and TCC1/WO[1] functions.
17 PA08 bidirectional PORT group A pin 8, on VDDIO with NMI, AIN[8], AIN[10], X[0]/Y[16], SERCOM0 PAD[0], SERCOM2 PAD[0], TCC0/WO[0] and TCC1/WO[2] functions.
18 PA09 bidirectional PORT group A pin 9, on VDDIO with EXTINT[9], AIN[9], AIN[11], X[1]/Y[17], SERCOM0 PAD[1], SERCOM2 PAD[1], TCC0/WO[1] and TCC1/WO[3] functions.
19 PA10 bidirectional PORT group A pin 10, on VDDIO with EXTINT[10], AIN[10], X[2]/Y[18], SERCOM0 PAD[2], SERCOM2 PAD[2], TCC1/WO[0], TCC0/WO[2] and GCLK_IO[4] functions.
20 PA11 bidirectional PORT group A pin 11, on VDDIO with EXTINT[11], AIN[11], X[3]/Y[19], SERCOM0 PAD[3], SERCOM2 PAD[3], TCC1/WO[1], TCC0/WO[3] and GCLK_IO[5] functions.
21 VDDIO power_in Digital I/O supply for the GPIO ring of this package.
22 GND power_in Digital ground.
23 PB10 bidirectional PORT group B pin 10, on VDDIO with EXTINT[10], SERCOM4 PAD[2], TC1/WO[0], TCC0/WO[4], CAN1/TX and GCLK_IO[4] functions.
24 PB11 bidirectional PORT group B pin 11, on VDDIO with EXTINT[11], SERCOM4 PAD[3], TC1/WO[1], TCC0/WO[5], CAN1/RX and GCLK_IO[5] functions.
25 PB12 bidirectional PORT group B pin 12, on VDDIO with EXTINT[12], X[12]/Y[28], SERCOM4 PAD[0], TC0/WO[0], TCC0/WO[6] and GCLK_IO[6] functions.
26 PB13 bidirectional PORT group B pin 13, on VDDIO with EXTINT[13], X[13]/Y[29], SERCOM4 PAD[1], TC0/WO[1], TCC0/WO[7] and GCLK_IO[7] functions.
27 PB14 bidirectional PORT group B pin 14, on VDDIO with EXTINT[14], X[14]/Y[30], SERCOM4 PAD[2], TC1/WO[0], CAN1/TX, GCLK_IO[0] and CCL3/IN[9] functions.
28 PB15 bidirectional PORT group B pin 15, on VDDIO with EXTINT[15], X[15]/Y[31], SERCOM4 PAD[3], TC1/WO[1], CAN1/RX, GCLK_IO[1] and CCL3/IN[10] functions.
29 PA12 bidirectional PORT group A pin 12, on VDDIO with EXTINT[12], SERCOM2 PAD[0], SERCOM4 PAD[0], TCC2/WO[0], TCC0/WO[6] and AC/CMP[0] functions.
30 PA13 bidirectional PORT group A pin 13, on VDDIO with EXTINT[13], SERCOM2 PAD[1], SERCOM4 PAD[1], TCC2/WO[1], TCC0/WO[7] and AC/CMP[1] functions.
31 PA14 bidirectional PORT group A pin 14, on VDDIO with EXTINT[14], SERCOM2 PAD[2], SERCOM4 PAD[2], TC4/WO[0], TCC0/WO[4] and GCLK_IO[0] functions; also the XOSC input (XIN) per Table 6-5.
32 PA15 bidirectional PORT group A pin 15, on VDDIO with EXTINT[15], SERCOM2 PAD[3], SERCOM4 PAD[3], TC4/WO[1], TCC0/WO[5] and GCLK_IO[1] functions; also the XOSC output (XOUT) per Table 6-5.
33 GND power_in Digital ground.
34 VDDIO power_in Digital I/O supply for the GPIO ring of this package.
35 PA16 bidirectional PORT group A pin 16, on VDDIO with EXTINT[0], X[4]/Y[20], SERCOM1 PAD[0], SERCOM3 PAD[0], TCC2/WO[0], TCC0/WO[6], GCLK_IO[2] and CCL0/IN[0] functions.
36 PA17 bidirectional PORT group A pin 17, on VDDIO with EXTINT[1], X[5]/Y[21], SERCOM1 PAD[1], SERCOM3 PAD[1], TCC2/WO[1], TCC0/WO[7], GCLK_IO[3] and CCL0/IN[1] functions.
37 PA18 bidirectional PORT group A pin 18, on VDDIO with EXTINT[2], X[6]/Y[22], SERCOM1 PAD[2], SERCOM3 PAD[2], TC4/WO[0], TCC0/WO[2], AC/CMP[0] and CCL0/IN[2] functions.
38 PA19 bidirectional PORT group A pin 19, on VDDIO with EXTINT[3], X[7]/Y[23], SERCOM1 PAD[3], SERCOM3 PAD[3], TC4/WO[1], TCC0/WO[3], AC/CMP[1] and CCL0/OUT[0] functions.
39 PB16 bidirectional PORT group B pin 16, on VDDIO with EXTINT[0], SERCOM5 PAD[0], TC2/WO[0], TCC0/WO[4], GCLK_IO[2] and CCL3/IN[11] functions.
40 PB17 bidirectional PORT group B pin 17, on VDDIO with EXTINT[1], SERCOM5 PAD[1], TC2/WO[1], TCC0/WO[5], GCLK_IO[3] and CCL3/OUT[3] functions.
41 PA20 bidirectional PORT group A pin 20, on VDDIO with EXTINT[4], X[8]/Y[24], SERCOM5 PAD[2], SERCOM3 PAD[2], TC3/WO[0], TCC0/WO[6] and GCLK_IO[4] functions.
42 PA21 bidirectional PORT group A pin 21, on VDDIO with EXTINT[5], X[9]/Y[25], SERCOM5 PAD[3], SERCOM3 PAD[3], TC3/WO[1], TCC0/WO[7] and GCLK_IO[5] functions.
43 PA22 bidirectional PORT group A pin 22, on VDDIO with EXTINT[6], X[10]/Y[26], SERCOM3 PAD[0], SERCOM5 PAD[0], TC0/WO[0], TCC0/WO[4], GCLK_IO[6] and CCL2/IN[6] functions.
44 PA23 bidirectional PORT group A pin 23, on VDDIO with EXTINT[7], X[11]/Y[27], SERCOM3 PAD[1], SERCOM5 PAD[1], TC0/WO[1], TCC0/WO[5], GCLK_IO[7] and CCL2/IN[7] functions.
45 PA24 bidirectional PORT group A pin 24, on VDDIO with EXTINT[12], SERCOM3 PAD[2], SERCOM5 PAD[2], TC1/WO[0], TCC1/WO[2], CAN0/TX, AC/CMP[2] and CCL2/IN[8] functions.
46 PA25 bidirectional PORT group A pin 25, on VDDIO with EXTINT[13], SERCOM3 PAD[3], SERCOM5 PAD[3], TC1/WO[1], TCC1/WO[3], CAN0/RX, AC/CMP[3] and CCL2/OUT[2] functions.
47 GND power_in Digital ground.
48 VDDIO power_in Digital I/O supply for the GPIO ring of this package.
49 PB22 bidirectional PORT group B pin 22, on VDDIN with EXTINT[6], SERCOM5 PAD[2], TC3/WO[0], CAN0/TX, GCLK_IO[0] and CCL0/IN[0] functions.
50 PB23 bidirectional PORT group B pin 23, on VDDIN with EXTINT[7], SERCOM5 PAD[3], TC3/WO[1], CAN0/RX, GCLK_IO[1] and CCL0/OUT[0] functions.
51 PA27 bidirectional PORT group A pin 27, on VDDIN with EXTINT[15] and GCLK_IO[0] functions.
52 RESET input External active-low reset input pin.
53 PA28 bidirectional PORT group A pin 28, on VDDIN with EXTINT[8] and GCLK_IO[0] functions.
54 GND power_in Digital ground.
55 VDDCORE power_out Regulated output of the internal voltage regulator that supplies the core; it is not an external supply input.
56 VDDIN power_in Input supply for the internal voltage regulator and the VDDIN-domain I/O (also used by PA27, PA28, PA30, PA31, PB22, PB23, PB30, PB31).
57 PA30 bidirectional PORT group A pin 30, on VDDIN with EXTINT[10], SERCOM1 PAD[2], TCC1/WO[0], CORTEX_M0P/SWCLK (Serial Wire Debug clock), GCLK_IO[0] and CCL1/IN[3] functions.
58 PA31 bidirectional PORT group A pin 31, on VDDIN with EXTINT[11], SERCOM1 PAD[3], TCC1/WO[1], CORTEX_M0P/SWDIO (Serial Wire Debug data) and CCL1/OUT[1] functions.
59 PB30 bidirectional PORT group B pin 30, on VDDIN with EXTINT[14], SERCOM5 PAD[0], TCC0/WO[0], TCC1/WO[2] and AC/CMP[2] functions.
60 PB31 bidirectional PORT group B pin 31, on VDDIN with EXTINT[15], SERCOM5 PAD[1], TCC0/WO[1], TCC1/WO[3] and AC/CMP[3] functions.
61 PB00 bidirectional PORT group B pin 0, on VDDANA with EXTINT[0], AIN[0], Y[6], SERCOM5 PAD[2], TC3/WO[0] and CCL0/IN[1] functions.
62 PB01 bidirectional PORT group B pin 1, on VDDANA with EXTINT[1], AIN[1], Y[7], SERCOM5 PAD[3], TC3/WO[1] and CCL0/IN[2] functions.
63 PB02 bidirectional PORT group B pin 2, on VDDANA with EXTINT[2], AIN[2], Y[8], SERCOM5 PAD[0], TC2/WO[0] and CCL0/OUT[0] functions.
64 PB03 bidirectional PORT group B pin 3, on VDDANA with EXTINT[3], AIN[3], Y[9], SERCOM5 PAD[1] and TC2/WO[1] functions.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-64(10x10)
Category Single Chip Microcomputer/Microcontroller
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating supply voltage, VDD (VDDIN and VDDANA common voltage) VDD 2.7 5.5 V Common supply on VDDIN and VDDANA 38
I/O supply voltage (VDDIO) VDDIO 2.7 5.5 V Powers I/O lines and XOSC 38
Operating temperature range (grade U, -40°C to +85°C) -40 85 °C DC to 64 MHz 1

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 10.3. Micro Trace Buffer MTB base address corrected from 0x41006000 to 0x41008000. 22. SUPC, Supply Controller 22.6.3.3. VDD Brown-Out Detector (BODVDD): Removed 1198
contacts tin including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the Self Capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. 987

CAD (KiCad official)

  • Symbol: ATSAMC21J18A-AUT
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: atsamc21j18a-aut-etched.step / atsamc21j18a-aut-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsamc21j18a-aut.step / atsamc21j18a-aut.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1206 pp, sha256 5991eaad10c5cd35, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF