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ATSAMC21G18A-AUT

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Microchip Tech MICROCHIP, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ATSAMC21G18A-AUT

Microchip Tech · MICROCHIP · TQFP-48(7x7)

ATSAMC21G18A-AUT from Microchip Tech, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA00 bidirectional GPIO on VDDANA with EXTINT[0], SERCOM1/PAD[0], TCC2/WO[0], AC CMP[2] and XIN32 (32.768 kHz crystal input).
2 PA01 bidirectional GPIO on VDDANA with EXTINT[1], SERCOM1/PAD[1], TCC2/WO[1], AC CMP[3] and XOUT32 (32.768 kHz crystal output).
3 PA02 bidirectional GPIO on VDDANA with EXTINT[2], ADC0 AIN[0], ADC1 AIN[4], PTC Y[0] and DAC VOUT.
4 PA03 bidirectional GPIO on VDDANA with EXTINT[3], ADC/DAC external reference VREFA, ADC0 AIN[1], ADC1 AIN[5] and PTC Y[1].
5 GNDANA power_in Analog ground reference.
6 VDDANA power_in Analog supply input for the VDDANA-domain pins.
7 PB08 bidirectional GPIO on VDDANA with EXTINT[8], ADC0 AIN[2], ADC1 AIN[4], PTC Y[14], SDADC AINN[1], SERCOM4/PAD[0], TC0/WO[0] and CCL2/IN[8].
8 PB09 bidirectional GPIO on VDDANA with EXTINT[9], ADC0 AIN[3], ADC1 AIN[5], PTC Y[15], SDADC AINP[1], SERCOM4/PAD[1], TC0/WO[1] and CCL2/OUT[2].
9 PA04 bidirectional GPIO on VDDANA with EXTINT[4], SDADC VREFB, ADC0 AIN[4], ADC1 AIN[0], PTC Y[2], SERCOM0/PAD[0], TCC0/WO[0] and CCL0/IN[0].
10 PA05 bidirectional GPIO on VDDANA with EXTINT[5], ADC0 AIN[5], ADC1 AIN[1], PTC Y[3], SERCOM0/PAD[1], TCC0/WO[1] and CCL0/IN[1].
11 PA06 bidirectional GPIO on VDDANA with EXTINT[6], ADC0 AIN[6], ADC1 AIN[2], PTC Y[4], SDADC AINN[0], SERCOM0/PAD[2], TCC1/WO[0] and CCL0/IN[2].
12 PA07 bidirectional GPIO on VDDANA with EXTINT[7], ADC0 AIN[7], ADC1 AIN[3], PTC Y[5], SDADC AINP[0], SERCOM0/PAD[3], TCC1/WO[1] and CCL0/OUT[0].
13 PA08 bidirectional GPIO on VDDIO with NMI, ADC0 AIN[8], ADC1 AIN[10], PTC X[0]/Y[16], SERCOM0/PAD[0], SERCOM2/PAD[0], TCC0/WO[0], TCC1/WO[2] and CCL1/IN[3]; supports I2C.
14 PA09 bidirectional GPIO on VDDIO with EXTINT[9], ADC0 AIN[9], ADC1 AIN[11], PTC X[1]/Y[17], SERCOM0/PAD[1], SERCOM2/PAD[1], TCC0/WO[1], TCC1/WO[3] and CCL1/IN[4]; supports I2C.
15 PA10 bidirectional GPIO on VDDIO with EXTINT[10], ADC1 AIN[10], PTC X[2]/Y[18], SERCOM0/PAD[2], SERCOM2/PAD[2], TCC1/WO[0], TCC0/WO[2], GCLK_IO[4] and CCL1/IN[5].
16 PA11 bidirectional GPIO on VDDIO with EXTINT[11], ADC1 AIN[11], PTC X[3]/Y[19], SERCOM0/PAD[3], SERCOM2/PAD[3], TCC1/WO[1], TCC0/WO[3], GCLK_IO[5] and CCL1/OUT[1].
17 VDDIO power_in Digital I/O supply input for the VDDIO-domain pins.
18 GND power_in Ground.
19 PB10 bidirectional GPIO on VDDIO with EXTINT[10], SERCOM4/PAD[2], TC1/WO[0], TCC0/WO[4], CAN1/TX, GCLK_IO[4] and CCL1/IN[5].
20 PB11 bidirectional GPIO on VDDIO with EXTINT[11], SERCOM4/PAD[3], TC1/WO[1], TCC0/WO[5], CAN1/RX, GCLK_IO[5] and CCL1/OUT[1].
21 PA12 bidirectional GPIO on VDDIO with EXTINT[12], SERCOM2/PAD[0], SERCOM4/PAD[0], TCC2/WO[0], TCC0/WO[6] and AC CMP[0]; supports I2C.
22 PA13 bidirectional GPIO on VDDIO with EXTINT[13], SERCOM2/PAD[1], SERCOM4/PAD[1], TCC2/WO[1], TCC0/WO[7] and AC CMP[1]; supports I2C.
23 PA14 bidirectional GPIO on VDDIO with EXTINT[14], SERCOM2/PAD[2], SERCOM4/PAD[2], TC4/WO[0], TCC0/WO[4], GCLK_IO[0] and XIN (crystal or external clock input).
24 PA15 bidirectional GPIO on VDDIO with EXTINT[15], SERCOM2/PAD[3], SERCOM4/PAD[3], TC4/WO[1], TCC0/WO[5], GCLK_IO[1] and XOUT (crystal output).
25 PA16 bidirectional GPIO on VDDIO with EXTINT[0], PTC X[4]/Y[20], SERCOM1/PAD[0], SERCOM3/PAD[0], TCC2/WO[0], TCC0/WO[6], GCLK_IO[2] and CCL0/IN[0]; supports I2C.
26 PA17 bidirectional GPIO on VDDIO with EXTINT[1], PTC X[5]/Y[21], SERCOM1/PAD[1], SERCOM3/PAD[1], TCC2/WO[1], TCC0/WO[7], GCLK_IO[3] and CCL0/IN[1]; supports I2C.
27 PA18 bidirectional GPIO on VDDIO with EXTINT[2], PTC X[6]/Y[22], SERCOM1/PAD[2], SERCOM3/PAD[2], TC4/WO[0], TCC0/WO[2], AC CMP[0] and CCL0/IN[2].
28 PA19 bidirectional GPIO on VDDIO with EXTINT[3], PTC X[7]/Y[23], SERCOM1/PAD[3], SERCOM3/PAD[3], TC4/WO[1], TCC0/WO[3], AC CMP[1] and CCL0/OUT[0].
29 PA20 bidirectional GPIO on VDDIO with EXTINT[4], PTC X[8]/Y[24], SERCOM5/PAD[2], SERCOM3/PAD[2], TC3/WO[0], TCC0/WO[6] and GCLK_IO[4].
30 PA21 bidirectional GPIO on VDDIO with EXTINT[5], PTC X[9]/Y[25], SERCOM5/PAD[3], SERCOM3/PAD[3], TC3/WO[1], TCC0/WO[7] and GCLK_IO[5].
31 PA22 bidirectional GPIO on VDDIO with EXTINT[6], PTC X[10]/Y[26], SERCOM3/PAD[0], SERCOM5/PAD[0], TC0/WO[0], TCC0/WO[4], GCLK_IO[6] and CCL2/IN[6]; supports I2C.
32 PA23 bidirectional GPIO on VDDIO with EXTINT[7], PTC X[11]/Y[27], SERCOM3/PAD[1], SERCOM5/PAD[1], TC0/WO[1], TCC0/WO[5], GCLK_IO[7] and CCL2/IN[7]; supports I2C.
33 PA24 bidirectional GPIO on VDDIO with EXTINT[12], SERCOM3/PAD[2], SERCOM5/PAD[2], TC1/WO[0], TCC1/WO[2], CAN0/TX, AC CMP[2] and CCL2/IN[8].
34 PA25 bidirectional GPIO on VDDIO with EXTINT[13], SERCOM3/PAD[3], SERCOM5/PAD[3], TC1/WO[1], TCC1/WO[3], CAN0/RX, AC CMP[3] and CCL2/OUT[2].
35 GND power_in Ground.
36 VDDIO power_in Digital I/O supply input for the VDDIO-domain pins.
37 PB22 bidirectional GPIO on VDDIO with EXTINT[6], SERCOM5/PAD[2], TC3/WO[0], CAN0/TX, GCLK_IO[0] and CCL0/IN[0].
38 PB23 bidirectional GPIO on VDDIO with EXTINT[7], SERCOM5/PAD[3], TC3/WO[1], CAN0/RX, GCLK_IO[1] and CCL0/OUT[0].
39 PA27 bidirectional GPIO on VDDIN with EXTINT[15] and GCLK_IO[0].
40 RESET input External reset input, active low.
41 PA28 bidirectional GPIO on VDDIN with EXTINT[8] and GCLK_IO[0].
42 GND power_in Ground.
43 VDDCORE power_out Regulated output supply for the core.
44 VDDIN power_in Input supply for the internal regulator and the VDDIN-domain pins.
45 PA30 bidirectional GPIO on VDDIN with EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0], GCLK_IO[0], CCL1/IN[3] and SWCLK (serial wire debug clock).
46 PA31 bidirectional GPIO on VDDIN with EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1], CCL1/OUT[1] and SWDIO (serial wire debug data).
47 PB02 bidirectional GPIO on VDDANA with EXTINT[2], ADC0 AIN[2], PTC Y[8], SERCOM5/PAD[0], TC2/WO[0] and CCL0/OUT[0].
48 PB03 bidirectional GPIO on VDDANA with EXTINT[3], ADC0 AIN[3], PTC Y[9], SERCOM5/PAD[1] and TC2/WO[1].

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDDIO VDDIO 2.7 5.5 V Powers I/O lines and XOSC; must be <= VDDIN 38
Supply voltage VDDIN VDDIN 2.7 5.5 V Powers I/O lines, OSC48M, TOSC and internal regulator 38
Supply voltage VDDANA VDDANA 2.7 5.5 V Powers I/O lines and ADC, AC, DAC, PTC, SDADC, OSCULP32K, OSC32K, XOSC32K; same voltage as VDDIN 38
Core regulated voltage VDDCORE VDDCORE 1.2 V Internal regulated voltage output 38
Operating temperature -40 85 °C Package grade U (-40 to 85°C) 18
Maximum CPU frequency fCPU 48 MHz No speed character in ordering code: OSC48M standard accuracy, CPU at 48 MHz 18

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 10.3. Micro Trace Buffer MTB base address corrected from 0x41006000 to 0x41008000. 22. SUPC, Supply Controller 22.6.3.3. VDD Brown-Out Detector (BODVDD): Removed 1198
contacts tin including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the Self Capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. 987

CAD (KiCad official)

  • Symbol: ATSAMC21G18A-AUT
  • Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
  • 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: atsamc21g18a-aut-etched.step / atsamc21g18a-aut-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsamc21g18a-aut.step / atsamc21g18a-aut.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1206 pp, sha256 5991eaad10c5cd35, retrieved 2026-10-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF