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ATSAMC21E18A-MNT
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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ATSAMC21E18A-MNT
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · VQFN-32-EP(5x5)
ATSAMC21E18A-MNT from Microchip Tech, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA00 | bidirectional | GPIO on VDDANA with EXTINT[0], SERCOM1/PAD[0], TCC2/WO[0], AC CMP[2], and XIN32 for the 32.768 kHz crystal. |
| 2 | PA01 | bidirectional | GPIO on VDDANA with EXTINT[1], SERCOM1/PAD[1], TCC2/WO[1], AC CMP[3], and XOUT32 for the 32.768 kHz crystal. |
| 3 | PA02 | bidirectional | GPIO on VDDANA with EXTINT[2], ADC0 AIN[0], ADC1 AIN[4], PTC Y[0], and DAC VOUT. |
| 4 | PA03 | bidirectional | GPIO on VDDANA with EXTINT[3], ADC/DAC VREFA, ADC0 AIN[1], ADC1 AIN[5], and PTC Y[1]. |
| 5 | PA04 | bidirectional | GPIO on VDDANA with EXTINT[4], SDADC VREFB, ADC0 AIN[4], ADC1 AIN[0], PTC Y[2], SERCOM0/PAD[0], TCC0/WO[0], CCL0/IN[0]. |
| 6 | PA05 | bidirectional | GPIO on VDDANA with EXTINT[5], ADC0 AIN[5], ADC1 AIN[1], PTC Y[3], SERCOM0/PAD[1], TCC0/WO[1], CCL0/IN[1]. |
| 7 | PA06 | bidirectional | GPIO on VDDANA with EXTINT[6], ADC0 AIN[6], ADC1 AIN[2], PTC Y[4], SDADC AINN[0], SERCOM0/PAD[2], TCC1/WO[0], CCL0/IN[2]. |
| 8 | PA07 | bidirectional | GPIO on VDDANA with EXTINT[7], ADC0 AIN[7], ADC1 AIN[3], PTC Y[5], SDADC AINP[0], SERCOM0/PAD[3], TCC1/WO[1], CCL0/OUT[0]. |
| 9 | VDDANA | power_in | Analog input supply; the pins listed with VDDANA supply (PA00-PA07 etc.) are powered from it. |
| 10 | GND | power_in | Ground. |
| 11 | PA08 | bidirectional | GPIO on VDDIO with NMI, ADC0 AIN[8], ADC1 AIN[10], PTC X[0]/Y[16], SERCOM0/PAD[0], SERCOM2/PAD[0], TCC0/WO[0], TCC1/WO[2], CCL1/IN[3]. |
| 12 | PA09 | bidirectional | GPIO on VDDIO with EXTINT[9], ADC0 AIN[9], ADC1 AIN[11], PTC X[1]/Y[17], SERCOM0/PAD[1], SERCOM2/PAD[1], TCC0/WO[1], TCC1/WO[3], CCL1/IN[4]. |
| 13 | PA10 | bidirectional | GPIO on VDDIO with EXTINT[10], ADC0 AIN[10], PTC X[2]/Y[18], SERCOM0/PAD[2], SERCOM2/PAD[2], TCC1/WO[0], TCC0/WO[2], GCLK_IO[4], CCL1/IN[5]. |
| 14 | PA11 | bidirectional | GPIO on VDDIO with EXTINT[11], ADC0 AIN[11], PTC X[3]/Y[19], SERCOM0/PAD[3], SERCOM2/PAD[3], TCC1/WO[1], TCC0/WO[3], GCLK_IO[5], CCL1/OUT[1]. |
| 15 | PA14 | bidirectional | GPIO on VDDIO with EXTINT[14], SERCOM2/PAD[2], TC4/WO[0], TCC0/WO[4], GCLK_IO[0], and XIN for the crystal oscillator. |
| 16 | PA15 | bidirectional | GPIO on VDDIO with EXTINT[15], SERCOM2/PAD[3], TC4/WO[1], TCC0/WO[5], GCLK_IO[1], and XOUT for the crystal oscillator. |
| 17 | PA16 | bidirectional | GPIO on VDDIO with EXTINT[0], PTC X[4]/Y[20], SERCOM1/PAD[0], SERCOM3/PAD[0], TCC2/WO[0], TCC0/WO[6], GCLK_IO[2], CCL0/IN[0]. |
| 18 | PA17 | bidirectional | GPIO on VDDIO with EXTINT[1], PTC X[5]/Y[21], SERCOM1/PAD[1], SERCOM3/PAD[1], TCC2/WO[1], TCC0/WO[7], GCLK_IO[3], CCL0/IN[1]. |
| 19 | PA18 | bidirectional | GPIO on VDDIO with EXTINT[2], PTC X[6]/Y[22], SERCOM1/PAD[2], SERCOM3/PAD[2], TC4/WO[0], TCC0/WO[2], AC CMP[0], CCL0/IN[2]. |
| 20 | PA19 | bidirectional | GPIO on VDDIO with EXTINT[3], PTC X[7]/Y[23], SERCOM1/PAD[3], SERCOM3/PAD[3], TC4/WO[1], TCC0/WO[3], AC CMP[1], CCL0/OUT[0]. |
| 21 | PA22 | bidirectional | GPIO on VDDIO with EXTINT[6], PTC X[10]/Y[26], SERCOM3/PAD[0], SERCOM5/PAD[0], TC0/WO[0], TCC0/WO[4], GCLK_IO[6], CCL2/IN[6]. |
| 22 | PA23 | bidirectional | GPIO on VDDIO with EXTINT[7], PTC X[11]/Y[27], SERCOM3/PAD[1], SERCOM5/PAD[1], TC0/WO[1], TCC0/WO[5], GCLK_IO[7], CCL2/IN[7]. |
| 23 | PA24 | bidirectional | GPIO on VDDIO with EXTINT[12], SERCOM3/PAD[2], SERCOM5/PAD[2], TC1/WO[0], TCC1/WO[2], CAN0/TX, AC CMP[2], CCL2/IN[8]. |
| 24 | PA25 | bidirectional | GPIO on VDDIO with EXTINT[13], SERCOM3/PAD[3], SERCOM5/PAD[3], TC1/WO[1], TCC1/WO[3], CAN0/RX, AC CMP[3], CCL2/OUT[2]. |
| 25 | PA27 | bidirectional | GPIO on VDDIN with EXTINT[15] and GCLK_IO[0]. |
| 26 | RESET | input | External reset input, active low. |
| 27 | PA28 | bidirectional | GPIO on VDDIN with EXTINT[8] and GCLK_IO[0]. |
| 28 | GND | power_in | Ground. |
| 29 | VDDCORE | power_out | Regulated output supply for the core. |
| 30 | VDDIN | power_in | Input supply; the datasheet gives the device operating range as 2.7V to 5.5V. |
| 31 | PA30 | bidirectional | GPIO on VDDIN with EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0], GCLK_IO[0], CCL1/IN[3], and SWCLK for serial wire debug. |
| 32 | PA31 | bidirectional | GPIO on VDDIN with EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1], CCL1/OUT[1], and SWDIO for serial wire debug. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | VQFN-32-EP(5x5) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDDIN supply voltage | VDDIN | 2.7 | 5.5 | V | Powers I/O lines, OSC48M, TOSC and internal regulator; same voltage as VDDANA | 38 | |
| VDDIO supply voltage | VDDIO | 2.7 | 5.5 | V | Powers I/O lines and XOSC; must be less than or equal to VDDIN | 38 | |
| VDDANA supply voltage | VDDANA | 2.7 | 5.5 | V | Powers I/O lines and ADC, AC, DAC, PTC, SDADC, OSCULP32K, OSC32K, XOSC32K; same voltage as VDDIN | 38 | |
| VDDCORE internal regulated voltage | VDDCORE | 1.2 | V | Internal regulated voltage output | 38 | ||
| Operating temperature | -40 | 105 | °C | N grade: -40 - 105°C Matte Sn plating | 18 | ||
| Maximum CPU frequency | 48 | MHz | No speed character in ordering code: OSC48M standard accuracy, CPU at 48 MHz | 18 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | 10.3. Micro Trace Buffer MTB base address corrected from 0x41006000 to 0x41008000. 22. SUPC, Supply Controller 22.6.3.3. VDD Brown-Out Detector (BODVDD): Removed | 1198 | |
| contacts | tin | including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the Self Capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. | 987 |
CAD (KiCad official)
- Symbol:
ATSAMC21E18A-MNT - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
atsamc21e18a-mnt-etched.step/atsamc21e18a-mnt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atsamc21e18a-mnt.step/atsamc21e18a-mnt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (1206 pp, sha256
5991eaad10c5cd35, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).