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README

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ATSAMC21E16A-ANT

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-32(7x7)

ATSAMC21E16A-ANT from Microchip Tech, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA00 bidirectional PORT group A I/O pin also usable as EXTINT[0], SERCOM1 PAD[0], TCC2 WO[0], CMP[2], and XIN32 crystal input for the 32.768 kHz oscillator.
2 PA01 bidirectional PORT group A I/O pin also usable as EXTINT[1], SERCOM1 PAD[1], TCC2 WO[1], CMP[3], and XOUT32 crystal output for the 32.768 kHz oscillator.
3 PA02 bidirectional Analog-capable I/O pin with AIN[0], AIN[4], touch input Y[0], and the DAC output VOUT, supplied from VDDANA.
4 PA03 bidirectional Analog-capable I/O pin with AIN[1], AIN[5], touch input Y[1], and the ADC/DAC external reference VREFA.
5 PA04 bidirectional I/O pin with AIN[4] and AIN[0], touch input Y[2], SERCOM0 PAD[0], TCC0 WO[0], and the SDADC external reference VREFB.
6 PA05 bidirectional I/O pin with AIN[5] and AIN[1], touch input Y[3], SERCOM0 PAD[1], and TCC0 WO[1].
7 PA06 bidirectional I/O pin with AIN[6], AIN[2], AINN[0], touch input Y[4], SERCOM0 PAD[2], and TCC1 WO[0].
8 PA07 bidirectional I/O pin with AIN[7], AIN[3], AINP[0], touch input Y[5], SERCOM0 PAD[3], and TCC1 WO[1].
9 VDDANA power_in Analog supply pin for the ADC, DAC, analog comparators, and other analog blocks.
10 GND power_in Ground pin for the device.
11 PA08 bidirectional I/O pin also usable as NMI, AIN[8], touch input X[0]/Y[16], SERCOM0 PAD[0], SERCOM2 PAD[0] (I2C-capable), TCC0 WO[0], and CCL1 IN[3].
12 PA09 bidirectional I/O pin also usable as EXTINT[9], AIN[9], touch input X[1]/Y[17], SERCOM0 PAD[1], SERCOM2 PAD[1] (I2C-capable), and TCC0 WO[1].
13 PA10 bidirectional I/O pin also usable as EXTINT[10], AIN[10], touch input X[2]/Y[18], SERCOM0 PAD[2], SERCOM2 PAD[2], TCC1 WO[0], TCC0 WO[2], and GCLK_IO[4].
14 PA11 bidirectional I/O pin also usable as EXTINT[11], AIN[11], touch input X[3]/Y[19], SERCOM0 PAD[3], SERCOM2 PAD[3], TCC1 WO[1], TCC0 WO[3], and GCLK_IO[5].
15 PA14 bidirectional I/O pin also usable as EXTINT[14], SERCOM2 PAD[2], SERCOM4 PAD[2], TC4 WO[0], TCC0 WO[4], GCLK_IO[0], and XOSC crystal input XIN.
16 PA15 bidirectional I/O pin also usable as EXTINT[15], SERCOM2 PAD[3], SERCOM4 PAD[3], TC4 WO[1], TCC0 WO[5], GCLK_IO[1], and XOSC crystal output XOUT.
17 PA16 bidirectional I/O pin also usable as EXTINT[0], touch input X[4]/Y[20], SERCOM1 PAD[0], SERCOM3 PAD[0], TCC2 WO[0], TCC0 WO[6], GCLK_IO[2], and CCL0 IN[0].
18 PA17 bidirectional I/O pin also usable as EXTINT[1], touch input X[5]/Y[21], SERCOM1 PAD[1], SERCOM3 PAD[1], TCC2 WO[1], TCC0 WO[7], and GCLK_IO[3].
19 PA18 bidirectional I/O pin also usable as EXTINT[2], touch input X[6]/Y[22], SERCOM1 PAD[2], SERCOM3 PAD[2], TC4 WO[0], TCC0 WO[2], and AC/CMP[0].
20 PA19 bidirectional I/O pin also usable as EXTINT[3], touch input X[7]/Y[23], SERCOM1 PAD[3], SERCOM3 PAD[3], TC4 WO[1], TCC0 WO[3], and AC/CMP[1].
21 PA22 bidirectional I/O pin also usable as EXTINT[6], touch input X[10]/Y[26], SERCOM3 PAD[0], SERCOM5 PAD[0], TC0 WO[0], TCC0 WO[4], GCLK_IO[6], and CCL2 IN[6] (I2C-capable).
22 PA23 bidirectional I/O pin also usable as EXTINT[7], touch input X[11]/Y[27], SERCOM3 PAD[1], SERCOM5 PAD[1], TC0 WO[1], TCC0 WO[5], and GCLK_IO[7] (I2C-capable).
23 PA24 bidirectional I/O pin also usable as EXTINT[12], SERCOM3 PAD[2], SERCOM5 PAD[2], TC1 WO[0], TCC1 WO[2], CAN0 TX, and AC/CMP[2].
24 PA25 bidirectional I/O pin also usable as EXTINT[13], SERCOM3 PAD[3], SERCOM5 PAD[3], TC1 WO[1], TCC1 WO[3], CAN0 RX, and AC/CMP[3].
25 PA27 bidirectional I/O pin in the VDDIN power domain, also usable as EXTINT[15] and GCLK_IO[0].
26 RESET input Active-low external reset input pin of the device.
27 PA28 bidirectional I/O pin in the VDDIN power domain, also usable as EXTINT[8] and GCLK_IO[0].
28 GND power_in Ground pin for the device.
29 VDDCORE power_out Regulated output of the internal voltage regulator supplying the device core.
30 VDDIN power_in Input supply to the internal voltage regulator and the VDDIN-domain I/O pins.
31 PA30 bidirectional I/O pin in the VDDIN domain that serves as the Serial Wire Debug clock SWCLK, also usable as EXTINT[10], SERCOM1 PAD[2], TCC1 WO[0], GCLK_IO[0], and CCL1 IN[3].
32 PA31 bidirectional I/O pin in the VDDIN domain that serves as the Serial Wire Debug data pin SWDIO, also usable as EXTINT[11], SERCOM1 PAD[3], TCC1 WO[1], and CCL1 OUT[1].

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-32(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDDIO supply voltage VDDIO 2.7 5.5 V Powers I/O lines and XOSC 38
VDDIN supply voltage VDDIN 2.7 5.5 V Powers I/O lines, OSC48M, TOSC and internal regulator 38
VDDANA supply voltage VDDANA 2.7 5.5 V Powers I/O lines, ADC, AC, DAC, PTC, SDADC, OSCULP32K, OSC32K and XOSC32K 38
VDDCORE internal regulated voltage VDDCORE 1.2 V Internal regulated voltage output powering the core, memories, peripherals and FDPLL96M 38

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 10.3. Micro Trace Buffer MTB base address corrected from 0x41006000 to 0x41008000. 22. SUPC, Supply Controller 22.6.3.3. VDD Brown-Out Detector (BODVDD): Removed 1198
contacts tin including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the Self Capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. 987

CAD (KiCad official)

  • Symbol: ATSAMC21E16A-ANT
  • Footprint: Package_QFP:TQFP-32_7x7mm_P0.8mm
  • 3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: atsamc21e16a-ant-etched.step / atsamc21e16a-ant-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsamc21e16a-ant.step / atsamc21e16a-ant.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1206 pp, sha256 5991eaad10c5cd35, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF