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ATSAM4N8BA-AU
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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ATSAM4N8BA-AU
Microchip Tech · Pre-ordered MCUs · TQFP-64(10x10)
ATSAM4N8BA-AU from Microchip Tech, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADVREFP | input | ADC/DAC external reference voltage input, named ADVREF in Sections 17 and 34. |
| 2 | GND | power_in | Ground reference pin. |
| 3 | PB0/AD4 | bidirectional | PIO line PB0 multiplexed with ADC analog input AD4. |
| 4 | PB1/AD5 | bidirectional | PIO line PB1 multiplexed with ADC analog input AD5. |
| 5 | PB2/AD6 | bidirectional | PIO line PB2 multiplexed with ADC analog input AD6. |
| 6 | PB3/AD7 | bidirectional | PIO line PB3 multiplexed with ADC analog input AD7. |
| 7 | VDDIN | power_in | Voltage Regulator, ADC and DAC power supply, 1.6V to 3.6V. |
| 8 | VDDOUT | power_out | Output of the internal voltage regulator supplying VDDCORE. |
| 9 | PA17/PGMD5/AD0 | bidirectional | PIO line PA17 multiplexed with programming data PGMD5 and ADC input AD0. |
| 10 | PA18/PGMD6/AD1 | bidirectional | PIO line PA18 multiplexed with programming data PGMD6 and ADC input AD1. |
| 11 | PA21/PGMD9/AD8 | bidirectional | PIO line PA21 multiplexed with programming data PGMD9 and ADC input AD8. |
| 12 | VDDCORE | power_in | Core power supply for processor, embedded memories and peripherals, 1.08V to 1.32V. |
| 13 | PA19/PGMD7/AD2 | bidirectional | PIO line PA19 multiplexed with programming data PGMD7 and ADC input AD2. |
| 14 | PA22/PGMD10/AD9 | bidirectional | PIO line PA22 multiplexed with programming data PGMD10 and ADC input AD9. |
| 15 | PA23/PGMD11 | bidirectional | PIO line PA23 multiplexed with programming data PGMD11. |
| 16 | PA20/PGMD8/AD3 | bidirectional | PIO line PA20 multiplexed with programming data PGMD8 and ADC input AD3. |
| 17 | GND | power_in | Ground reference pin. |
| 18 | VDDIO | power_in | Peripheral I/O line power supply, 1.62V to 3.6V. |
| 19 | PA16/PGMD4 | bidirectional | PIO line PA16 multiplexed with programming data PGMD4. |
| 20 | PA15/PGMD3 | bidirectional | PIO line PA15 multiplexed with programming data PGMD3. |
| 21 | PA14/PGMD2 | bidirectional | PIO line PA14 multiplexed with programming data PGMD2. |
| 22 | PA13/PGMD1 | bidirectional | PIO line PA13 multiplexed with programming data PGMD1. |
| 23 | PA24/PGMD12 | bidirectional | PIO line PA24 multiplexed with programming data PGMD12. |
| 24 | VDDCORE | power_in | Core power supply, 1.08V to 1.32V. |
| 25 | PA25/PGMD13 | bidirectional | PIO line PA25 multiplexed with programming data PGMD13. |
| 26 | PA26/PGMD14 | bidirectional | PIO line PA26 multiplexed with programming data PGMD14. |
| 27 | PA12/PGMD0 | bidirectional | PIO line PA12 multiplexed with programming data PGMD0. |
| 28 | PA11/PGMM3 | bidirectional | PIO line PA11 multiplexed with programming mode input PGMM3. |
| 29 | PA10/PGMM2 | bidirectional | PIO line PA10 multiplexed with programming mode input PGMM2. |
| 30 | PA9/PGMM1 | bidirectional | PIO line PA9 multiplexed with programming mode input PGMM1. |
| 31 | PA8/XOUT32/PGMM0 | bidirectional | PIO line PA8 multiplexed with 32.768 kHz crystal output XOUT32 and programming mode input PGMM0. |
| 32 | PA7/XIN32/XOUT32/PGMNVALID | bidirectional | PIO line PA7 multiplexed with 32.768 kHz crystal input XIN32, crystal output XOUT32 and programming output PGMNVALID as printed in the table. |
| 33 | TDI/PB4 | input | JTAG Test Data In input multiplexed with PIO line PB4. |
| 34 | PA6/PGMNOE | bidirectional | PIO line PA6 multiplexed with programming read input PGMNOE. |
| 35 | PA5/PGMRDY | bidirectional | PIO line PA5 multiplexed with programming ready output PGMRDY. |
| 36 | PA4/PGMNCMD | bidirectional | PIO line PA4 multiplexed with programming command input PGMNCMD. |
| 37 | PA27/PGMD15 | bidirectional | PIO line PA27 multiplexed with programming data PGMD15. |
| 38 | PA28 | bidirectional | PIO line PA28 (general purpose I/O). |
| 39 | NRST | bidirectional | Microcontroller reset, active low, input/output. |
| 40 | TST | input | Test select input; low selects normal operating mode and high selects test or FFPI mode, with an internal pull-down of about 15 kΩ. |
| 41 | PA29 | bidirectional | PIO line PA29 (general purpose I/O). |
| 42 | PA30 | bidirectional | PIO line PA30 (general purpose I/O). |
| 43 | PA3 | bidirectional | PIO line PA3 (general purpose I/O). |
| 44 | PA2/PGMEN2 | bidirectional | PIO line PA2 multiplexed with programming enable input PGMEN2. |
| 45 | VDDIO | power_in | Peripheral I/O line power supply, 1.62V to 3.6V. |
| 46 | GND | power_in | Ground reference pin. |
| 47 | PA1/PGMEN1 | bidirectional | PIO line PA1 multiplexed with programming enable input PGMEN1. |
| 48 | PA0/PGMEN0 | bidirectional | PIO line PA0 multiplexed with programming enable input PGMEN0. |
| 49 | TDO/TRACESWO/PB5 | output | JTAG Test Data Out, trace asynchronous data out (TRACESWO) multiplexed with PIO line PB5; set in input mode when not in debug mode so its pull-up must be enabled. |
| 50 | JTAGSEL | input | JTAG selection input, active high. |
| 51 | TMS/SWDIO/PB6 | bidirectional | JTAG Test Mode Select or Serial Wire data input/output SWDIO, multiplexed with PIO line PB6. |
| 52 | PA31 | bidirectional | PIO line PA31 (general purpose I/O). |
| 53 | TCK/SWCLK/PB7 | input | JTAG Test Clock or Serial Wire Clock SWCLK, multiplexed with PIO line PB7. |
| 54 | VDDCORE | power_in | Core power supply, 1.08V to 1.32V. |
| 55 | ERASE/PB12 | bidirectional | Flash erase pin ERASE multiplexed with PIO line PB12. |
| 56 | PB10 | bidirectional | PIO line PB10 (general purpose I/O). |
| 57 | PB11 | bidirectional | PIO line PB11 (general purpose I/O). |
| 58 | VDDIO | power_in | Peripheral I/O line power supply, 1.62V to 3.6V. |
| 59 | PB13/DAC0 | bidirectional | PIO line PB13 multiplexed with DAC analog output channel DAC0. |
| 60 | GND | power_in | Ground reference pin. |
| 61 | XOUT/PB8 | bidirectional | Main oscillator crystal output XOUT multiplexed with PIO line PB8. |
| 62 | XIN/PGMCK/PB9 | input | Main oscillator crystal input XIN multiplexed with programming clock PGMCK and PIO line PB9. |
| 63 | PB14 | bidirectional | PIO line PB14 (general purpose I/O). |
| 64 | VDDPLL | power_in | Main oscillator and PLL power supply, 1.08V to 1.32V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Core supply voltage | VDDCORE | 1.08 | 1.32 | V | 17 | ||
| I/O supply voltage | VDDIO | 1.62 | 3.6 | V | 17 | ||
| Voltage regulator, ADC and DAC supply voltage | VDDIN | 1.6 | 3.6 | V | For Voltage Regulator, ADC and DAC | 17 | |
| PLL supply voltage | VDDPLL | 1.08 | 1.32 | V | Powers the Main Oscillator | 17 | |
| VDDIO minimum operating voltage | VDDIO(min) | 1.62 | V | VDDIO must reach it before VDDCORE reaches VDDCORE(min) | 17 | ||
| VDDIO rising slope at startup | 8.8 | V/ms | If VDDCORE rises at the same time as VDDIO | 17 | |||
| VDDIO voltage at power-up | 0.6 | V | Required before VDDIN reaches 1.0 V | 17 | |||
| VDDIO relative to VDDIN | 0.5 | V | VDDIO must be at or below VDDIN + 0.5 V | 17 | |||
| VDDIO for temperature sensor | VDDIO | 2.4 | V | For temperature sensor | 18 | ||
| Power-on-reset/supply monitor threshold range | 1.6 | 3.4 | V | Supply Monitor on VDDIO, programmable in 16 steps | 33 | ||
| Supply monitor threshold range (SUPC) | 1.9 | 3.4 | V | Programmable threshold on VDDIO | 308 | ||
| Supply monitor threshold step | 100 | mV | Threshold steps | 308 | |||
| NRST pull-up resistor | 100 | kΩ | Permanent pull-up to VDDIO | 26 | |||
| ERASE pull-down resistor | 100 | kΩ | Pull-down to GND | 26 | |||
| TST pull-down resistor | 15 | kΩ | Permanent pull-down to GND | 25 | |||
| JTAGSEL pull-down resistor | 15 | kΩ | Permanent pull-down to GND | 25 | |||
| On-die termination series resistor | RODT | 36 | Ω | Typical ODT on each I/O line | 24 | ||
| Slow clock RC oscillator frequency range | SLCK | 22 | 42 | kHz | Low Power RC Oscillator | 305 | |
| Real-time clock clock frequency | 32768 | Hz | RTC continuously clocked | 278 | |||
| Maximum operating speed | 100 | MHz | Cortex-M4 processor | 1 | |||
| ERASE pin assertion time for security bit disable | 200 | ms | Assertion of ERASE pin should always be longer than this | 30 | |||
| Operating temperature range | -40 | 85 | °C | Industrial grade | 842 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | before performing the calculation, making the base address for the calculation word-aligned. ̶ Note: To generate the address of an instruction, the constant based on the value of the PC must be | 106 |
CAD (KiCad official)
- Symbol:
ATSAM4N8BA-AU - Footprint:
Package_QFP:TQFP-64_10x10mm_P0.5mm - 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
atsam4n8ba-au-etched.step/atsam4n8ba-au-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atsam4n8ba-au.step/atsam4n8ba-au.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (855 pp, sha256
1010649cc8e7a1d0, retrieved 2026-11-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).