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ATSAM3X4CA-AU

Microchip Tech · Pre-ordered MCUs · LQFP-100(14x14)

ATSAM3X4CA-AU from Microchip Tech, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PB26 bidirectional PIOB line PB26, multiplexed with TC0 TCLK0 (peripheral B).
2 PA9 bidirectional PIOA line PA9, multiplexed with UART UTXD (peripheral A).
3 PA10 bidirectional PIOA general-purpose I/O line PA10.
4 PA11 bidirectional PIOA line PA11, multiplexed with ADC ADTRG (peripheral B).
5 PA12 bidirectional PIOA general-purpose I/O line PA12.
6 PA13 bidirectional PIOA general-purpose I/O line PA13.
7 PA14 bidirectional PIOA line PA14, multiplexed with SSC TK (peripheral B).
8 PA15 bidirectional PIOA line PA15, multiplexed with SSC TF (peripheral B).
9 PA17 bidirectional PIOA line PA17, multiplexed with TWI0 TWD0 (peripheral A).
10 VDDCORE power_in Core, embedded memories and peripherals supply, 1.62V to 1.95V.
11 VDDIO power_in Peripheral I/O lines supply, 1.62V to 3.6V.
12 GND power_in Ground common to the VDDCORE and VDDIO supplies.
13 PA0 bidirectional PIOA general-purpose I/O line PA0.
14 PA1 bidirectional PIOA general-purpose I/O line PA1.
15 PA5 bidirectional PIOA line PA5, multiplexed with TC0 TIOA2 (peripheral A).
16 PA7 bidirectional PIOA line PA7, multiplexed with TC0 TCLK2 (peripheral A).
17 PA8 bidirectional PIOA line PA8, multiplexed with UART URXD (peripheral A).
18 PB28 bidirectional PIOB general-purpose I/O line PB28.
19 PB29 bidirectional PIOB general-purpose I/O line PB29.
20 PB30 bidirectional PIOB general-purpose I/O line PB30.
21 PB31 bidirectional PIOB general-purpose I/O line PB31.
22 GNDPLL power_in Separate ground for the VDDPLL supply.
23 VDDPLL power_in Powers PLL A, UPLL and the 3-20 MHz oscillator, 1.62V to 1.95V.
24 XOUT output Main 3-20 MHz crystal oscillator output.
25 XIN input Main 3-20 MHz crystal oscillator input.
26 DHSDP bidirectional USB Hi-Speed differential data line D+.
27 DHSDM bidirectional USB Hi-Speed differential data line D-.
28 VBUS power_in USB VBus bus power measurement input.
29 VBG passive VBG pin; function not described in the provided text.
30 VDDUTMI power_in Powers the UTMI+ interface, 3.0V to 3.6V, 3.3V nominal.
31 DFSDP bidirectional USB Full-Speed differential data line D+.
32 DFSDM bidirectional USB Full-Speed differential data line D-.
33 GNDUTMI power_in Separate ground for the VDDUTMI supply.
34 VDDCORE power_in Core, embedded memories and peripherals supply, 1.62V to 1.95V.
35 JTAGSEL input JTAG selection input, active high; chip reset required after changing it.
36 XIN32 input 32.768 kHz slow clock crystal input; external clock input in bypass mode.
37 XOUT32 output 32.768 kHz slow clock crystal oscillator output; leave unconnected if crystal not used.
38 TST input Test select input with ~15 kΩ permanent pull-down; low at power-up selects normal operation.
39 VDDBU power_in Powers slow clock oscillator and part of the System Controller, 1.62V to 3.6V.
40 FWUP input Wake-up pin (FWUP, renamed from WAKEUP); high with JTAGSEL during JTAG boundary scan.
41 GND power_in Ground common to the VDDCORE and VDDIO supplies.
42 VDDOUT power_out Output of the voltage regulator.
43 VDDIN power_in Powers the voltage regulator (shared with ADC and DAC).
44 GND power_in Ground common to the VDDCORE and VDDIO supplies.
45 VDDCORE power_in Core, embedded memories and peripherals supply, 1.62V to 1.95V.
46 PB27 bidirectional PIOB line PB27, multiplexed with TC0 TIOB0 (peripheral B).
47 NRST bidirectional Microcontroller reset, input/output, active low.
48 PA18 bidirectional PIOA line PA18, multiplexed with TWI0 TWCK0 (peripheral A).
49 PA19 bidirectional PIOA line PA19, multiplexed with HSMCI MCCK (peripheral A).
50 PA20 bidirectional PIOA line PA20, multiplexed with HSMCI MCCDA (peripheral A).
51 VDDANA power_in Powers the ADC and DAC cells, 2.0V to 3.6V.
52 GNDANA power_in Separate ground for the VDDANA supply.
53 ADVREF power_in ADC reference voltage.
54 PB15 bidirectional PIOB general-purpose I/O line PB15.
55 PB16 bidirectional PIOB line PB16, multiplexed with TC1 TCLK5 (peripheral A).
56 PA16 bidirectional PIOA line PA16, SSC TD (peripheral B) or ADC AD7.
57 PA24 bidirectional PIOA line PA24, HSMCI MCDA3 (peripheral A) or ADC AD6.
58 PA23 bidirectional PIOA line PA23, HSMCI MCDA2 (peripheral A), TC1 TCLK4 (B) or ADC AD5.
59 PA22 bidirectional PIOA line PA22, HSMCI MCDA1 (peripheral A), TC1 TCLK3 (B) or ADC AD4.
60 PA6 bidirectional PIOA line PA6, TC0 TIOB2 (peripheral A) or ADC AD3.
61 PA4 bidirectional PIOA line PA4, TC0 TCLK1 (peripheral A) or ADC AD2.
62 PA3 bidirectional PIOA line PA3, TC0 TIOB1 (peripheral A) or ADC AD1/WKUP1.
63 PA2 bidirectional PIOA line PA2, TC0 TIOA1 (peripheral A) or ADC AD0.
64 PB12 bidirectional PIOB line PB12, TWI1 TWD1 (peripheral A) or ADC AD8.
65 PB13 bidirectional PIOB line PB13, TWI1 TWCK1 (peripheral A) or ADC AD9.
66 PB17 bidirectional PIOB line PB17, SSC RF (peripheral A) or ADC AD10.
67 PB18 bidirectional PIOB line PB18, SSC RD (peripheral A) or ADC AD11.
68 PB19 bidirectional PIOB line PB19, SSC RK (peripheral A) or ADC AD12.
69 PB20 bidirectional PIOB line PB20, SPI0 NPCS1 (peripheral B) or ADC AD13.
70 PB21 bidirectional PIOB line PB21, SPI0 NPCS2 (peripheral B) or ADC AD14/WKUP13.
71 VDDCORE power_in Core, embedded memories and peripherals supply, 1.62V to 1.95V.
72 VDDIO power_in Peripheral I/O lines supply, 1.62V to 3.6V.
73 GND power_in Ground common to the VDDCORE and VDDIO supplies.
74 PA21 bidirectional PIOA line PA21, multiplexed with HSMCI MCDA0 (peripheral A).
75 PA25 bidirectional PIOA line PA25, multiplexed with SPI0 MISO (peripheral A).
76 PA26 bidirectional PIOA line PA26, multiplexed with SPI0 MOSI (peripheral A).
77 PA27 bidirectional PIOA line PA27, multiplexed with SPI0 SPCK (peripheral A).
78 PA28 bidirectional PIOA line PA28, multiplexed with SPI0 NPCS0 (peripheral A).
79 PA29 bidirectional PIOA line PA29, multiplexed with SPI0 NPCS1 (peripheral A).
80 PB0 bidirectional PIOB line PB0, multiplexed with TC1 TIOA3 (peripheral B).
81 PB1 bidirectional PIOB line PB1, multiplexed with TC1 TIOB3 (peripheral B).
82 PB2 bidirectional PIOB line PB2, multiplexed with TC1 TIOA4 (peripheral B).
83 PB3 bidirectional PIOB line PB3, multiplexed with TC1 TIOB4 (peripheral B).
84 PB4 bidirectional PIOB line PB4, multiplexed with TC1 TIOA5 (peripheral B).
85 PB5 bidirectional PIOB line PB5, multiplexed with TC1 TIOB5 (peripheral B).
86 PB6 bidirectional PIOB general-purpose I/O line PB6.
87 PB7 bidirectional PIOB general-purpose I/O line PB7.
88 PB8 bidirectional PIOB general-purpose I/O line PB8.
89 VDDCORE power_in Core, embedded memories and peripherals supply, 1.62V to 1.95V.
90 VDDIO power_in Peripheral I/O lines supply, 1.62V to 3.6V.
91 GND power_in Ground common to the VDDCORE and VDDIO supplies.
92 PB9 bidirectional PIOB general-purpose I/O line PB9.
93 PB10 bidirectional PIOB line PB10, multiplexed with USB UOTGVBOF (peripheral A).
94 PB11 bidirectional PIOB line PB11, multiplexed with USB UOTGID (peripheral A); enable internal pull-up if used.
95 PC0 bidirectional PIOC line PC0, which is the ERASE pin by default.
96 PB14 bidirectional PIOB general-purpose I/O line PB14.
97 PB22 bidirectional PIOB general-purpose I/O line PB22.
98 PB23 bidirectional PIOB line PB23, multiplexed with SPI0 NPCS3 (peripheral B).
99 PB24 bidirectional PIOB general-purpose I/O line PB24.
100 PB25 bidirectional PIOB line PB25, multiplexed with TC0 TIOA0 (peripheral B).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDDCORE supply voltage range VDDCORE 1.62 1.95 V 20
VDDIO supply voltage range VDDIO 1.62 3.6 V 20
VDDBU supply voltage range VDDBU 1.62 3.6 V 20
VDDPLL supply voltage range VDDPLL 1.62 1.95 V 20
VDDUTMI supply voltage range VDDUTMI 3 3.3 3.6 V 3.3V nominal 20
VDDANA supply voltage range VDDANA 2 3.6 V 20
Single supply mode range 1.62 3.6 V Single supply mode 22
VDDIO minimum before VDDCORE reaches minimum VDDIO(min) 1.6 V Power-up 20
VDDANA for DAC VDDANA 2.4 V For DAC 22
Operating temperature range -40 85 °C Industrial 1441
Maximum CPU speed 84 MHz 1
Voltage regulator static current, Normal mode 700 µA Normal mode, 150 mA output current 21
Voltage regulator quiescent current, Wait mode/low load 7 µA Wait Mode or low output current 21
Backup mode current consumption 2.5 µA Backup mode, on VDDBU 27

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC TBH [PC, R1, LSL #1] ; R1 is the index, PC is used as base of the 140

CAD (KiCad official)

  • Symbol: ATSAM3X4CA-AU
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: atsam3x4ca-au-etched.step / atsam3x4ca-au-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsam3x4ca-au.step / atsam3x4ca-au.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1459 pp, sha256 aafc34e215ce68af, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF