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ATSAM3S8BA-MU

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Microchip Tech Pre-ordered MCUs, QFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersatsam3s8ba-mufactory-2.0.0extractor-text

Changed since verified ATSAM3S8BA-MU

by Ray · last 30 Oct 2026 · 1 record · files changed since
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 65 pinschanged since
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATSAM3S8BA-MU · QFN-64-EP(9x9) · 65 pins
  • ✓copper: 65 copper pads, none touching another net
  • ✓datasheet: all 65 pin names found in the 1122-page datasheet
  • ✓distributor: lcsc C614600, digikey ATSAM3S8BA-MU-ND, mouser 556-ATSAM3S8BA-MU
  • ✓family: QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-xwmmk35q/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 65 pins = 65 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 65 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files! atsam3s8ba-mu.kicad_sym✓ atsam3s8ba-mu.kicad_mod✓ atsam3s8ba-mu.step
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Ray Publish 0.1.0 97c7b0a 5d ago

ATSAM3S8BA-MU

Microchip Tech · Pre-ordered MCUs · QFN-64-EP(9x9)

ATSAM3S8BA-MU from Microchip Tech, in a QFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ADVREF power_in Analog reference for the ADC, DAC and analog comparator.
2 GND power_in Ground.
3 PB0/AD4 bidirectional PIO line PB0 multiplexed with analog input AD4 (also RTCOUT0).
4 PB1/AD5 bidirectional PIO line PB1 multiplexed with analog input AD5 (also RTCOUT1).
5 PB2/AD6 bidirectional PIO line PB2 multiplexed with analog input AD6 (also URXD1, SPI NPCS2).
6 PB3/AD7 bidirectional PIO line PB3 multiplexed with analog input AD7 (also UTXD1).
7 VDDIN power_in Voltage regulator input and ADC, DAC and analog comparator supply, 1.8V to 3.6V.
8 VDDOUT power_out Output of the internal voltage regulator.
9 PA17/PGMD5/AD0 bidirectional PIO line PA17 with FFPI data bit PGMD5 and analog input AD0.
10 PA18/PGMD6/AD1 bidirectional PIO line PA18 with FFPI data bit PGMD6 and analog input AD1.
11 PA21/PGMD9/AD8 bidirectional PIO line PA21 with FFPI data bit PGMD9 and analog input AD8.
12 VDDCORE power_in Core, embedded memory and peripheral supply, 1.62V to 1.95V.
13 PA19/PGMD7/AD2 bidirectional PIO line PA19 with FFPI data bit PGMD7 and analog input AD2.
14 PA22/PGMD10/AD9 bidirectional PIO line PA22 with FFPI data bit PGMD10 and analog input AD9.
15 PA23/PGMD11 bidirectional PIO line PA23 with FFPI data bit PGMD11.
16 PA20/PGMD8/AD3 bidirectional PIO line PA20 with FFPI data bit PGMD8 and analog input AD3.
17 GND power_in Ground.
18 VDDIO power_in I/O line, USB transceiver, backup part, 32 kHz oscillator and oscillator pad supply, 1.62V to 3.6V.
19 PA16/PGMD4 bidirectional PIO line PA16 with FFPI data bit PGMD4.
20 PA15/PGMD3 bidirectional PIO line PA15 with FFPI data bit PGMD3.
21 PA14/PGMD2 bidirectional PIO line PA14 with FFPI data bit PGMD2.
22 PA13/PGMD1 bidirectional PIO line PA13 with FFPI data bit PGMD1.
23 PA24/PGMD12 bidirectional PIO line PA24 with FFPI data bit PGMD12.
24 VDDCORE power_in Core, embedded memory and peripheral supply, 1.62V to 1.95V.
25 PA25/PGMD13 bidirectional PIO line PA25 with FFPI data bit PGMD13.
26 PA26/PGMD14 bidirectional PIO line PA26 with FFPI data bit PGMD14.
27 PA12/PGMD0 bidirectional PIO line PA12 with FFPI data bit PGMD0.
28 PA11/PGMM3 bidirectional PIO line PA11 with FFPI mode input PGMM3.
29 PA10/PGMM2 bidirectional PIO line PA10 with FFPI mode input PGMM2.
30 PA9/PGMM1 bidirectional PIO line PA9 with FFPI mode input PGMM1.
31 PA8/XOUT32/PGMM0 bidirectional PIO line PA8 with 32 kHz crystal output XOUT32 and FFPI mode input PGMM0.
32 PA7/XIN32/PGMNVALID bidirectional PIO line PA7 with 32 kHz crystal input XIN32 and FFPI data direction output PGMNVALID.
33 TDI/PB4 bidirectional JTAG test data in multiplexed with PIO line PB4.
34 PA6/PGMNOE bidirectional PIO line PA6 with FFPI read input PGMNOE (active low).
35 PA5/PGMRDY bidirectional PIO line PA5 with FFPI ready output PGMRDY (active high).
36 PA4/PGMNCMD bidirectional PIO line PA4 with FFPI command input PGMNCMD (active low).
37 PA27/PGMD15 bidirectional PIO line PA27 with FFPI data bit PGMD15.
38 PA28 bidirectional General-purpose PIO line PA28.
39 NRST bidirectional Microcontroller reset input/output, active low.
40 TST input Test select input with permanent pull-down of about 15 kOhm; low at power-up selects normal operation, high selects test or FFPI mode.
41 PA29 bidirectional General-purpose PIO line PA29.
42 PA30 bidirectional General-purpose PIO line PA30.
43 PA3 bidirectional General-purpose PIO line PA3.
44 PA2/PGMEN2 bidirectional PIO line PA2 with FFPI programming enable input PGMEN2.
45 VDDIO power_in I/O line, USB transceiver, backup part, 32 kHz oscillator and oscillator pad supply, 1.62V to 3.6V.
46 GND power_in Ground.
47 PA1/PGMEN1 bidirectional PIO line PA1 with FFPI programming enable input PGMEN1.
48 PA0/PGMEN0 bidirectional PIO line PA0 with FFPI programming enable input PGMEN0.
49 TDO/TRACESWO/PB5 bidirectional JTAG test data out / asynchronous trace output multiplexed with PIO line PB5; set to input when the core is not in debug mode, so enable its internal pull-up.
50 JTAGSEL input JTAG selection input, active high; high at power-up with TST low enables boundary scan.
51 TMS/SWDIO/PB6 bidirectional JTAG test mode select / serial wire data I/O multiplexed with PIO line PB6.
52 PA31 bidirectional General-purpose PIO line PA31.
53 TCK/SWCLK/PB7 bidirectional JTAG test clock / serial wire clock multiplexed with PIO line PB7.
54 VDDCORE power_in Core, embedded memory and peripheral supply, 1.62V to 1.95V.
55 ERASE/PB12 bidirectional Flash erase input multiplexed with PIO line PB12.
56 DDM/PB10 bidirectional USB full-speed data minus multiplexed with PIO line PB10, powered from VDDIO.
57 DDP/PB11 bidirectional USB full-speed data plus multiplexed with PIO line PB11, powered from VDDIO.
58 VDDIO power_in I/O line, USB transceiver, backup part, 32 kHz oscillator and oscillator pad supply, 1.62V to 3.6V.
59 PB13/DAC0 bidirectional PIO line PB13 multiplexed with DAC analog output DAC0.
60 GND power_in Ground.
61 XOUT/PB8 bidirectional Main oscillator output multiplexed with PIO line PB8.
62 XIN/PGMCK/PB9 bidirectional Main oscillator input multiplexed with FFPI clock PGMCK and PIO line PB9.
63 PB14/DAC1 bidirectional PIO line PB14 multiplexed with DAC analog output DAC1.
64 VDDPLL power_in Supply for PLLA, PLLB, fast RC and the 3 to 20 MHz oscillator, 1.62V to 1.95V.
65 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-64-EP(9x9)
Category Embedded Processors & Controllers
Pins 65

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDDCORE supply voltage range VDDCORE 1.62 1.95 V Powers core, embedded memories and peripherals 16
VDDIO supply voltage range VDDIO 1.62 3.6 V Peripheral I/O lines, USB transceiver, backup part, 32 kHz oscillator, oscillator pads 16
VDDIN supply voltage range VDDIN 1.8 3.6 V Voltage regulator input, ADC, DAC and analog comparator supply 16
VDDPLL supply voltage range VDDPLL 1.62 1.95 V Powers PLLA, PLLB, Fast RC and 3 to 20 MHz oscillator 16
Operating temperature range -40 85 °C Industrial, ATSAM3S8BA-MU 1107

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC TBH [PC, R1, LSL #1] ; R1 is the index, PC is used as base of the 124

CAD (KiCad official)

  • Symbol: ATSAM3S8BA-MU
  • Footprint: Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • 3D model: QFN-64-EP(9x9) (KiCad packages3D, STEP)
  • 3D model files: atsam3s8ba-mu-etched.step / atsam3s8ba-mu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsam3s8ba-mu.step / atsam3s8ba-mu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1122 pp, sha256 67fb50aee6cff27b, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF