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ATMEGA8A-ANR

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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrolleratmega8a-anrfactory-2.0.0extractor-text

Verified ATMEGA8A-ANR

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 32 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATMEGA8A-ANR · TQFP-32(7x7) · 32 pins
  • ✓copper: 32 copper pads, none touching another net
  • ✓datasheet: all 32 pin names found in the 327-page datasheet
  • ✓distributor: lcsc C2053361, digikey ATMEGA8A-ANRTR-ND, mouser 556-ATMEGA8A-ANR
  • ✓family: TQFP-32_7x7mm_P0.8mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-dikrxpky/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 32 pins = 32 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 32 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ atmega8a-anr.kicad_sym✓ atmega8a-anr.kicad_mod✓ atmega8a-anr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 5d ago
viewers atmega8a-anr: viewers · Ray 5d ago
atmega8a-anr-etched.glb Publish 0.1.0 · Ray 5d ago
atmega8a-anr-etched.step atmega8a-anr: factory component page (tier=mfr) · Ray 5d ago
atmega8a-anr-hero.glb atmega8a-anr: hero GLB from the etched model (keeps the MPN mark) · Ray 5d ago
atmega8a-anr-hero.overlay.json Publish 0.1.0 · Ray 5d ago
atmega8a-anr.glb Publish 0.1.0 · Ray 5d ago
atmega8a-anr.kicad_mod Publish 0.1.0 · Ray 5d ago
atmega8a-anr.kicad_sym Publish 0.1.0 · Ray 5d ago
atmega8a-anr.lbr Publish 0.1.0 · Ray 5d ago
atmega8a-anr.step Publish 0.1.0 · Ray 5d ago
package.json Publish 0.1.0 · Ray 5d ago
page.json Set visibility: public · Ray 5d ago
README.md Publish 0.1.0 · Ray 5d ago
verification.json Verified: Published by the parts factory: tier mfr, 32 pins · Ray 5d ago

ATMEGA8A-ANR

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-32(7x7)

ATMEGA8A-ANR from Microchip Tech, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PD3 bidirectional Port D bit 3 with internal pull-up option, also External Interrupt source 1 (INT1) input that can trigger an interrupt on pin activity.
2 PD4 bidirectional Port D bit 4, also USART external clock XCK (input or output in synchronous mode) and Timer/Counter0 external counter input T0.
3 GND power_in Ground.
4 VCC power_in Digital supply voltage; the device operates from 2.7 to 5.5 V with 0 to 16 MHz.
5 GND power_in Ground.
6 VCC power_in Digital supply voltage; the device operates from 2.7 to 5.5 V with 0 to 16 MHz.
7 PB6 bidirectional Port B bit 6, used as chip clock oscillator pin 1 / external clock input (or TOSC1 input for Timer/Counter2 when AS2 is set), in which case the pin cannot be used as I/O.
8 PB7 bidirectional Port B bit 7, used as chip clock oscillator pin 2 (inverting oscillator amplifier output) or TOSC2 when AS2 is set, in which case the pin cannot be used as I/O.
9 PD5 bidirectional Port D bit 5, also Timer/Counter1 external counter source input T1.
10 PD6 bidirectional Port D bit 6, also Analog Comparator positive input AIN0; configure as input with internal pull-up off to avoid interfering with the comparator.
11 PD7 bidirectional Port D bit 7, also Analog Comparator negative input AIN1; configure as input with internal pull-up off to avoid interfering with the comparator.
12 PB0 bidirectional Port B bit 0, also Timer/Counter1 Input Capture pin ICP1.
13 PB1 (OC1A) bidirectional Port B bit 1, also Timer/Counter1 Output Compare Match A output OC1A (must be configured as output to serve this function).
14 PB2 (SS/OC1B) bidirectional Port B bit 2, also SPI Slave Select SS input (driven low to activate SPI slave) and Timer/Counter1 Output Compare Match B output OC1B.
15 PB3 (MOSI/OC2) bidirectional Port B bit 3, also SPI Master Output/Slave Input MOSI and Timer/Counter2 Output Compare Match output OC2.
16 PB4 (MISO) bidirectional Port B bit 4, also SPI Master Input/Slave Output MISO.
17 PB5 (SCK) bidirectional Port B bit 5, also SPI clock: master clock output or slave clock input SCK.
18 AVCC power_in Supply voltage pin for the A/D Converter, Port C (3:0) and ADC7:6; it should be connected to VCC even if the ADC is not used, and through a low-pass filter if the ADC is used.
19 ADC6 input Analog input channel 6 of the A/D converter (TQFP and VQFN only), powered from the analog supply.
20 AREF passive Analog reference pin for the A/D Converter.
21 GND power_in Ground.
22 ADC7 input Analog input channel 7 of the A/D converter (TQFP and VQFN only), powered from the analog supply.
23 PC0 (ADC0) bidirectional Port C bit 0 (7-bit port PC5:PC0 with internal pull-ups), also ADC input channel 0 using analog power.
24 PC1 (ADC1) bidirectional Port C bit 1, also ADC input channel 1 using analog power.
25 PC2 (ADC2) bidirectional Port C bit 2, also ADC input channel 2 using analog power.
26 PC3 (ADC3) bidirectional Port C bit 3, also ADC input channel 3 using analog power.
27 PC4 bidirectional Port C bit 4, also Two-wire Serial Interface data SDA (open-drain with slew-rate limit when TWEN is set) and ADC input channel 4 using digital power.
28 PC5 bidirectional Port C bit 5, also Two-wire Serial Interface clock SCL (open-drain with slew-rate limit when TWEN is set) and ADC input channel 5 using digital power.
29 PC6 (RESET) input Reset input when the RSTDISBL fuse is unprogrammed (a low level longer than the minimum pulse length generates a reset); when RSTDISBL is programmed it is a normal I/O pin with electrical characteristics differing from other Port C pins.
30 PD0 (RXD) bidirectional Port D bit 0, also USART receive data input RXD, forced to input when the USART receiver is enabled.
31 PD1 (TXD) bidirectional Port D bit 1, also USART transmit data output TXD, forced to output when the USART transmitter is enabled.
32 PD2 (INT0) bidirectional Port D bit 2, also External Interrupt source 0 (INT0) input that can serve as an external interrupt source.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-32(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Temperature -55 125 °C 240
Storage Temperature -65 150 °C 240
Voltage on any Pin except RESET with respect to Ground (lower limit) -0.5 V Upper limit printed as VCC+0.5V 240
Voltage on RESET with respect to Ground -0.5 13 V 240
Maximum Operating Voltage 6 V 240
DC Current per I/O Pin 40 mA 240
DC Current VCC and GND Pins 200 mA 240
Input Low Voltage, Except XTAL1 and RESET pin VIL -0.5 V VCC = 2.7V - 5.5V; max printed as 0.2VCC 240
Input Low Voltage, XTAL1 pin VIL1 -0.5 V VCC = 2.7V - 5.5V; max printed as 0.1VCC 240
Input Low Voltage, RESET pin VIL2 -0.5 V VCC = 2.7V - 5.5V; max printed as 0.1VCC 240
Output Low Voltage, Port B (except RESET) VOL 0.8 V IOL = 20 mA, VCC = 5V 240
Output Low Voltage, Port B (except RESET) VOL 0.6 V IOL = 10 mA, VCC = 3V 240
Output High Voltage, Port B (except RESET) VOH 4 V IOH = -20 mA, VCC = 5V 240
Output High Voltage, Port B (except RESET) VOH 2.2 V IOH = -10 mA, VCC = 3V 240
Input Leakage Current I/O Pin (low) IIL 3 µA 240
Input Leakage Current I/O Pin (high) IIH 3 µA 240
Reset Pull-up Resistor RRST 30 80 k 240
I/O Pin Pull-up Resistor RPU 20 50 k 240
Analog Comparator Input Offset Voltage VACIO 20 mV VCC = 5V, Vin = VCC/2 240
Analog Comparator Input Leakage Current IACLK -50 50 nA VCC = 5V, Vin = VCC/2 240
Power Supply Current, Active ICC 6 mA Active 4 MHz, VCC = 3V 241
Power Supply Current, Active ICC 15 mA Active 8 MHz, VCC = 5V 241
Power Supply Current, Idle ICC 3 mA Idle 4 MHz, VCC = 3V 241
Power Supply Current, Idle ICC 8 mA Idle 8 MHz, VCC = 5V 241
Power Supply Current, Power-down mode ICC 35 µA WDT enabled, VCC = 3V 241
Power Supply Current, Power-down mode ICC 6 µA WDT disabled, VCC = 3V 241

CAD (KiCad official)

  • Symbol: ATMEGA8A-ANR
  • Footprint: Package_QFP:TQFP-32_7x7mm_P0.8mm
  • 3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: atmega8a-anr-etched.step / atmega8a-anr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega8a-anr.step / atmega8a-anr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (327 pp, sha256 e10f0e392857e034, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF