component
ATMEGA809-MUR
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), VQFN-48-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "atmega809-mur",
"title": "ATMEGA809-MUR",
"brief": "Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), VQFN-48-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"embedded processors & controllers",
"atmega809-mur",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "ATMEGA809-MUR",
"manufacturer": "Microchip Tech",
"package": "VQFN-48-EP(6x6)",
"pin_count": 49,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",
"datasheet": "http://ww1.microchip.com/downloads/en/DeviceDoc/ATmega808-09-1608-09-DS40002172B.pdf",
"parts": {
"symbol": "atmega809-mur.kicad_sym",
"footprint": "atmega809-mur.kicad_mod",
"model_3d": "atmega809-mur-hero.glb",
"model_3d_plain": "atmega809-mur-etched.glb",
"model_3d_step": "atmega809-mur-etched.step",
"model_3d_step_plain": "atmega809-mur.step",
"lbr": "atmega809-mur.lbr"
},
"distributor_links": {
"lcsc": "C1512794",
"digikey": "150-ATMEGA809-MURTR-ND",
"mouser": "556-ATMEGA809-MUR"
},
"distributor_check": {
"checked_at": "2026-10-30T22:34:37Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "150-ATMEGA809-MURTR-ND",
"status": "found"
},
"mouser": {
"pn": "556-ATMEGA809-MUR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "PA5",
"type": "bidirectional",
"description": "General-purpose I/O pin PA5 on PORTA (VDD power domain), also usable for USART0 RxD (alternate position), SPI0 MISO and CCL/TCA0 WO5 alternate functions per the multiplexing table."
},
{
"number": "2",
"name": "PA6",
"type": "bidirectional",
"description": "General-purpose I/O pin PA6 on PORTA (VDD power domain), also usable for USART0 XCK (alternate position), SPI0 SCK and an alternate event/output function per the multiplexing table."
},
{
"number": "3",
"name": "PA7",
"type": "bidirectional",
"description": "General-purpose I/O pin PA7 on PORTA (VDD power domain), also usable for CLKOUT, AC0 OUT, USART0 XDIR (alternate position), SPI0 SS and EVOUTA (alternate position)."
},
{
"number": "4",
"name": "PB0",
"type": "bidirectional",
"description": "General-purpose I/O pin PB0 on PORTB, also usable for USART3 TxD and TCA0 WO0 (alternate position) per the multiplexing table."
},
{
"number": "5",
"name": "PB1",
"type": "bidirectional",
"description": "General-purpose I/O pin PB1 on PORTB, also usable for USART3 RxD and TCA0 WO1 (alternate position) per the multiplexing table."
},
{
"number": "6",
"name": "PB2",
"type": "bidirectional",
"description": "General-purpose I/O pin PB2 on PORTB, also usable for USART3 XCK, TCA0 WO2 (alternate position) and EVOUTB per the multiplexing table."
},
{
"number": "7",
"name": "PB3",
"type": "bidirectional",
"description": "General-purpose I/O pin PB3 on PORTB, also usable for USART3 XDIR and TCA0 WO3 (alternate position) per the multiplexing table."
},
{
"number": "8",
"name": "PB4",
"type": "bidirectional",
"description": "General-purpose I/O pin PB4 on PORTB, also usable for USART3 TxD (alternate position), TCA0 WO4 (alternate position) and TCB2 WO (alternate position) per the multiplexing table."
},
{
"number": "9",
"name": "PB5",
"type": "bidirectional",
"description": "General-purpose I/O pin PB5 on PORTB, also usable for USART3 RxD (alternate position), TCA0 WO5 (alternate position) and TCB3 WO per the multiplexing table."
},
{
"number": "10",
"name": "PC0",
"type": "bidirectional",
"description": "General-purpose I/O pin PC0 on PORTC (VDD power domain), also usable for USART1 TxD, SPI0 MOSI (alternate position), TCA0 WO0 (alternate position) and TCB2 WO per the multiplexing table."
},
{
"number": "11",
"name": "PC1",
"type": "bidirectional",
"description": "General-purpose I/O pin PC1 on PORTC (VDD power domain), also usable for USART1 RxD, SPI0 MISO (alternate position), TCA0 WO1 (alternate position) and TCB3 WO (alternate position)."
},
{
"number": "12",
"name": "PC2",
"type": "bidirectional",
"description": "General-purpose I/O pin PC2 on PORTC (VDD power domain), also usable for TWI0 SDA (master), USART1 XCK, SPI0 SCK (alternate position), TCA0 WO2 (alternate position) and EVOUTC."
},
{
"number": "13",
"name": "PC3",
"type": "bidirectional",
"description": "General-purpose I/O pin PC3 on PORTC (VDD power domain), also usable for TWI0 SCL (master), USART1 XDIR, SPI0 SS (alternate position) and TCA0 WO3 (alternate position)."
},
{
"number": "14",
"name": "VDD",
"type": "power_in",
"description": "Supply voltage for the digital core and VDD-domain I/O; the device operates from 1.8 V to 5.5 V per the ordering information."
},
{
"number": "15",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "16",
"name": "PC4",
"type": "bidirectional",
"description": "General-purpose I/O pin PC4 on PORTC, also usable for USART1 TxD (alternate position) and TCA0 WO4 (alternate position)."
},
{
"number": "17",
"name": "PC5",
"type": "bidirectional",
"description": "General-purpose I/O pin PC5 on PORTC, also usable for USART1 RxD (alternate position) and TCA0 WO5 (alternate position)."
},
{
"number": "18",
"name": "PC6",
"type": "bidirectional",
"description": "General-purpose I/O pin PC6 on PORTC, also usable for USART1 XCK (alternate position) and TCB1 OUT (alternate position)."
},
{
"number": "19",
"name": "PC7",
"type": "bidirectional",
"description": "General-purpose I/O pin PC7 on PORTC, also usable for USART1 XDIR (alternate position) and EVOUTC (alternate position)."
},
{
"number": "20",
"name": "PD0",
"type": "bidirectional",
"description": "General-purpose I/O pin PD0 on PORTD, also usable as analog input AIN0, TCA0 WO0 (alternate position) and AC0 input 2 (CCL LUT2-IN0)."
},
{
"number": "21",
"name": "PD1",
"type": "bidirectional",
"description": "General-purpose I/O pin PD1 on PORTD, also usable as analog input AIN1, AC0 positive input P3, TCA0 WO1 (alternate position) and CCL LUT2-IN1."
},
{
"number": "22",
"name": "PD2",
"type": "bidirectional",
"description": "General-purpose I/O pin PD2 on PORTD, also usable as analog input AIN2, AC0 positive input P0, TCA0 WO2 (alternate position), EVOUTD and CCL LUT2-IN2."
},
{
"number": "23",
"name": "PD3",
"type": "bidirectional",
"description": "General-purpose I/O pin PD3 on PORTD, also usable as analog input AIN3, AC0 negative input N0, TCA0 WO3 (alternate position) and CCL LUT2-OUT."
},
{
"number": "24",
"name": "PD4",
"type": "bidirectional",
"description": "General-purpose I/O pin PD4 on PORTD, also usable as analog input AIN4, AC0 positive input P1 and TCA0 WO4 (alternate position)."
},
{
"number": "25",
"name": "PD5",
"type": "bidirectional",
"description": "General-purpose I/O pin PD5 on PORTD, also usable as analog input AIN5, AC0 negative input N1 and TCA0 WO5 (alternate position)."
},
{
"number": "26",
"name": "PD6",
"type": "bidirectional",
"description": "General-purpose I/O pin PD6 on PORTD, also usable as analog input AIN6, AC0 positive input P2 and CCL LUT2-OUT (alternate position)."
},
{
"number": "27",
"name": "PD7",
"type": "bidirectional",
"description": "General-purpose I/O pin PD7 on PORTD, also usable as the external voltage reference input VREFA, analog input AIN7, AC0 negative input N2 and EVOUTD (alternate position)."
},
{
"number": "28",
"name": "AVDD",
"type": "power_in",
"description": "Supply for the analog domain (ADC, analog peripherals) and the GPIO on the AVDD power domain; the device operates from 1.8 V to 5.5 V per the ordering information."
},
{
"number": "29",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "30",
"name": "PE0",
"type": "bidirectional",
"description": "General-purpose I/O pin PE0 on PORTE, also usable as analog input AIN8, SPI0 MOSI (alternate position) and TCA0 WO0 (alternate position)."
},
{
"number": "31",
"name": "PE1",
"type": "bidirectional",
"description": "General-purpose I/O pin PE1 on PORTE, also usable as analog input AIN9, SPI0 MISO (alternate position) and TCA0 WO1 (alternate position)."
},
{
"number": "32",
"name": "PE2",
"type": "bidirectional",
"description": "General-purpose I/O pin PE2 on PORTE, also usable as analog input AIN10, SPI0 SCK (alternate position), TCA0 WO2 (alternate position) and EVOUTE."
},
{
"number": "33",
"name": "PE3",
"type": "bidirectional",
"description": "General-purpose I/O pin PE3 on PORTE, also usable as analog input AIN11, SPI0 SS (alternate position) and TCA0 WO3 (alternate position)."
},
{
"number": "34",
"name": "PF0 (TOSC1)",
"type": "passive",
"description": "General-purpose I/O pin PF0 on PORTF, shared with the 32.768 kHz crystal oscillator input TOSC1; also usable for USART2 TxD (alternate position) and TCA0 WO0 (alternate position)."
},
{
"number": "35",
"name": "PF1 (TOSC2)",
"type": "passive",
"description": "General-purpose I/O pin PF1 on PORTF, shared with the 32.768 kHz crystal oscillator output TOSC2; also usable for USART2 RxD (alternate position) and TCA0 WO1 (alternate position)."
},
{
"number": "36",
"name": "PF2",
"type": "bidirectional",
"description": "General-purpose I/O pin PF2 on PORTF, also usable for TWI0 SDA (slave), analog input AIN12, USART2 XCK (alternate position), TCA0 WO2 (alternate position) and EVOUTF."
},
{
"number": "37",
"name": "PF3",
"type": "bidirectional",
"description": "General-purpose I/O pin PF3 on PORTF, also usable for TWI0 SCL (slave), analog input AIN13, USART2 XDIR (alternate position) and TCA0 WO3 (alternate position)."
},
{
"number": "38",
"name": "PF4",
"type": "bidirectional",
"description": "General-purpose I/O pin PF4 on PORTF, also usable as analog input AIN14, USART2 TxD (alternate position) and TCA0 WO4 (alternate position)."
},
{
"number": "39",
"name": "PF5",
"type": "bidirectional",
"description": "General-purpose I/O pin PF5 on PORTF, also usable as analog input AIN15, USART2 RxD (alternate position) and TCA0 WO5 (alternate position)."
},
{
"number": "40",
"name": "PF6 (RESET)",
"type": "bidirectional",
"description": "General-purpose I/O pin PF6 on PORTF that is the external Reset pin when the RSTPINCFG fuse selects RESET, also usable for USART2 XCK (alternate position) and CCL LUT3-OUT (alternate position)."
},
{
"number": "41",
"name": "UPDI",
"type": "bidirectional",
"description": "Unified Program and Debug Interface pin used for programming and debugging the device."
},
{
"number": "42",
"name": "VDD",
"type": "power_in",
"description": "Supply voltage for the digital core and VDD-domain I/O; the device operates from 1.8 V to 5.5 V per the ordering information."
},
{
"number": "43",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "44",
"name": "PA0 (EXTCLK)",
"type": "bidirectional",
"description": "General-purpose I/O pin PA0 on PORTA (AVDD power domain), also usable as external clock input EXTCLK, USART0 TxD (alternate position), TCA0 WO0 and CCL LUT0-IN0 and as an event input."
},
{
"number": "45",
"name": "PA1",
"type": "bidirectional",
"description": "General-purpose I/O pin PA1 on PORTA (AVDD power domain), also usable for USART0 RxD, TCA0 WO1 and CCL LUT0-IN1."
},
{
"number": "46",
"name": "PA2",
"type": "bidirectional",
"description": "General-purpose I/O pin PA2 on PORTA (AVDD power domain), also usable for TWI0 SDA (master), USART0 XCK, TCA0 WO2, TCB0 WO and EVOUTA and CCL LUT0-IN2."
},
{
"number": "47",
"name": "PA3",
"type": "bidirectional",
"description": "General-purpose I/O pin PA3 on PORTA (AVDD power domain), also usable for TWI0 SCL (master), USART0 XDIR, TCA0 WO3, TCB1 WO and CCL LUT0-OUT."
},
{
"number": "48",
"name": "PA4",
"type": "bidirectional",
"description": "General-purpose I/O pin PA4 on PORTA (AVDD power domain), also usable for USART0 TxD (alternate position), SPI0 MOSI and TCA0 WO4."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The 48-pin VQFN/TQFP figure on page 16 has scrambled text extraction, so pin-to-name mapping was tak; Pin descriptions list alternate functions as stated in the multiplexing table; the table's column al; The datasheet gives no per-pin voltage or current limits in this excerpt; the only supply range give",
"exposed pad 49 added from the footprint"
],
"pages_sent": 94,
"cost_usd": 0.3049,
"at": "2026-10-30T22:33:50"
},
"datasheet": {
"url": "http://ww1.microchip.com/downloads/en/DeviceDoc/ATmega808-09-1608-09-DS40002172B.pdf",
"pages": 543,
"sha256": "fe2ccf6f4621a1cd",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "atmega809-mur.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.02,
6.02,
0.9
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "8c5a9ae8025cf03c82b8d148b5470d2651539deb727938395d10dc9acd340710",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "atmega809-mur-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
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"seat": "z = 0",
"extents_mm": [
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"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "7093e2fbf14258abc665fd9438d7183e87796482f77b3116773b65157c6fb78d",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "6LX (C04-00494, 48-Lead VQFN 6x6 mm, 4.1x4.1 mm exposed pad)",
"source_page": 533,
"D": {
"nom_mm": 6,
"range_mm": [
null,
null
]
},
"E1": {
"nom_mm": 6,
"range_mm": [
null,
null
]
},
"e": {
"nom_mm": 0.4,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 0.85,
"range_mm": [
0.8,
0.9
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "atmega809-mur.step",
"verdict": "PASS",
"reasons": [
"height within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
},
"metadata": {
"specs": {
"Manufacturer": "Microchip Tech",
"Package": "VQFN-48-EP(6x6)",
"Category": "Embedded Processors & Controllers",
"Pins": "49"
},
"characteristics": {
"version": 1,
"source": "datasheet",
"datasheet_sha256": "fe2ccf6f4621a1cdd2e638320633fefc6969bde235ea84094c8cd108a17fc2b8",
"rows": [
{
"name": "Supply Voltage",
"symbol": "",
"kind": "recommended_operating",
"unit": "V",
"min": 1.8,
"typ": null,
"max": 5.5,
"conditions": "ATmega809-MUR, Ordering Information table (Supply Voltage column)",
"source_page": 513,
"source": "datasheet"
},
{
"name": "Temperature Range",
"symbol": "",
"kind": "recommended_operating",
"unit": "°C",
"min": -40,
"typ": null,
"max": 85,
"conditions": "ATmega809-MUR (-40°C to +85°C, Tape & Reel), Ordering Information table",
"source_page": 513,
"source": "datasheet"
},
{
"name": "Max. CPU Speed",
"symbol": "",
"kind": "recommended_operating",
"unit": "MHz",
"min": null,
"typ": null,
"max": 20,
"conditions": "ATmega809-MUR, Ordering Information table (Max. CPU Speed column), supply 1.8-5.5V",
"source_page": 513,
"source": "datasheet"
}
]
}
},
"variants": [],
"sections": [
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"info"
],
"discovery_triggers": [
"atmega809-mur"
],
"discovery_pitch": "ATMEGA809-MUR (Microchip Tech) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
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"path": "docs/hero.png"
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"atmega809-mur-etched.glb"
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"visibility": {
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}
}