component

ATMEGA809-AFR

Public Made by Adom

by adom

Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersatmega809-afrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

ATMEGA809-AFR

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-48(7x7)

ATMEGA809-AFR from Microchip Tech, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA5 bidirectional PORTA pin 5 (VDD domain GPIO) with alternate USART0 RxD, SPI0 MISO and TCA0 WO5.
2 PA6 bidirectional PORTA pin 6 (VDD domain GPIO) with alternate USART0 XCK, SPI0 SCK and CCL 0-OUT.
3 PA7 bidirectional PORTA pin 7 (VDD domain GPIO) with CLKOUT, CCL OUT, alternate USART0 XDIR, SPI0 SS and EVOUTA.
4 PB0 bidirectional PORTB pin 0 with USART3 TxD and alternate TCA0 WO0.
5 PB1 bidirectional PORTB pin 1 with USART3 RxD and alternate TCA0 WO1.
6 PB2 bidirectional PORTB pin 2 with USART3 XCK, alternate TCA0 WO2 and EVOUTB.
7 PB3 bidirectional PORTB pin 3 with USART3 XDIR and alternate TCA0 WO3.
8 PB4 bidirectional PORTB pin 4 with alternate USART3 TxD, TCA0 WO4 and TCB2 WO.
9 PB5 bidirectional PORTB pin 5 with alternate USART3 RxD and TCA0 WO5, and TCB3 WO.
10 PC0 bidirectional PORTC pin 0 with USART1 TxD, TCB2 WO, CCL 1-IN0 and alternate SPI0 MOSI and TCA0 WO0.
11 PC1 bidirectional PORTC pin 1 with USART1 RxD, CCL 1-IN1 and alternate SPI0 MISO, TCA0 WO1 and TCB3 WO.
12 PC2 bidirectional PORTC pin 2 with TWI, USART1 XCK, EVOUTC, CCL 1-IN2 and alternate SPI0 SCK, TWI0 SDA (host/client) and TCA0 WO2.
13 PC3 bidirectional PORTC pin 3 with TWI, USART1 XDIR, CCL 1-OUT and alternate SPI0 SS, TWI0 SCL (host/client) and TCA0 WO3.
14 VDD power_in Input supply voltage pin.
15 GND power_in Ground pin.
16 PC4 bidirectional PORTC pin 4 with alternate USART1 TxD and TCA0 WO4.
17 PC5 bidirectional PORTC pin 5 with alternate USART1 RxD and TCA0 WO5.
18 PC6 bidirectional PORTC pin 6 with alternate USART1 XCK and CCL 1-OUT.
19 PC7 bidirectional PORTC pin 7 with alternate USART1 XDIR and EVOUTC.
20 PD0 bidirectional PORTD pin 0 (AVDD domain GPIO) with ADC0 AIN0, CCL 2-IN0 and alternate TCA0 WO0.
21 PD1 bidirectional PORTD pin 1 (AVDD domain GPIO) with ADC0 AIN1, AC0 P3, CCL 2-IN1 and alternate TCA0 WO1.
22 PD2 bidirectional PORTD pin 2 (AVDD domain GPIO) with ADC0 AIN2, AC0 P0, EVOUTD, CCL 2-IN2 and alternate TCA0 WO2.
23 PD3 bidirectional PORTD pin 3 (AVDD domain GPIO) with ADC0 AIN3, AC0 N0, CCL 2-OUT and alternate TCA0 WO3.
24 PD4 bidirectional PORTD pin 4 (AVDD domain GPIO) with ADC0 AIN4, AC0 P1 and alternate TCA0 WO4.
25 PD5 bidirectional PORTD pin 5 (AVDD domain GPIO) with ADC0 AIN5, AC0 N1 and alternate TCA0 WO5.
26 PD6 bidirectional PORTD pin 6 (AVDD domain GPIO) with ADC0 AIN6, AC0 P2 and alternate CCL 2-OUT.
27 PD7 bidirectional PORTD pin 7 (AVDD domain GPIO) with VREFA external reference, ADC0 AIN7, AC0 N2 and alternate EVOUTD.
28 AVDD power_in Analog input supply voltage pin for the AVDD power domain GPIO.
29 GND power_in Ground pin.
30 PE0 bidirectional PORTE pin 0 with ADC0 AIN8 and alternate SPI0 MOSI and TCA0 WO0.
31 PE1 bidirectional PORTE pin 1 with ADC0 AIN9 and alternate SPI0 MISO and TCA0 WO1.
32 PE2 bidirectional PORTE pin 2 with ADC0 AIN10, EVOUTE and alternate SPI0 SCK and TCA0 WO2.
33 PE3 bidirectional PORTE pin 3 with ADC0 AIN11 and alternate SPI0 SS and TCA0 WO3.
34 PF0 (TOSC1) bidirectional PORTF pin 0 with TOSC1 crystal input, USART2 TxD, CCL 3-IN0 and alternate TCA0 WO0.
35 PF1 (TOSC2) bidirectional PORTF pin 1 with TOSC2 crystal pin, USART2 RxD, CCL 3-IN1 and alternate TCA0 WO1.
36 PF2 bidirectional PORTF pin 2 with TWI, ADC0 AIN12, USART2 XCK, EVOUTF, CCL 3-IN2 and alternate TWI0 SDA (client) and TCA0 WO2.
37 PF3 bidirectional PORTF pin 3 with TWI, ADC0 AIN13, USART2 XDIR, CCL 3-OUT and alternate TWI0 SCL (client) and TCA0 WO3.
38 PF4 bidirectional PORTF pin 4 with ADC0 AIN14 and alternate USART2 TxD, TCA0 WO4 and TCB0 WO.
39 PF5 bidirectional PORTF pin 5 with ADC0 AIN15 and alternate USART2 RxD, TCA0 WO5 and TCB1 WO.
40 PF6 (RESET) bidirectional PORTF pin 6, configurable by the RSTPINCFG fuse as GPIO or as the RESET pin, with alternate USART2 XCK and CCL 3-OUT.
41 UPDI bidirectional Unified Program and Debug Interface pin used for programming and debug.
42 VDD power_in Input supply voltage pin.
43 GND power_in Ground pin.
44 PA0 (EXTCLK) bidirectional PORTA pin 0 (VDD domain GPIO) with EXTCLK external clock input, USART0 TxD and TCA0 WO0, CCL 0-IN0.
45 PA1 bidirectional PORTA pin 1 (VDD domain GPIO) with USART0 RxD, TCA0 WO1 and CCL 0-IN1.
46 PA2 bidirectional PORTA pin 2 (VDD domain GPIO) with TWI, USART0 XCK, TWI0 SDA (host/client), TCA0 WO2, TCB0 WO, EVOUTA and CCL 0-IN2.
47 PA3 bidirectional PORTA pin 3 (VDD domain GPIO) with TWI, USART0 XDIR, TWI0 SCL (host/client), TCA0 WO3, TCB1 WO and CCL 0-OUT.
48 PA4 bidirectional PORTA pin 4 (VDD domain GPIO) with alternate USART0 TxD, SPI0 MOSI and TCA0 WO4.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 1.8 5.5 V ATmega809-AFR ordering table, supply voltage 1.8-5.5V 520
Operating Temperature Range -40 125 °C ATmega809-AFR ordering table, -40°C to +125°C 520
Max. CPU Speed 20 MHz ATmega809-AFR ordering table 520

CAD (KiCad official)

  • Symbol: ATMEGA809-AFR
  • Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
  • 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: atmega809-afr-etched.step / atmega809-afr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega809-afr.step / atmega809-afr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (552 pp, sha256 e4bbeee766cda6b4, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF