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ATMEGA64L-8AU

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Microchip Tech MICROCHIP, TQFP-64(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersatmega64l-8aufactory-2.0.0extractor-text

Verified ATMEGA64L-8AU

by Ray · last 10 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

10 Nov 2026RayPublished by the parts factory: tier mfr, 64 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATMEGA64L-8AU · TQFP-64(14x14) · 64 pins
  • ✓copper: 64 copper pads, none touching another net
  • ✓datasheet: all 64 pin names found in the 15-page datasheet
  • ✓distributor: lcsc C1337522, digikey ATMEGA64L-8AU-ND, mouser 556-ATMEGA64L-8AU
  • ✓family: TQFP-64_14x14mm_P0.8mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-34crb2tr/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 64 pins = 64 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 64 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 74 kB, viewers/symbol.html 40 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ atmega64l-8au.kicad_sym✓ atmega64l-8au.kicad_mod✓ atmega64l-8au.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers atmega64l-8au: viewers rendered from the public page · Ray
atmega64l-8au-etched.glb Publish 0.1.0 · Ray
atmega64l-8au-etched.step atmega64l-8au: factory component page (tier=mfr) · Ray
atmega64l-8au-hero.glb atmega64l-8au: hero GLB from the etched model (keeps the MPN mark) · Ray
atmega64l-8au-hero.overlay.json Publish 0.1.0 · Ray
atmega64l-8au.glb Publish 0.1.0 · Ray
atmega64l-8au.kicad_mod Publish 0.1.0 · Ray
atmega64l-8au.kicad_sym Publish 0.1.0 · Ray
atmega64l-8au.lbr Publish 0.1.0 · Ray
atmega64l-8au.step Publish 0.1.0 · Ray
package.json Publish 0.1.1 · Ray
page.json Publish 0.1.1 · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 64 pins · Ray

ATMEGA64L-8AU

Microchip Tech · MICROCHIP · TQFP-64(14x14)

ATMEGA64L-8AU from Microchip Tech, in a TQFP-64(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PEN input Programming enable pin for SPI Serial Programming mode; holding it low during Power-on Reset enters SPI programming mode, it is internally pulled high and has no function in normal operation.
2 PE0 bidirectional Port E bit 0, bi-directional I/O with selectable internal pull-up; alternate functions RXD0/(PDI).
3 PE1 bidirectional Port E bit 1, bi-directional I/O with selectable internal pull-up; alternate functions (TXD0/PDO).
4 PE2 bidirectional Port E bit 2, bi-directional I/O with selectable internal pull-up; alternate functions XCK0/AIN0.
5 PE3 bidirectional Port E bit 3, bi-directional I/O with selectable internal pull-up; alternate functions OC3A/AIN1.
6 PE4 bidirectional Port E bit 4, bi-directional I/O with selectable internal pull-up; alternate functions OC3B/INT4.
7 PE5 bidirectional Port E bit 5, bi-directional I/O with selectable internal pull-up; alternate functions OC3C/INT5.
8 PE6 bidirectional Port E bit 6, bi-directional I/O with selectable internal pull-up; alternate functions T3/INT6.
9 PE7 bidirectional Port E bit 7, bi-directional I/O with selectable internal pull-up; alternate functions ICP3/INT7.
10 PB0 bidirectional Port B bit 0, bi-directional I/O with selectable internal pull-up; alternate function SS.
11 PB1 bidirectional Port B bit 1, bi-directional I/O with selectable internal pull-up; alternate function SCK.
12 PB2 bidirectional Port B bit 2, bi-directional I/O with selectable internal pull-up; alternate function MOSI.
13 PB3 bidirectional Port B bit 3, bi-directional I/O with selectable internal pull-up; alternate function MISO.
14 PB4 bidirectional Port B bit 4, bi-directional I/O with selectable internal pull-up; alternate function OC0.
15 PB5 bidirectional Port B bit 5, bi-directional I/O with selectable internal pull-up; alternate function OC1A.
16 PB6 bidirectional Port B bit 6, bi-directional I/O with selectable internal pull-up; alternate function OC1B.
17 PB7 bidirectional Port B bit 7, bi-directional I/O with selectable internal pull-up; alternate functions OC2/OC1C.
18 PG3 bidirectional Port G bit 3, bi-directional I/O with selectable internal pull-up; alternate function TOSC2 (oscillator pin).
19 PG4 bidirectional Port G bit 4, bi-directional I/O with selectable internal pull-up; alternate function TOSC1 (oscillator pin).
20 RESET input Reset input; a low level longer than the minimum pulse length generates a reset even if the clock is not running.
21 VCC power_in Digital supply voltage.
22 GND power_in Ground.
23 XTAL2 output Output from the inverting Oscillator amplifier.
24 XTAL1 input Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
25 PD0 bidirectional Port D bit 0, bi-directional I/O with selectable internal pull-up; alternate functions SCL/INT0.
26 PD1 bidirectional Port D bit 1, bi-directional I/O with selectable internal pull-up; alternate functions SDA/INT1.
27 PD2 bidirectional Port D bit 2, bi-directional I/O with selectable internal pull-up; alternate functions RXD1/INT2.
28 PD3 bidirectional Port D bit 3, bi-directional I/O with selectable internal pull-up; alternate functions TXD1/INT3.
29 PD4 bidirectional Port D bit 4, bi-directional I/O with selectable internal pull-up; alternate function ICP1.
30 PD5 bidirectional Port D bit 5, bi-directional I/O with selectable internal pull-up; alternate function XCK1.
31 PD6 bidirectional Port D bit 6, bi-directional I/O with selectable internal pull-up; alternate function T1.
32 PD7 bidirectional Port D bit 7, bi-directional I/O with selectable internal pull-up; alternate function T2.
33 PG0 bidirectional Port G bit 0, bi-directional I/O with selectable internal pull-up; alternate function WR (external memory write strobe).
34 PG1 bidirectional Port G bit 1, bi-directional I/O with selectable internal pull-up; alternate function RD (external memory read strobe).
35 PC0 bidirectional Port C bit 0, bi-directional I/O with selectable internal pull-up; alternate function A8 (external memory address).
36 PC1 bidirectional Port C bit 1, bi-directional I/O with selectable internal pull-up; alternate function A9 (external memory address).
37 PC2 bidirectional Port C bit 2, bi-directional I/O with selectable internal pull-up; alternate function A10 (external memory address).
38 PC3 bidirectional Port C bit 3, bi-directional I/O with selectable internal pull-up; alternate function A11 (external memory address).
39 PC4 bidirectional Port C bit 4, bi-directional I/O with selectable internal pull-up; alternate function A12 (external memory address).
40 PC5 bidirectional Port C bit 5, bi-directional I/O with selectable internal pull-up; alternate function A13 (external memory address).
41 PC6 bidirectional Port C bit 6, bi-directional I/O with selectable internal pull-up; alternate function A14 (external memory address).
42 PC7 bidirectional Port C bit 7, bi-directional I/O with selectable internal pull-up; alternate function A15 (external memory address).
43 PG2 bidirectional Port G bit 2, bi-directional I/O with selectable internal pull-up; alternate function ALE (external memory address latch enable).
44 PA7 bidirectional Port A bit 7, bi-directional I/O with selectable internal pull-up; alternate function AD7 (external memory address/data).
45 PA6 bidirectional Port A bit 6, bi-directional I/O with selectable internal pull-up; alternate function AD6 (external memory address/data).
46 PA5 bidirectional Port A bit 5, bi-directional I/O with selectable internal pull-up; alternate function AD5 (external memory address/data).
47 PA4 bidirectional Port A bit 4, bi-directional I/O with selectable internal pull-up; alternate function AD4 (external memory address/data).
48 PA3 bidirectional Port A bit 3, bi-directional I/O with selectable internal pull-up; alternate function AD3 (external memory address/data).
49 PA2 bidirectional Port A bit 2, bi-directional I/O with selectable internal pull-up; alternate function AD2 (external memory address/data).
50 PA1 bidirectional Port A bit 1, bi-directional I/O with selectable internal pull-up; alternate function AD1 (external memory address/data).
51 PA0 bidirectional Port A bit 0, bi-directional I/O with selectable internal pull-up; alternate function AD0 (external memory address/data).
52 VCC power_in Digital supply voltage.
53 GND power_in Ground.
54 PF7 bidirectional Port F bit 7, ADC analog input channel 7 or digital I/O; JTAG TDI, pull-up stays active when JTAG is enabled even during reset.
55 PF6 bidirectional Port F bit 6, ADC analog input channel 6 or digital I/O; JTAG TDO, which is tri-stated unless TAP states that shift out data are entered.
56 PF5 bidirectional Port F bit 5, ADC analog input channel 5 or digital I/O; JTAG TMS, pull-up stays active when JTAG is enabled even during reset.
57 PF4 bidirectional Port F bit 4, ADC analog input channel 4 or digital I/O; JTAG TCK, pull-up stays active when JTAG is enabled even during reset.
58 PF3 bidirectional Port F bit 3, ADC analog input channel 3 or digital I/O.
59 PF2 bidirectional Port F bit 2, ADC analog input channel 2 or digital I/O.
60 PF1 bidirectional Port F bit 1, ADC analog input channel 1 or digital I/O.
61 PF0 bidirectional Port F bit 0, ADC analog input channel 0 or digital I/O.
62 AREF input Analog reference pin for the A/D Converter.
63 GND power_in Ground.
64 AVCC power_in Supply voltage pin for Port F and the A/D Converter; must be externally connected to VCC even if the ADC is not used, through a low-pass filter if the ADC is used.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-64(14x14)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating voltage (ATmega64L) 2.7 5.5 V for Atmel ATmega64L 1
Speed grade (ATmega64L) 0 8 MHz for ATmega64L 1

CAD (KiCad official)

  • Symbol: ATMEGA64L-8AU
  • Footprint: Package_QFP:TQFP-64_14x14mm_P0.8mm
  • 3D model: TQFP-64(14x14) (KiCad packages3D, STEP)
  • 3D model files: atmega64l-8au-etched.step / atmega64l-8au-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega64l-8au.step / atmega64l-8au.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (15 pp, sha256 0deef41350e65cc6, retrieved 2026-11-10, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF