component
ATMEGA48P-20AU
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, TQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ATMEGA48P-20AU
Microchip Tech · Pre-ordered MCUs · TQFP-32(7x7)
ATMEGA48P-20AU from Microchip Tech, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PD3 | bidirectional | Port D bit 3 is a bi-directional I/O pin with internal pull-up that can serve as external interrupt INT1, OC2B output, or PCINT19 source, and must be configured as an output for OC2B. |
| 2 | PD4 | bidirectional | Port D bit 4 is a bi-directional I/O pin with internal pull-up that can serve as USART external clock XCK, Timer/Counter0 external counter input T0, or PCINT20 source. |
| 3 | GND | power_in | Ground. |
| 4 | VCC | power_in | Digital supply voltage; ATmega48P/88P/168P operates at 2.7 - 5.5V (ATmega48PV variant 1.8 - 5.5V). |
| 5 | GND | power_in | Ground. |
| 6 | VCC | power_in | Digital supply voltage; ATmega48P/88P/168P operates at 2.7 - 5.5V (ATmega48PV variant 1.8 - 5.5V). |
| 7 | PB6 | bidirectional | Port B bit 6 is the input to the inverting oscillator amplifier (XTAL1) or Timer Oscillator pin 1 depending on clock fuse settings; when used as a clock pin it cannot be used as I/O. |
| 8 | PB7 | bidirectional | Port B bit 7 is the output of the inverting oscillator amplifier (XTAL2) or Timer Oscillator pin 2 depending on clock fuse settings; when used as a clock pin it cannot be used as I/O. |
| 9 | PD5 | bidirectional | Port D bit 5 is a bi-directional I/O pin with internal pull-up that can serve as Timer/Counter1 external counter input T1, OC0B output, or PCINT21 source. |
| 10 | PD6 | bidirectional | Port D bit 6 is a bi-directional I/O pin that serves as Analog Comparator positive input AIN0 (pull-up should be switched off), OC0A output, or PCINT22 source. |
| 11 | PD7 | bidirectional | Port D bit 7 is a bi-directional I/O pin that serves as Analog Comparator negative input AIN1 (pull-up should be switched off) or PCINT23 source. |
| 12 | PB0 | bidirectional | Port B bit 0 is a bi-directional I/O pin that serves as Timer/Counter1 input capture ICP1, divided system clock output CLKO, or PCINT0 source. |
| 13 | PB1 (OC1A/PCINT1) | bidirectional | Port B bit 1 is a bi-directional I/O pin that serves as Timer/Counter1 output compare match A output OC1A (must be configured as output) or PCINT1 source. |
| 14 | PB2 (SS/OC1B/PCINT2) | bidirectional | Port B bit 2 is a bi-directional I/O pin that serves as SPI slave select SS, Timer/Counter1 output compare match B output OC1B (must be configured as output), or PCINT2 source. |
| 15 | PB3 (MOSI/OC2A/PCINT3) | bidirectional | Port B bit 3 is a bi-directional I/O pin that serves as SPI MOSI, Timer/Counter2 output compare match A output OC2A (must be configured as output), or PCINT3 source. |
| 16 | PB4 (MISO/PCINT4) | bidirectional | Port B bit 4 is a bi-directional I/O pin that serves as SPI MISO data pin or PCINT4 source. |
| 17 | PB5 (SCK/PCINT5) | bidirectional | Port B bit 5 is a bi-directional I/O pin that serves as SPI clock SCK (input when SPI is slave) or PCINT5 source. |
| 18 | AVCC | power_in | Supply voltage pin for the A/D converter, PC3:0 and ADC7:6; it should be externally connected to VCC even if the ADC is not used, and through a low-pass filter if the ADC is used. |
| 19 | ADC6 | input | ADC input channel 6 (TQFP and QFN/MLF package only), powered from the analog supply, serving as a 10-bit ADC channel. |
| 20 | AREF | input | Analog reference pin for the A/D converter. |
| 21 | GND | power_in | Ground. |
| 22 | ADC7 | input | ADC input channel 7 (TQFP and QFN/MLF package only), powered from the analog supply, serving as a 10-bit ADC channel. |
| 23 | PC0 (ADC0/PCINT8) | bidirectional | Port C bit 0 is a bi-directional I/O pin with internal pull-up that can serve as ADC input channel 0 (analog power) or PCINT8 source. |
| 24 | PC1 (ADC1/PCINT9) | bidirectional | Port C bit 1 is a bi-directional I/O pin with internal pull-up that can serve as ADC input channel 1 (analog power) or PCINT9 source. |
| 25 | PC2 (ADC2/PCINT10) | bidirectional | Port C bit 2 is a bi-directional I/O pin with internal pull-up that can serve as ADC input channel 2 (analog power) or PCINT10 source. |
| 26 | PC3 (ADC3/PCINT11) | bidirectional | Port C bit 3 is a bi-directional I/O pin with internal pull-up that can serve as ADC input channel 3 (analog power) or PCINT11 source. |
| 27 | PC4 (ADC4/SDA/PCINT12) | bidirectional | Port C bit 4 is a bi-directional I/O pin with internal pull-up that serves as 2-wire serial data SDA when TWEN is set, ADC input channel 4 (digital power), or PCINT12 source. |
| 28 | PC5 (ADC5/SCL/PCINT13) | bidirectional | Port C bit 5 is a bi-directional I/O pin with internal pull-up that serves as 2-wire serial clock SCL when TWEN is set, ADC input channel 5 (digital power), or PCINT13 source. |
| 29 | PC6 (RESET/PCINT14) | input | If RSTDISBL fuse is unprogrammed this pin is the Reset input and a low level longer than the minimum pulse length (Table 29-3) generates a reset; shorter pulses are not ensured to reset; if programmed it is I/O with electrical characteristics differing from other Port C pins. |
| 30 | PD0 (RXD/PCINT16) | bidirectional | Port D bit 0 is a bi-directional I/O pin with internal pull-up that serves as USART receive data input RXD (input when USART receiver enabled) or PCINT16 source. |
| 31 | PD1 (TXD/PCINT17) | bidirectional | Port D bit 1 is a bi-directional I/O pin that serves as USART transmit data output TXD (output when USART transmitter enabled) or PCINT17 source. |
| 32 | PD2 (INT0/PCINT18) | bidirectional | Port D bit 2 is a bi-directional I/O pin with internal pull-up that serves as external interrupt source INT0 or PCINT18 source. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage temperature | -65 | 150 | °C | 324 | |||
| Operating temperature | -55 | 125 | °C | 324 | |||
| Voltage on any pin except RESET with respect to Ground | -0.5 | V | 324 | ||||
| Voltage on RESET with respect to Ground | -0.5 | 13 | V | 324 | |||
| Maximum Operating Voltage | 6 | V | 324 | ||||
| DC Current per I/O Pin | 40 | mA | 324 | ||||
| DC Current VCC and GND Pins | 200 | mA | 324 | ||||
| Supply voltage (speed grade of ATmega48P-20AU) | VCC | 2.7 | 5.5 | V | Ordering code ATmega48P-20AU, 20 MHz grade | 418 | |
| Speed (maximum frequency) | 20 | MHz | Speed grade 20 for ATmega48P-20AU; see Figure 29-1 | 418 | |||
| Operating temperature range (Industrial) | TA | -40 | 85 | °C | Industrial operational range | 418 | |
| Input Low Voltage, except XTAL1 and RESET pin | VIL | -0.5 | V | VCC = 2.4V - 5.5V | 324 | ||
| Input Low Voltage, XTAL1 pin | VIL1 | -0.5 | V | VCC = 1.8V - 5.5V | 324 | ||
| Input Low Voltage, RESET pin | VIL2 | -0.5 | V | VCC = 1.8V - 5.5V | 324 | ||
| Input Low Voltage, RESET pin as I/O | VIL3 | -0.5 | V | VCC = 2.4V - 5.5V | 324 | ||
| Output Low Voltage (except RESET pin) | VOL | 0.9 | V | IOL = 20 mA, VCC = 5V | 324 | ||
| Output Low Voltage (except RESET pin) | VOL | 0.6 | V | IOL = 10 mA, VCC = 3V | 324 | ||
| Output High Voltage (except Reset pin) | VOH | 4.2 | V | IOH = -20 mA, VCC = 5V | 324 | ||
| Output High Voltage (except Reset pin) | VOH | 2.3 | V | IOH = -10 mA, VCC = 3V | 324 | ||
| Input Leakage Current I/O Pin (low) | IIL | 1 | µA | VCC = 5.5V, pin low (absolute value) | 324 | ||
| Input Leakage Current I/O Pin (high) | IIH | 1 | µA | VCC = 5.5V, pin high (absolute value) | 324 | ||
| Power Supply Current, Active | ICC | 1.9 | 2.5 | mA | Active 4 MHz, VCC = 3V | 325 | |
| Power Supply Current, Active | ICC | 6.8 | 9 | mA | Active 8 MHz, VCC = 5V | 325 | |
| Power Supply Current, Idle | ICC | 0.4 | 0.7 | mA | Idle 4 MHz, VCC = 3V | 325 | |
| Power Supply Current, Idle | ICC | 1.6 | 2.7 | mA | Idle 8 MHz, VCC = 5V | 325 | |
| Power Supply Current, Power-save mode | ICC | 0.85 | 2.6 | µA | 32 kHz TOSC enabled, VCC = 3V | 325 | |
| Power Supply Current, Power-down mode | ICC | 4.2 | 8 | µA | WDT enabled, VCC = 3V | 325 | |
| Power Supply Current, Power-down mode | ICC | 0.18 | 2 | µA | WDT disabled, VCC = 3V | 325 | |
| Reset Pull-up Resistor | RRST | 30 | 60 | kΩ | 325 | ||
| I/O Pin Pull-up Resistor | RPU | 20 | 50 | kΩ | 325 | ||
| Analog Comparator Input Offset Voltage | VACIO | 40 | mV | VCC = 5V, Vin = VCC/2 | 325 | ||
| Analog Comparator Input Leakage Current | IACLK | -50 | 50 | nA | VCC = 5V, Vin = VCC/2 | 325 | |
| Analog Comparator Propagation Delay | tACID | 750 | ns | VCC = 2.7V | 325 | ||
| Analog Comparator Propagation Delay | tACID | 500 | ns | VCC = 4.0V | 325 | ||
| Calibrated Internal RC Oscillator accuracy (factory calibration) | -10 | 10 | % | 8.0 MHz, VCC = 3V, 25C | 329 | ||
| Calibrated Internal RC Oscillator accuracy (user calibration) | -1 | 1 | % | User calibration, VCC = 2.7V - 5.5V, -40C - 85C | 329 | ||
| Calibrated Internal RC Oscillator frequency (user calibration) | 7.3 | 8.1 | MHz | User calibration, VCC = 2.7V - 5.5V, -40C - 85C | 329 | ||
| Oscillator Frequency (external clock) | 1/tCLCL | 0 | 10 | MHz | VCC = 2.7-5.5V | 329 | |
| Clock Period (external clock) | tCLCL | 100 | ns | VCC = 2.7-5.5V | 329 | ||
| High Time (external clock) | tCHCX | 40 | ns | VCC = 2.7-5.5V | 329 | ||
| Low Time (external clock) | tCLCX | 40 | ns | VCC = 2.7-5.5V | 329 | ||
| Oscillator Frequency (external clock) | 1/tCLCL | 0 | 20 | MHz | VCC = 4.5-5.5V | 329 | |
| Clock Period (external clock) | tCLCL | 50 | ns | VCC = 4.5-5.5V | 329 | ||
| High Time (external clock) | tCHCX | 20 | ns | VCC = 4.5-5.5V | 329 | ||
| Low Time (external clock) | tCLCX | 20 | ns | VCC = 4.5-5.5V | 329 | ||
| Power-on Reset Threshold Voltage (rising) | VPOT | 1.1 | 1.4 | 1.6 | V | 330 | |
| Power-on Reset Threshold Voltage (falling) | VPOT | 0.6 | 1.3 | 1.6 | V | 330 | |
| Power-on Slope Rate | SRON | 0.01 | 10 | V/ms | 330 | ||
| Minimum pulse width on RESET Pin | tRST | 2.5 | µs | 330 | |||
| Min Pulse Width on Brown-out Reset | tBOD | 2 | µs | 330 | |||
| Bandgap reference voltage | VBG | 1 | 1.1 | 1.2 | V | VCC = 2.7, TA = 25°C | 330 |
| Brown-out Detector trigger level (BODLEVEL 110) | VBOT | 1.7 | 1.8 | 2 | V | BODLEVEL 2:0 = 110 | 330 |
| Brown-out Detector trigger level (BODLEVEL 101) | VBOT | 2.5 | 2.7 | 2.9 | V | BODLEVEL 2:0 = 101 | 330 |
| Brown-out Detector trigger level (BODLEVEL 100) | VBOT | 4.1 | 4.3 | 4.5 | V | BODLEVEL 2:0 = 100 | 330 |
| Setup time (master) | 10 | ns | Master | 331 | |||
| Hold time (master) | 10 | ns | Master | 331 | |||
| SCK to out (master) | 10 | ns | Master | 331 | |||
| Setup time (slave) | 10 | ns | Slave | 331 | |||
| SCK to out (slave) | 15 | ns | Slave | 331 | |||
| SCL Clock Frequency | fSCL | 0 | 400 | kHz | fCK > max(16fSCL, 250kHz) | 333 | |
| Output Low-voltage (2-wire) | VOL | 0.4 | V | 3 mA sink current | 333 |
CAD (KiCad official)
- Symbol:
ATMEGA48P-20AU - Footprint:
Package_QFP:TQFP-32_7x7mm_P0.8mm - 3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
atmega48p-20au-etched.step/atmega48p-20au-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atmega48p-20au.step/atmega48p-20au.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (436 pp, sha256
aab081a362918ab9, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ATMEGA48P-20AU
**Microchip Tech** · Pre-ordered MCUs · TQFP-32(7x7)
ATMEGA48P-20AU from Microchip Tech, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PD3 | bidirectional | Port D bit 3 is a bi-directional I/O pin with internal pull-up that can serve as external interrupt INT1, OC2B output, or PCINT19 source, and must be configured as an output for OC2B. |
| 2 | PD4 | bidirectional | Port D bit 4 is a bi-directional I/O pin with internal pull-up that can serve as USART external clock XCK, Timer/Counter0 external counter input T0, or PCINT20 source. |
| 3 | GND | power_in | Ground. |
| 4 | VCC | power_in | Digital supply voltage; ATmega48P/88P/168P operates at 2.7 - 5.5V (ATmega48PV variant 1.8 - 5.5V). |
| 5 | GND | power_in | Ground. |
| 6 | VCC | power_in | Digital supply voltage; ATmega48P/88P/168P operates at 2.7 - 5.5V (ATmega48PV variant 1.8 - 5.5V). |
| 7 | PB6 | bidirectional | Port B bit 6 is the input to the inverting oscillator amplifier (XTAL1) or Timer Oscillator pin 1 depending on clock fuse settings; when used as a clock pin it cannot be used as I/O. |
| 8 | PB7 | bidirectional | Port B bit 7 is the output of the inverting oscillator amplifier (XTAL2) or Timer Oscillator pin 2 depending on clock fuse settings; when used as a clock pin it cannot be used as I/O. |
| 9 | PD5 | bidirectional | Port D bit 5 is a bi-directional I/O pin with internal pull-up that can serve as Timer/Counter1 external counter input T1, OC0B output, or PCINT21 source. |
| 10 | PD6 | bidirectional | Port D bit 6 is a bi-directional I/O pin that serves as Analog Comparator positive input AIN0 (pull-up should be switched off), OC0A output, or PCINT22 source. |
| 11 | PD7 | bidirectional | Port D bit 7 is a bi-directional I/O pin that serves as Analog Comparator negative input AIN1 (pull-up should be switched off) or PCINT23 source. |
| 12 | PB0 | bidirectional | Port B bit 0 is a bi-directional I/O pin that serves as Timer/Counter1 input capture ICP1, divided system clock output CLKO, or PCINT0 source. |
| 13 | PB1 (OC1A/PCINT1) | bidirectional | Port B bit 1 is a bi-directional I/O pin that serves as Timer/Counter1 output compare match A output OC1A (must be configured as output) or PCINT1 source. |
| 14 | PB2 (SS/OC1B/PCINT2) | bidirectional | Port B bit 2 is a bi-directional I/O pin that serves as SPI slave select SS, Timer/Counter1 output compare match B output OC1B (must be configured as output), or PCINT2 source. |
| 15 | PB3 (MOSI/OC2A/PCINT3) | bidirectional | Port B bit 3 is a bi-directional I/O pin that serves as SPI MOSI, Timer/Counter2 output compare match A output OC2A (must be configured as output), or PCINT3 source. |
| 16 | PB4 (MISO/PCINT4) | bidirectional | Port B bit 4 is a bi-directional I/O pin that serves as SPI MISO data pin or PCINT4 source. |
| 17 | PB5 (SCK/PCINT5) | bidirectional | Port B bit 5 is a bi-directional I/O pin that serves as SPI clock SCK (input when SPI is slave) or PCINT5 source. |
| 18 | AVCC | power_in | Supply voltage pin for the A/D converter, PC3:0 and ADC7:6; it should be externally connected to VCC even if the ADC is not used, and through a low-pass filter if the ADC is used. |
| 19 | ADC6 | input | ADC input channel 6 (TQFP and QFN/MLF package only), powered from the analog supply, serving as a 10-bit ADC channel. |
| 20 | AREF | input | Analog reference pin for the A/D converter. |
| 21 | GND | power_in | Ground. |
| 22 | ADC7 | input | ADC input channel 7 (TQFP and QFN/MLF package only), powered from the analog supply, serving as a 10-bit ADC channel. |
| 23 | PC0 (ADC0/PCINT8) | bidirectional | Port C bit 0 is a bi-directional I/O pin with internal pull-up that can serve as ADC input channel 0 (analog power) or PCINT8 source. |
| 24 | PC1 (ADC1/PCINT9) | bidirectional | Port C bit 1 is a bi-directional I/O pin with internal pull-up that can serve as ADC input channel 1 (analog power) or PCINT9 source. |
| 25 | PC2 (ADC2/PCINT10) | bidirectional | Port C bit 2 is a bi-directional I/O pin with internal pull-up that can serve as ADC input channel 2 (analog power) or PCINT10 source. |
| 26 | PC3 (ADC3/PCINT11) | bidirectional | Port C bit 3 is a bi-directional I/O pin with internal pull-up that can serve as ADC input channel 3 (analog power) or PCINT11 source. |
| 27 | PC4 (ADC4/SDA/PCINT12) | bidirectional | Port C bit 4 is a bi-directional I/O pin with internal pull-up that serves as 2-wire serial data SDA when TWEN is set, ADC input channel 4 (digital power), or PCINT12 source. |
| 28 | PC5 (ADC5/SCL/PCINT13) | bidirectional | Port C bit 5 is a bi-directional I/O pin with internal pull-up that serves as 2-wire serial clock SCL when TWEN is set, ADC input channel 5 (digital power), or PCINT13 source. |
| 29 | PC6 (RESET/PCINT14) | input | If RSTDISBL fuse is unprogrammed this pin is the Reset input and a low level longer than the minimum pulse length (Table 29-3) generates a reset; shorter pulses are not ensured to reset; if programmed it is I/O with electrical characteristics differing from other Port C pins. |
| 30 | PD0 (RXD/PCINT16) | bidirectional | Port D bit 0 is a bi-directional I/O pin with internal pull-up that serves as USART receive data input RXD (input when USART receiver enabled) or PCINT16 source. |
| 31 | PD1 (TXD/PCINT17) | bidirectional | Port D bit 1 is a bi-directional I/O pin that serves as USART transmit data output TXD (output when USART transmitter enabled) or PCINT17 source. |
| 32 | PD2 (INT0/PCINT18) | bidirectional | Port D bit 2 is a bi-directional I/O pin with internal pull-up that serves as external interrupt source INT0 or PCINT18 source. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage temperature | | -65 | | 150 | °C | | 324 |
| Operating temperature | | -55 | | 125 | °C | | 324 |
| Voltage on any pin except RESET with respect to Ground | | -0.5 | | | V | | 324 |
| Voltage on RESET with respect to Ground | | -0.5 | | 13 | V | | 324 |
| Maximum Operating Voltage | | | | 6 | V | | 324 |
| DC Current per I/O Pin | | | | 40 | mA | | 324 |
| DC Current VCC and GND Pins | | | | 200 | mA | | 324 |
| Supply voltage (speed grade of ATmega48P-20AU) | VCC | 2.7 | | 5.5 | V | Ordering code ATmega48P-20AU, 20 MHz grade | 418 |
| Speed (maximum frequency) | | | | 20 | MHz | Speed grade 20 for ATmega48P-20AU; see Figure 29-1 | 418 |
| Operating temperature range (Industrial) | TA | -40 | | 85 | °C | Industrial operational range | 418 |
| Input Low Voltage, except XTAL1 and RESET pin | VIL | -0.5 | | | V | VCC = 2.4V - 5.5V | 324 |
| Input Low Voltage, XTAL1 pin | VIL1 | -0.5 | | | V | VCC = 1.8V - 5.5V | 324 |
| Input Low Voltage, RESET pin | VIL2 | -0.5 | | | V | VCC = 1.8V - 5.5V | 324 |
| Input Low Voltage, RESET pin as I/O | VIL3 | -0.5 | | | V | VCC = 2.4V - 5.5V | 324 |
| Output Low Voltage (except RESET pin) | VOL | | | 0.9 | V | IOL = 20 mA, VCC = 5V | 324 |
| Output Low Voltage (except RESET pin) | VOL | | | 0.6 | V | IOL = 10 mA, VCC = 3V | 324 |
| Output High Voltage (except Reset pin) | VOH | 4.2 | | | V | IOH = -20 mA, VCC = 5V | 324 |
| Output High Voltage (except Reset pin) | VOH | 2.3 | | | V | IOH = -10 mA, VCC = 3V | 324 |
| Input Leakage Current I/O Pin (low) | IIL | | | 1 | µA | VCC = 5.5V, pin low (absolute value) | 324 |
| Input Leakage Current I/O Pin (high) | IIH | | | 1 | µA | VCC = 5.5V, pin high (absolute value) | 324 |
| Power Supply Current, Active | ICC | | 1.9 | 2.5 | mA | Active 4 MHz, VCC = 3V | 325 |
| Power Supply Current, Active | ICC | | 6.8 | 9 | mA | Active 8 MHz, VCC = 5V | 325 |
| Power Supply Current, Idle | ICC | | 0.4 | 0.7 | mA | Idle 4 MHz, VCC = 3V | 325 |
| Power Supply Current, Idle | ICC | | 1.6 | 2.7 | mA | Idle 8 MHz, VCC = 5V | 325 |
| Power Supply Current, Power-save mode | ICC | | 0.85 | 2.6 | µA | 32 kHz TOSC enabled, VCC = 3V | 325 |
| Power Supply Current, Power-down mode | ICC | | 4.2 | 8 | µA | WDT enabled, VCC = 3V | 325 |
| Power Supply Current, Power-down mode | ICC | | 0.18 | 2 | µA | WDT disabled, VCC = 3V | 325 |
| Reset Pull-up Resistor | RRST | 30 | | 60 | kΩ | | 325 |
| I/O Pin Pull-up Resistor | RPU | 20 | | 50 | kΩ | | 325 |
| Analog Comparator Input Offset Voltage | VACIO | | | 40 | mV | VCC = 5V, Vin = VCC/2 | 325 |
| Analog Comparator Input Leakage Current | IACLK | -50 | | 50 | nA | VCC = 5V, Vin = VCC/2 | 325 |
| Analog Comparator Propagation Delay | tACID | | | 750 | ns | VCC = 2.7V | 325 |
| Analog Comparator Propagation Delay | tACID | | | 500 | ns | VCC = 4.0V | 325 |
| Calibrated Internal RC Oscillator accuracy (factory calibration) | | -10 | | 10 | % | 8.0 MHz, VCC = 3V, 25C | 329 |
| Calibrated Internal RC Oscillator accuracy (user calibration) | | -1 | | 1 | % | User calibration, VCC = 2.7V - 5.5V, -40C - 85C | 329 |
| Calibrated Internal RC Oscillator frequency (user calibration) | | 7.3 | | 8.1 | MHz | User calibration, VCC = 2.7V - 5.5V, -40C - 85C | 329 |
| Oscillator Frequency (external clock) | 1/tCLCL | 0 | | 10 | MHz | VCC = 2.7-5.5V | 329 |
| Clock Period (external clock) | tCLCL | 100 | | | ns | VCC = 2.7-5.5V | 329 |
| High Time (external clock) | tCHCX | 40 | | | ns | VCC = 2.7-5.5V | 329 |
| Low Time (external clock) | tCLCX | 40 | | | ns | VCC = 2.7-5.5V | 329 |
| Oscillator Frequency (external clock) | 1/tCLCL | 0 | | 20 | MHz | VCC = 4.5-5.5V | 329 |
| Clock Period (external clock) | tCLCL | 50 | | | ns | VCC = 4.5-5.5V | 329 |
| High Time (external clock) | tCHCX | 20 | | | ns | VCC = 4.5-5.5V | 329 |
| Low Time (external clock) | tCLCX | 20 | | | ns | VCC = 4.5-5.5V | 329 |
| Power-on Reset Threshold Voltage (rising) | VPOT | 1.1 | 1.4 | 1.6 | V | | 330 |
| Power-on Reset Threshold Voltage (falling) | VPOT | 0.6 | 1.3 | 1.6 | V | | 330 |
| Power-on Slope Rate | SRON | 0.01 | | 10 | V/ms | | 330 |
| Minimum pulse width on RESET Pin | tRST | 2.5 | | | µs | | 330 |
| Min Pulse Width on Brown-out Reset | tBOD | 2 | | | µs | | 330 |
| Bandgap reference voltage | VBG | 1 | 1.1 | 1.2 | V | VCC = 2.7, TA = 25°C | 330 |
| Brown-out Detector trigger level (BODLEVEL 110) | VBOT | 1.7 | 1.8 | 2 | V | BODLEVEL 2:0 = 110 | 330 |
| Brown-out Detector trigger level (BODLEVEL 101) | VBOT | 2.5 | 2.7 | 2.9 | V | BODLEVEL 2:0 = 101 | 330 |
| Brown-out Detector trigger level (BODLEVEL 100) | VBOT | 4.1 | 4.3 | 4.5 | V | BODLEVEL 2:0 = 100 | 330 |
| Setup time (master) | | 10 | | | ns | Master | 331 |
| Hold time (master) | | 10 | | | ns | Master | 331 |
| SCK to out (master) | | | | 10 | ns | Master | 331 |
| Setup time (slave) | | 10 | | | ns | Slave | 331 |
| SCK to out (slave) | | | | 15 | ns | Slave | 331 |
| SCL Clock Frequency | fSCL | 0 | | 400 | kHz | fCK > max(16fSCL, 250kHz) | 333 |
| Output Low-voltage (2-wire) | VOL | | | 0.4 | V | 3 mA sink current | 333 |
## CAD (KiCad official)
- Symbol: `ATMEGA48P-20AU`
- Footprint: `Package_QFP:TQFP-32_7x7mm_P0.8mm`
- 3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files: `atmega48p-20au-etched.step` / `atmega48p-20au-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `atmega48p-20au.step` / `atmega48p-20au.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://ww1.microchip.com/downloads/en/DeviceDoc/ATmega48P_88P_168P-DS40002065A.pdf) (436 pp, sha256 `aab081a362918ab9`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/atmega48p-20au-datasheet.pdf)