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Contents

README

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ATMEGA48A-MU

Microchip Tech · Pre-ordered MCUs · VQFN-32(5x5)

ATMEGA48A-MU from Microchip Tech, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PD3 bidirectional Port D bit 3 is a bi-directional I/O pin with internal pull-up, with alternate functions INT1, OC2B and PCINT19.
2 PD4 bidirectional Port D bit 4 is a bi-directional I/O pin with internal pull-up, with alternate functions XCK, T0 and PCINT20.
3 GND power_in Ground.
4 VCC power_in Digital supply voltage.
5 GND power_in Ground.
6 VCC power_in Digital supply voltage.
7 PB6 bidirectional Port B bit 6 is used as XTAL1/TOSC1 input to the inverting oscillator amplifier depending on clock fuse settings, otherwise it is a bi-directional I/O pin with internal pull-up.
8 PB7 bidirectional Port B bit 7 is used as XTAL2/TOSC2 output of the inverting oscillator amplifier depending on clock fuse settings, otherwise it is a bi-directional I/O pin with internal pull-up.
9 PD5 bidirectional Port D bit 5 is a bi-directional I/O pin with internal pull-up, with alternate functions T1, OC0B and PCINT21.
10 PD6 bidirectional Port D bit 6 is a bi-directional I/O pin with internal pull-up, with alternate functions AIN0 (analog comparator positive input), OC0A and PCINT22.
11 PD7 bidirectional Port D bit 7 is a bi-directional I/O pin with internal pull-up, with alternate functions AIN1 (analog comparator negative input) and PCINT23.
12 PB0 bidirectional Port B bit 0 is a bi-directional I/O pin with internal pull-up, with alternate functions ICP1, CLKO (divided system clock output) and PCINT0.
13 PB1 bidirectional Port B bit 1 is a bi-directional I/O pin with internal pull-up, with alternate functions OC1A and PCINT1.
14 PB2 bidirectional Port B bit 2 is a bi-directional I/O pin with internal pull-up, with alternate functions SS, OC1B and PCINT2.
15 PB3 bidirectional Port B bit 3 is a bi-directional I/O pin with internal pull-up, with alternate functions MOSI, OC2A and PCINT3.
16 PB4 bidirectional Port B bit 4 is a bi-directional I/O pin with internal pull-up, with alternate functions MISO and PCINT4.
17 PB5 bidirectional Port B bit 5 is a bi-directional I/O pin with internal pull-up, with alternate functions SCK (SPI clock) and PCINT5.
18 AVCC power_in Supply voltage pin for the A/D converter, PC3:0 and ADC7:6, which should be connected to VCC even if the ADC is not used.
19 ADC6 input Analog input channel 6 of the 10-bit ADC, available only in the TQFP and VQFN packages and powered from the analog supply.
20 AREF input Analog reference pin for the A/D converter.
21 GND power_in Ground.
22 ADC7 input Analog input channel 7 of the 10-bit ADC, available only in the TQFP and VQFN packages and powered from the analog supply.
23 PC0 bidirectional Port C bit 0 is a bi-directional I/O pin with internal pull-up, also used as ADC0 analog input using analog power and as PCINT8.
24 PC1 bidirectional Port C bit 1 is a bi-directional I/O pin with internal pull-up, also used as ADC1 analog input using analog power and as PCINT9.
25 PC2 bidirectional Port C bit 2 is a bi-directional I/O pin with internal pull-up, also used as ADC2 analog input using analog power and as PCINT10.
26 PC3 bidirectional Port C bit 3 is a bi-directional I/O pin with internal pull-up, also used as ADC3 analog input using analog power and as PCINT11.
27 PC4 bidirectional Port C bit 4 is a bi-directional I/O pin with internal pull-up, also used as SDA (2-wire serial data) and ADC4 analog input using digital power, and as PCINT12.
28 PC5 bidirectional Port C bit 5 is a bi-directional I/O pin with internal pull-up, also used as SCL (2-wire serial clock) and ADC5 analog input using digital power, and as PCINT13.
29 PC6 input PC6 is the active-low RESET input when the RSTDISBL fuse is unprogrammed, where a low level longer than the minimum pulse length generates a reset, and is otherwise an I/O pin also usable as PCINT14.
30 PD0 bidirectional Port D bit 0 is a bi-directional I/O pin with internal pull-up, used as the USART receive data input RXD when the USART receiver is enabled, and as PCINT16.
31 PD1 bidirectional Port D bit 1 is a bi-directional I/O pin with internal pull-up, used as the USART transmit data output TXD when the USART transmitter is enabled, and as PCINT17.
32 PD2 bidirectional Port D bit 2 is a bi-directional I/O pin with internal pull-up, with alternate functions INT0 (external interrupt 0 input) and PCINT18.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package VQFN-32(5x5)
Category Embedded Processors & Controllers
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power Supply Current ICC 0.2 0.55 mA Active 1MHz, VCC = 2V 308
Power Supply Current ICC 1.2 3.5 mA Active 4MHz, VCC = 3V 308
Power Supply Current ICC 4 12 mA Active 8MHz, VCC = 5V 308
Power Supply Current ICC 0.03 0.5 mA Idle 1MHz, VCC = 2V 308
Power Supply Current ICC 0.21 1.5 mA Idle 4MHz, VCC = 3V 308
Power Supply Current ICC 0.9 5.5 mA Idle 8MHz, VCC = 5V 308
Power-down Supply Current ICC 3.9 15 µA Power-down mode, WDT enabled, VCC = 3V 308
Power-down Supply Current ICC 0.1 2 µA Power-down mode, WDT disabled, VCC = 3V 308
Operating Temperature -55 125 °C 308
Storage Temperature -65 150 °C 308
Voltage on RESET with respect to Ground -0.5 13 V 308
DC Current per I/O Pin 40 mA 308
DC Current VCC and GND Pins 200 mA 308
Voltage on any pin except RESET with respect to Ground -0.5 V Upper limit printed as VCC+0.5V 308
Power-save Supply Current ICC 0.75 µA Power-save mode, 32kHz TOSC enabled, VCC = 1.8V 308
Power-save Supply Current ICC 0.9 µA Power-save mode, 32kHz TOSC enabled, VCC = 3V 308

CAD (KiCad official)

  • Symbol: ATMEGA48A-MU
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: atmega48a-mu-etched.step / atmega48a-mu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega48a-mu.step / atmega48a-mu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (653 pp, sha256 b9b9d83cda56a95d, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF