component
ATMEGA4809-AU
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
ATMEGA4809-AU
Microchip Tech · Pre-ordered MCUs · TQFP-48(7x7)
ATMEGA4809-AU from Microchip Tech, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA5 | bidirectional | General purpose I/O pin PA5 with USART0 RxD (alternate position), SPI0 MISO and TCA0 WO5 alternate functions. |
| 2 | PA6 | bidirectional | General purpose I/O pin PA6 with USART0 XCK (alternate position), SPI0 SCK and TCA0 OUT alternate functions. |
| 3 | PA7 | bidirectional | General purpose I/O pin PA7 with CLKOUT, AC0 OUT, USART0 XDIR (alternate position), SPI0 SS and EVOUTA alternate functions. |
| 4 | PB0 | bidirectional | General purpose I/O pin PB0 with USART3 TxD and TCA0 WO0 (alternate position) functions. |
| 5 | PB1 | bidirectional | General purpose I/O pin PB1 with USART3 RxD and TCA0 WO1 (alternate position) functions. |
| 6 | PB2 | bidirectional | General purpose I/O pin PB2 with USART3 XCK, TCA0 WO2 (alternate position) and EVOUTB functions. |
| 7 | PB3 | bidirectional | General purpose I/O pin PB3 with USART3 XDIR and TCA0 WO3 (alternate position) functions. |
| 8 | PB4 | bidirectional | General purpose I/O pin PB4 with USART3 TxD (alternate position), TCA0 WO4 (alternate position) and TCB2 WO (alternate position) functions. |
| 9 | PB5 | bidirectional | General purpose I/O pin PB5 with USART3 RxD (alternate position), TCA0 WO5 (alternate position) and TCB3 WO functions; PB[5:0] must be disabled or have pull-ups enabled when the 40-pin version is used. |
| 10 | PC0 | bidirectional | General purpose I/O pin PC0 with USART1 TxD, SPI0 MOSI (alternate position), TCA0 WO0 (alternate position), TCB2 WO and CCL LUT1 IN0 functions. |
| 11 | PC1 | bidirectional | General purpose I/O pin PC1 with USART1 RxD, SPI0 MISO (alternate position), TCA0 WO1 (alternate position), TCB3 WO (alternate position) and CCL LUT1 IN1 functions. |
| 12 | PC2 | bidirectional | General purpose I/O pin PC2 with TWI0 SDA (host, alternate position), USART1 XCK, SPI0 SCK (alternate position), TCA0 WO2 (alternate position), EVOUTC and CCL LUT1 IN2 functions. |
| 13 | PC3 | bidirectional | General purpose I/O pin PC3 with TWI0 SCL (host, alternate position), USART1 XDIR, SPI0 SS (alternate position), TCA0 WO3 (alternate position) and CCL LUT1 OUT functions. |
| 14 | VDD | power_in | Input supply for the GPIO on the VDD power domain. |
| 15 | GND | power_in | Ground reference pin. |
| 16 | PC4 | bidirectional | General purpose I/O pin PC4 with USART1 TxD (alternate position) and TCA0 WO4 (alternate position) functions. |
| 17 | PC5 | bidirectional | General purpose I/O pin PC5 with USART1 RxD (alternate position) and TCA0 WO5 (alternate position) functions. |
| 18 | PC6 | bidirectional | General purpose I/O pin PC6 with USART1 XCK (alternate position) and CCL LUT1 OUT (alternate position) functions. |
| 19 | PC7 | bidirectional | General purpose I/O pin PC7 with USART1 XDIR (alternate position) and EVOUTC (alternate position) functions. |
| 20 | PD0 | bidirectional | General purpose I/O pin PD0 with analog input AIN0, TCA0 WO0 (alternate position) and CCL LUT2 IN0 functions. |
| 21 | PD1 | bidirectional | General purpose I/O pin PD1 with analog input AIN1, analog comparator input P3, TCA0 WO1 (alternate position) and CCL LUT2 IN1 functions. |
| 22 | PD2 | bidirectional | General purpose I/O pin PD2 with analog input AIN2, analog comparator input P0, TCA0 WO2 (alternate position), EVOUTD and CCL LUT2 IN2 functions. |
| 23 | PD3 | bidirectional | General purpose I/O pin PD3 with analog input AIN3, analog comparator input N0, TCA0 WO3 (alternate position) and CCL LUT2 OUT functions. |
| 24 | PD4 | bidirectional | General purpose I/O pin PD4 with analog input AIN4, analog comparator input P1 and TCA0 WO4 (alternate position) functions. |
| 25 | PD5 | bidirectional | General purpose I/O pin PD5 with analog input AIN5, analog comparator input N1 and TCA0 WO5 (alternate position) functions. |
| 26 | PD6 | bidirectional | General purpose I/O pin PD6 with analog input AIN6, analog comparator input P2 and CCL LUT2 OUT (alternate position) functions. |
| 27 | PD7 | bidirectional | General purpose I/O pin PD7 with VREFA, analog input AIN7, analog comparator input N2 and EVOUTD (alternate position) functions. |
| 28 | AVDD | power_in | Input supply for the GPIO on the AVDD power domain, used by the analog functions. |
| 29 | GND | power_in | Ground reference pin. |
| 30 | PE0 | bidirectional | General purpose I/O pin PE0 with analog input AIN8, SPI0 MOSI (alternate position) and TCA0 WO0 (alternate position) functions. |
| 31 | PE1 | bidirectional | General purpose I/O pin PE1 with analog input AIN9, SPI0 MISO (alternate position) and TCA0 WO1 (alternate position) functions. |
| 32 | PE2 | bidirectional | General purpose I/O pin PE2 with analog input AIN10, SPI0 SCK (alternate position), TCA0 WO2 (alternate position) and EVOUTE functions. |
| 33 | PE3 | bidirectional | General purpose I/O pin PE3 with analog input AIN11, SPI0 SS (alternate position) and TCA0 WO3 (alternate position) functions. |
| 34 | PF0 | bidirectional | General purpose I/O pin PF0 with the TOSC1 crystal oscillator connection, USART2 TxD, TCA0 WO0 (alternate position) and CCL LUT3 IN0 functions. |
| 35 | PF1 | bidirectional | General purpose I/O pin PF1 with the TOSC2 crystal oscillator connection, USART2 RxD, TCA0 WO1 (alternate position) and CCL LUT3 IN1 functions. |
| 36 | PF2 | bidirectional | General purpose I/O pin PF2 with TWI0 SDA (client), analog input AIN12, USART2 XCK, TCA0 WO2 (alternate position), EVOUTF and CCL LUT3 IN2 functions. |
| 37 | PF3 | bidirectional | General purpose I/O pin PF3 with TWI0 SCL (client), analog input AIN13, USART2 XDIR, TCA0 WO3 (alternate position) and CCL LUT3 OUT functions. |
| 38 | PF4 | bidirectional | General purpose I/O pin PF4 with analog input AIN14, USART2 TxD (alternate position), TCA0 WO4 (alternate position) and TCB0 WO (alternate position) functions. |
| 39 | PF5 | bidirectional | General purpose I/O pin PF5 with analog input AIN15, USART2 RxD (alternate position), TCA0 WO5 (alternate position) and TCB1 WO (alternate position) functions. |
| 40 | PF6 | bidirectional | General purpose I/O pin PF6 that can be configured as the RESET pin (RSTPINCFG), with USART2 XCK (alternate position) and CCL LUT3 OUT (alternate position) functions. |
| 41 | UPDI | bidirectional | Unified Program and Debug Interface pin used for programming and debugging. |
| 42 | VDD | power_in | Input supply for the GPIO on the VDD power domain. |
| 43 | GND | power_in | Ground reference pin. |
| 44 | PA0 | bidirectional | General purpose I/O pin PA0 with EXTCLK external clock input, USART0 TxD, TCA0 WO0 and CCL LUT0 IN0 functions. |
| 45 | PA1 | bidirectional | General purpose I/O pin PA1 with USART0 RxD, TCA0 WO1 and CCL LUT0 IN1 functions. |
| 46 | PA2 | bidirectional | General purpose I/O pin PA2 with TWI0 SDA (host), USART0 XCK, TCA0 WO2, EVOUTA and CCL LUT0 IN2 functions. |
| 47 | PA3 | bidirectional | General purpose I/O pin PA3 with TWI0 SCL (host), USART0 XDIR, TCA0 WO3, TCB1 WO and CCL LUT0 OUT functions. |
| 48 | PA4 | bidirectional | General purpose I/O pin PA4 with USART0 TxD (alternate position), SPI0 MOSI and TCA0 WO4 functions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
ATMEGA4809-AU - Footprint:
Package_QFP:TQFP-48_7x7mm_P0.5mm - 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
atmega4809-au-etched.step/atmega4809-au-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atmega4809-au.step/atmega4809-au.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (560 pp, sha256
a1755e46625fa50b, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ATMEGA4809-AU
**Microchip Tech** · Pre-ordered MCUs · TQFP-48(7x7)
ATMEGA4809-AU from Microchip Tech, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA5 | bidirectional | General purpose I/O pin PA5 with USART0 RxD (alternate position), SPI0 MISO and TCA0 WO5 alternate functions. |
| 2 | PA6 | bidirectional | General purpose I/O pin PA6 with USART0 XCK (alternate position), SPI0 SCK and TCA0 OUT alternate functions. |
| 3 | PA7 | bidirectional | General purpose I/O pin PA7 with CLKOUT, AC0 OUT, USART0 XDIR (alternate position), SPI0 SS and EVOUTA alternate functions. |
| 4 | PB0 | bidirectional | General purpose I/O pin PB0 with USART3 TxD and TCA0 WO0 (alternate position) functions. |
| 5 | PB1 | bidirectional | General purpose I/O pin PB1 with USART3 RxD and TCA0 WO1 (alternate position) functions. |
| 6 | PB2 | bidirectional | General purpose I/O pin PB2 with USART3 XCK, TCA0 WO2 (alternate position) and EVOUTB functions. |
| 7 | PB3 | bidirectional | General purpose I/O pin PB3 with USART3 XDIR and TCA0 WO3 (alternate position) functions. |
| 8 | PB4 | bidirectional | General purpose I/O pin PB4 with USART3 TxD (alternate position), TCA0 WO4 (alternate position) and TCB2 WO (alternate position) functions. |
| 9 | PB5 | bidirectional | General purpose I/O pin PB5 with USART3 RxD (alternate position), TCA0 WO5 (alternate position) and TCB3 WO functions; PB[5:0] must be disabled or have pull-ups enabled when the 40-pin version is used. |
| 10 | PC0 | bidirectional | General purpose I/O pin PC0 with USART1 TxD, SPI0 MOSI (alternate position), TCA0 WO0 (alternate position), TCB2 WO and CCL LUT1 IN0 functions. |
| 11 | PC1 | bidirectional | General purpose I/O pin PC1 with USART1 RxD, SPI0 MISO (alternate position), TCA0 WO1 (alternate position), TCB3 WO (alternate position) and CCL LUT1 IN1 functions. |
| 12 | PC2 | bidirectional | General purpose I/O pin PC2 with TWI0 SDA (host, alternate position), USART1 XCK, SPI0 SCK (alternate position), TCA0 WO2 (alternate position), EVOUTC and CCL LUT1 IN2 functions. |
| 13 | PC3 | bidirectional | General purpose I/O pin PC3 with TWI0 SCL (host, alternate position), USART1 XDIR, SPI0 SS (alternate position), TCA0 WO3 (alternate position) and CCL LUT1 OUT functions. |
| 14 | VDD | power_in | Input supply for the GPIO on the VDD power domain. |
| 15 | GND | power_in | Ground reference pin. |
| 16 | PC4 | bidirectional | General purpose I/O pin PC4 with USART1 TxD (alternate position) and TCA0 WO4 (alternate position) functions. |
| 17 | PC5 | bidirectional | General purpose I/O pin PC5 with USART1 RxD (alternate position) and TCA0 WO5 (alternate position) functions. |
| 18 | PC6 | bidirectional | General purpose I/O pin PC6 with USART1 XCK (alternate position) and CCL LUT1 OUT (alternate position) functions. |
| 19 | PC7 | bidirectional | General purpose I/O pin PC7 with USART1 XDIR (alternate position) and EVOUTC (alternate position) functions. |
| 20 | PD0 | bidirectional | General purpose I/O pin PD0 with analog input AIN0, TCA0 WO0 (alternate position) and CCL LUT2 IN0 functions. |
| 21 | PD1 | bidirectional | General purpose I/O pin PD1 with analog input AIN1, analog comparator input P3, TCA0 WO1 (alternate position) and CCL LUT2 IN1 functions. |
| 22 | PD2 | bidirectional | General purpose I/O pin PD2 with analog input AIN2, analog comparator input P0, TCA0 WO2 (alternate position), EVOUTD and CCL LUT2 IN2 functions. |
| 23 | PD3 | bidirectional | General purpose I/O pin PD3 with analog input AIN3, analog comparator input N0, TCA0 WO3 (alternate position) and CCL LUT2 OUT functions. |
| 24 | PD4 | bidirectional | General purpose I/O pin PD4 with analog input AIN4, analog comparator input P1 and TCA0 WO4 (alternate position) functions. |
| 25 | PD5 | bidirectional | General purpose I/O pin PD5 with analog input AIN5, analog comparator input N1 and TCA0 WO5 (alternate position) functions. |
| 26 | PD6 | bidirectional | General purpose I/O pin PD6 with analog input AIN6, analog comparator input P2 and CCL LUT2 OUT (alternate position) functions. |
| 27 | PD7 | bidirectional | General purpose I/O pin PD7 with VREFA, analog input AIN7, analog comparator input N2 and EVOUTD (alternate position) functions. |
| 28 | AVDD | power_in | Input supply for the GPIO on the AVDD power domain, used by the analog functions. |
| 29 | GND | power_in | Ground reference pin. |
| 30 | PE0 | bidirectional | General purpose I/O pin PE0 with analog input AIN8, SPI0 MOSI (alternate position) and TCA0 WO0 (alternate position) functions. |
| 31 | PE1 | bidirectional | General purpose I/O pin PE1 with analog input AIN9, SPI0 MISO (alternate position) and TCA0 WO1 (alternate position) functions. |
| 32 | PE2 | bidirectional | General purpose I/O pin PE2 with analog input AIN10, SPI0 SCK (alternate position), TCA0 WO2 (alternate position) and EVOUTE functions. |
| 33 | PE3 | bidirectional | General purpose I/O pin PE3 with analog input AIN11, SPI0 SS (alternate position) and TCA0 WO3 (alternate position) functions. |
| 34 | PF0 | bidirectional | General purpose I/O pin PF0 with the TOSC1 crystal oscillator connection, USART2 TxD, TCA0 WO0 (alternate position) and CCL LUT3 IN0 functions. |
| 35 | PF1 | bidirectional | General purpose I/O pin PF1 with the TOSC2 crystal oscillator connection, USART2 RxD, TCA0 WO1 (alternate position) and CCL LUT3 IN1 functions. |
| 36 | PF2 | bidirectional | General purpose I/O pin PF2 with TWI0 SDA (client), analog input AIN12, USART2 XCK, TCA0 WO2 (alternate position), EVOUTF and CCL LUT3 IN2 functions. |
| 37 | PF3 | bidirectional | General purpose I/O pin PF3 with TWI0 SCL (client), analog input AIN13, USART2 XDIR, TCA0 WO3 (alternate position) and CCL LUT3 OUT functions. |
| 38 | PF4 | bidirectional | General purpose I/O pin PF4 with analog input AIN14, USART2 TxD (alternate position), TCA0 WO4 (alternate position) and TCB0 WO (alternate position) functions. |
| 39 | PF5 | bidirectional | General purpose I/O pin PF5 with analog input AIN15, USART2 RxD (alternate position), TCA0 WO5 (alternate position) and TCB1 WO (alternate position) functions. |
| 40 | PF6 | bidirectional | General purpose I/O pin PF6 that can be configured as the RESET pin (RSTPINCFG), with USART2 XCK (alternate position) and CCL LUT3 OUT (alternate position) functions. |
| 41 | UPDI | bidirectional | Unified Program and Debug Interface pin used for programming and debugging. |
| 42 | VDD | power_in | Input supply for the GPIO on the VDD power domain. |
| 43 | GND | power_in | Ground reference pin. |
| 44 | PA0 | bidirectional | General purpose I/O pin PA0 with EXTCLK external clock input, USART0 TxD, TCA0 WO0 and CCL LUT0 IN0 functions. |
| 45 | PA1 | bidirectional | General purpose I/O pin PA1 with USART0 RxD, TCA0 WO1 and CCL LUT0 IN1 functions. |
| 46 | PA2 | bidirectional | General purpose I/O pin PA2 with TWI0 SDA (host), USART0 XCK, TCA0 WO2, EVOUTA and CCL LUT0 IN2 functions. |
| 47 | PA3 | bidirectional | General purpose I/O pin PA3 with TWI0 SCL (host), USART0 XDIR, TCA0 WO3, TCB1 WO and CCL LUT0 OUT functions. |
| 48 | PA4 | bidirectional | General purpose I/O pin PA4 with USART0 TxD (alternate position), SPI0 MOSI and TCA0 WO4 functions. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
## CAD (KiCad official)
- Symbol: `ATMEGA4809-AU`
- Footprint: `Package_QFP:TQFP-48_7x7mm_P0.5mm`
- 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `atmega4809-au-etched.step` / `atmega4809-au-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `atmega4809-au.step` / `atmega4809-au.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://ww1.microchip.com/downloads/en/DeviceDoc/ATmega4808-09-DataSheet-DS40002173C.pdf) (560 pp, sha256 `a1755e46625fa50b`, retrieved 2026-10-27, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/atmega4809-au-datasheet.pdf)