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ATMEGA4808-AUR

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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersatmega4808-aurfactory-2.0.0extractor-text

Verified ATMEGA4808-AUR

by Ray · last 13 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

13 Nov 2026RayPublished by the parts factory: tier mfr, 32 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • •array (skip): not an array of element pairs
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATMEGA4808-AUR · TQFP-32(7x7) · 32 pins
  • ✓copper: 32 copper pads, none touching another net
  • ✓datasheet: all 32 pin names found in the 560-page datasheet
  • ✓distributor: lcsc C2055333, digikey 150-ATMEGA4808-AURTR-ND, mouser 556-ATMEGA4808-AUR
  • ✓family: TQFP-32_7x7mm_P0.8mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-ej56dckm/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.530)
  • ✓pads: 32 pins = 32 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 32 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 45 kB, viewers/symbol.html 23 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ atmega4808-aur.kicad_sym✓ atmega4808-aur.kicad_mod✓ atmega4808-aur.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers atmega4808-aur: viewers · Ray
atmega4808-aur-etched.glb atmega4808-aur: factory component page (tier=mfr) · Ray
atmega4808-aur-etched.step atmega4808-aur: factory component page (tier=mfr) · Ray
atmega4808-aur-hero.glb atmega4808-aur: hero GLB from the etched model (keeps the MPN mark) · Ray
atmega4808-aur-hero.overlay.json atmega4808-aur: hero GLB from the etched model (keeps the MPN mark) · Ray
atmega4808-aur.glb Publish 0.1.0 · Ray
atmega4808-aur.kicad_mod Publish 0.1.0 · Ray
atmega4808-aur.kicad_sym Publish 0.1.0 · Ray
atmega4808-aur.lbr Publish 0.1.0 · Ray
atmega4808-aur.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 32 pins · Ray

ATMEGA4808-AUR

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-32(7x7)

ATMEGA4808-AUR from Microchip Tech, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA3 bidirectional PORTA I/O pin 3 with alternate functions USART0 XDIR, TWI0 SCL (host mode), TCA0 WO3, TCB1 WO and CCL LUT0 OUT.
2 PA4 bidirectional PORTA I/O pin 4 with alternate functions USART0 TxD (alternate position), SPI0 MOSI and TCA0 WO4.
3 PA5 bidirectional PORTA I/O pin 5 with alternate functions USART0 RxD (alternate position), SPI0 MISO and TCA0 WO5.
4 PA6 bidirectional PORTA I/O pin 6 with alternate functions USART0 XCK (alternate position), SPI0 SCK and CCL LUT0 OUT (alternate position).
5 PA7 bidirectional PORTA I/O pin 7 with alternate functions CLKOUT, AC0 OUT, USART0 XDIR (alternate position), SPI0 SS and EVSYS EVOUTA (alternate position).
6 PC0 bidirectional PORTC I/O pin 0 with alternate functions USART1 TxD, SPI0 MOSI (alternate position), TCA0 WO0 (alternate position), TCB2 WO and CCL LUT1 IN0.
7 PC1 bidirectional PORTC I/O pin 1 with alternate functions USART1 RxD, SPI0 MISO (alternate position), TCA0 WO1 (alternate position), TCB3 WO (alternate position) and CCL LUT1 IN1.
8 PC2 bidirectional PORTC I/O pin 2 with alternate functions TWI0 SDA (host mode, alternate position), USART1 XCK, SPI0 SCK (alternate position), TCA0 WO2 (alternate position), EVSYS EVOUTC and CCL LUT1 IN2.
9 PC3 bidirectional PORTC I/O pin 3 with alternate functions TWI0 SCL (host mode, alternate position), USART1 XDIR, SPI0 SS (alternate position), TCA0 WO3 (alternate position) and CCL LUT1 OUT.
10 PD0 bidirectional PORTD I/O pin 0 with analog input AIN0, TCA0 WO0 (alternate position) and CCL LUT2 IN0.
11 PD1 bidirectional PORTD I/O pin 1 with analog input AIN1, analog comparator input P3, TCA0 WO1 (alternate position) and CCL LUT2 IN1.
12 PD2 bidirectional PORTD I/O pin 2 with analog input AIN2, analog comparator input P0, TCA0 WO2 (alternate position), EVSYS EVOUTD and CCL LUT2 IN2.
13 PD3 bidirectional PORTD I/O pin 3 with analog input AIN3, analog comparator input N0, TCA0 WO3 (alternate position) and CCL LUT2 OUT.
14 PD4 bidirectional PORTD I/O pin 4 with analog input AIN4, analog comparator input P1 and TCA0 WO4 (alternate position).
15 PD5 bidirectional PORTD I/O pin 5 with analog input AIN5, analog comparator input N1 and TCA0 WO5 (alternate position).
16 PD6 bidirectional PORTD I/O pin 6 with analog input AIN6, analog comparator input P2 and CCL LUT2 OUT (alternate position).
17 PD7 bidirectional PORTD I/O pin 7 with ADC voltage reference input VREFA, analog input AIN7, analog comparator input N2 and EVSYS EVOUTD (alternate position).
18 AVDD power_in Analog supply pin shown in the pinout as the AVDD power domain for analog functions.
19 GND power_in Ground reference pin.
20 PF0 (TOSC1) bidirectional PORTF I/O pin 0 that is also the TOSC1 crystal oscillator connection, with alternate functions USART2 TxD, TCA0 WO0 (alternate position) and CCL LUT3 IN0.
21 PF1 (TOSC2) bidirectional PORTF I/O pin 1 that is also the TOSC2 crystal oscillator connection, with alternate functions USART2 RxD, TCA0 WO1 (alternate position) and CCL LUT3 IN1.
22 PF2 bidirectional PORTF I/O pin 2 with analog input AIN12, TWI0 SDA (client mode, alternate position), USART2 XCK, TCA0 WO2 (alternate position), EVSYS EVOUTF and CCL LUT3 IN2.
23 PF3 bidirectional PORTF I/O pin 3 with analog input AIN13, TWI0 SCL (client mode, alternate position), USART2 XDIR, TCA0 WO3 (alternate position) and CCL LUT3 OUT.
24 PF4 bidirectional PORTF I/O pin 4 with analog input AIN14, USART2 TxD (alternate position), TCA0 WO4 (alternate position) and TCB0 WO (alternate position).
25 PF5 bidirectional PORTF I/O pin 5 with analog input AIN15, USART2 RxD (alternate position), TCA0 WO5 (alternate position) and TCB1 WO (alternate position).
26 PF6 bidirectional PORTF I/O pin 6 that serves as the RESET pin when the RSTPINCFG fuse selects RESET (otherwise GPIO), with alternate functions USART2 XCK (alternate position) and CCL LUT3 OUT (alternate position).
27 UPDI bidirectional Unified Program and Debug Interface pin used for programming and debugging the device.
28 VDD power_in Input supply pin; the device operates from 1.8-5.5 V for this ordering code per the ordering information.
29 GND power_in Ground reference pin.
30 PA0 (EXTCLK) bidirectional PORTA I/O pin 0 that can also serve as the external clock input EXTCLK, with alternate functions USART0 TxD (default), TCA0 WO0 and CCL LUT0 IN0.
31 PA1 bidirectional PORTA I/O pin 1 with alternate functions USART0 RxD, TCA0 WO1 and CCL LUT0 IN1.
32 PA2 bidirectional PORTA I/O pin 2 with alternate functions USART0 XCK, TWI0 SDA (host mode), TCA0 WO2, TCB0 WO, EVSYS EVOUTA and CCL LUT0 IN2.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-32(7x7)
Category Embedded Processors & Controllers
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (VDD) range VDD 1.8 5.5 V ATmega4808-AUR, 20 MHz max CPU speed, -40°C to +85°C 521
Operating temperature range -40 85 °C ATmega4808-AUR (Tape & Reel), 1.8-5.5V, 20 MHz 521
Max. CPU speed 20 MHz 1.8-5.5V, -40°C to +85°C 521

CAD (KiCad official)

  • Symbol: ATMEGA4808-AUR
  • Footprint: Package_QFP:TQFP-32_7x7mm_P0.8mm
  • 3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: atmega4808-aur-etched.step / atmega4808-aur-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega4808-aur.step / atmega4808-aur.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (560 pp, sha256 a1755e46625fa50b, retrieved 2026-11-13, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF