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ATMEGA4808-AFR

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-32(7x7)

ATMEGA4808-AFR from Microchip Tech, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA3 bidirectional General-purpose I/O on PORTA with pull-up and interrupt capability; alternate functions include TWI0 SCL (host), USART0 XDIR, TCA0 WO3, TCB1 WO and CCL LUT0 OUT.
2 PA4 bidirectional General-purpose I/O on PORTA; default functions include SPI0 MOSI and TCA0 WO4, with USART0 TxD available on the alternate pin position.
3 PA5 bidirectional General-purpose I/O on PORTA; default functions include SPI0 MISO and TCA0 WO5, with USART0 RxD available on the alternate pin position.
4 PA6 bidirectional General-purpose I/O on PORTA; default function is SPI0 SCK, with USART0 XCK and CCL LUT0 OUT on alternate pin positions and asynchronous interrupt sensing.
5 PA7 bidirectional General-purpose I/O on PORTA; default functions include CLKOUT, AC0 OUT and SPI0 SS, with USART0 XDIR and EVOUTA on alternate pin positions.
6 PC0 bidirectional General-purpose I/O on PORTC; default functions include USART1 TxD and TCB2 WO, with SPI0 MOSI, TCA0 WO0 and CCL LUT1 IN0 on alternate pin positions.
7 PC1 bidirectional General-purpose I/O on PORTC; default function is USART1 RxD, with SPI0 MISO, TCA0 WO1 and TCB3 WO on alternate pin positions.
8 PC2 bidirectional General-purpose I/O on PORTC; default functions include TWI0 and USART1 XCK, with SPI0 SCK, TWI0 SDA (host), TCA0 WO2, EVOUTC and CCL LUT1 IN2 on alternate pin positions.
9 PC3 bidirectional General-purpose I/O on PORTC; default functions include TWI0 and USART1 XDIR, with SPI0 SS, TWI0 SCL (host), TCA0 WO3 and CCL LUT1 OUT on alternate pin positions.
10 PD0 bidirectional General-purpose I/O on PORTD (analog input AIN0 of ADC0); TCA0 WO0 and CCL LUT2 IN0 are available on alternate pin positions.
11 PD1 bidirectional General-purpose I/O on PORTD (analog input AIN1 of ADC0 and AC0 positive input P3); TCA0 WO1 and CCL LUT2 IN1 are available on alternate pin positions.
12 PD2 bidirectional General-purpose I/O on PORTD (analog input AIN2 of ADC0 and AC0 positive input P0); EVOUTD, TCA0 WO2 and CCL LUT2 IN2 are available, and this pin supports full asynchronous interrupt detection.
13 PD3 bidirectional General-purpose I/O on PORTD (analog input AIN3 of ADC0 and AC0 negative input N0); TCA0 WO3 and CCL LUT2 OUT are available on alternate pin positions.
14 PD4 bidirectional General-purpose I/O on PORTD (analog input AIN4 of ADC0 and AC0 positive input P1); TCA0 WO4 is available on an alternate pin position.
15 PD5 bidirectional General-purpose I/O on PORTD (analog input AIN5 of ADC0 and AC0 negative input N1); TCA0 WO5 is available on an alternate pin position.
16 PD6 bidirectional General-purpose I/O on PORTD (analog input AIN6 of ADC0 and AC0 positive input P2); CCL LUT2 OUT is available on an alternate pin position and this pin supports full asynchronous interrupt detection.
17 PD7 bidirectional General-purpose I/O on PORTD (analog input AIN7 of ADC0, AC0 negative input N2 and VREFA external voltage reference); EVOUTD is available on an alternate pin position.
18 AVDD power_in Analog supply pin for the AVDD power domain, which feeds the analog functions such as ADC0 and AC0 on the PORTD pins.
19 GND power_in Ground reference pin for the device.
20 PF0 (TOSC1) bidirectional General-purpose I/O on PORTF that doubles as the TOSC1 crystal oscillator connection; USART2 TxD, TCA0 WO0 and CCL LUT3 IN0 are available.
21 PF1 (TOSC2) bidirectional General-purpose I/O on PORTF that doubles as the TOSC2 crystal oscillator connection; USART2 RxD, TCA0 WO1 and CCL LUT3 IN1 are available.
22 PF2 bidirectional General-purpose I/O on PORTF with analog input AIN12, default TWI0 SDA (client) and USART2 XCK functions, EVOUTF, and this pin supports full asynchronous interrupt detection.
23 PF3 bidirectional General-purpose I/O on PORTF with analog input AIN13, default TWI0 SCL (client) and USART2 XDIR functions, and TCA0 WO3 and CCL LUT3 OUT on alternate pin positions.
24 PF4 bidirectional General-purpose I/O on PORTF with analog input AIN14; USART2 TxD, TCA0 WO4 and TCB0 WO are available on alternate pin positions.
25 PF5 bidirectional General-purpose I/O on PORTF with analog input AIN15; USART2 RxD, TCA0 WO5 and TCB1 WO are available on alternate pin positions.
26 PF6 bidirectional General-purpose I/O on PORTF that can be configured as the RESET pin via the RSTPINCFG fuse; USART2 XCK and CCL LUT3 OUT are available on alternate pin positions.
27 UPDI bidirectional Unified Program and Debug Interface pin used for programming and debugging the device.
28 VDD power_in Main supply pin for the VDD power domain, rated 1.8-5.5V for the -AFR ordering code.
29 GND power_in Ground reference pin for the device.
30 PA0 (EXTCLK) bidirectional General-purpose I/O on PORTA that can also serve as the external clock input EXTCLK; USART0 TxD, TCA0 WO0 and CCL LUT0 IN0 are available.
31 PA1 bidirectional General-purpose I/O on PORTA; default function is USART0 RxD, with TCA0 WO1 and CCL LUT0 IN1 available.
32 PA2 bidirectional General-purpose I/O on PORTA with TWI0 SDA (host), USART0 XCK, TCA0 WO2, TCB0 WO and EVOUTA; this pin supports full asynchronous interrupt detection.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-32(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage 1.8 5.5 V ATmega4808-AFR (32 TQFP, 20 MHz, -40°C to +125°C), Ordering Information table 521
Temperature range -40 125 °C ATmega4808-AFR (32 TQFP, 20 MHz, 1.8-5.5V), Ordering Information table 521

CAD (KiCad official)

  • Symbol: ATMEGA4808-AFR
  • Footprint: Package_QFP:TQFP-32_7x7mm_P0.8mm
  • 3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: atmega4808-afr-etched.step / atmega4808-afr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega4808-afr.step / atmega4808-afr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (560 pp, sha256 a1755e46625fa50b, retrieved 2026-11-13, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF