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ATMEGA406-1AAU

Microchip Tech · Pre-ordered MCUs · LQFP-48(7x7)

ATMEGA406-1AAU from Microchip Tech, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SGND	power_in	Signal ground pin used as the reference for Voltage-ADC conversions.
2	PA0	bidirectional	Port A bit 0 is a low-voltage bi-directional I/O with selectable internal pull-up and also serves as analog input ADC0 and PCINT0.
3	PA1	bidirectional	Port A bit 1 is a low-voltage bi-directional I/O with selectable internal pull-up and also serves as analog input ADC1 and PCINT1.
4	PA2	bidirectional	Port A bit 2 is a low-voltage bi-directional I/O with selectable internal pull-up and also serves as analog input ADC2 and PCINT2.
5	PA3	bidirectional	Port A bit 3 is a low-voltage bi-directional I/O with selectable internal pull-up and also serves as analog input ADC3 and PCINT3.
6	VREG	power_out	Output from the internal Voltage Regulator, used for external decoupling to ensure stable regulator operation.
7	VCC	power_in	Digital supply voltage, normally connected to VREG.
8	GND	power_in	Ground pin.
9	PA4	bidirectional	Port A bit 4 is a low-voltage bi-directional I/O with selectable internal pull-up and also serves as ADC4, INT0 and PCINT4.
10	PA5	bidirectional	Port A bit 5 is a low-voltage bi-directional I/O with selectable internal pull-up and also serves as INT1 and PCINT5.
11	PA6	bidirectional	Port A bit 6 is a low-voltage bi-directional I/O with selectable internal pull-up and also serves as INT2 and PCINT6.
12	PA7	bidirectional	Port A bit 7 is a low-voltage bi-directional I/O with selectable internal pull-up and also serves as INT3 and PCINT7.
13	RESET	input	Reset input; a low level longer than the minimum pulse length generates a reset even if the clock is not running.
14	XTAL1	input	Clock/oscillator pin shown in the pinout figure; its electrical behaviour is not described in the provided pages.
15	XTAL2	output	Clock/oscillator pin shown in the pinout figure; its electrical behaviour is not described in the provided pages.
16	GND	power_in	Ground pin.
17	PB0	bidirectional	Port B bit 0 is a low-voltage bi-directional I/O with internal pull-up and also serves as TDO and PCINT8.
18	PB1	bidirectional	Port B bit 1 is a low-voltage bi-directional I/O with internal pull-up and also serves as TDI and PCINT9.
19	PB2	bidirectional	Port B bit 2 is a low-voltage bi-directional I/O with internal pull-up and also serves as TMS and PCINT10.
20	PB3	bidirectional	Port B bit 3 is a low-voltage bi-directional I/O with internal pull-up and also serves as TCK and PCINT11.
21	PB4	bidirectional	Port B bit 4 is a low-voltage bi-directional I/O with internal pull-up and also serves as PCINT12.
22	PB5	bidirectional	Port B bit 5 is a low-voltage bi-directional I/O with internal pull-up and also serves as PCINT13.
23	SCL	bidirectional	SMBUS clock, open drain bidirectional pin.
24	SDA	bidirectional	SMBUS data, open drain bidirectional pin.
25	PB6	bidirectional	Port B bit 6 is a low-voltage bi-directional I/O with internal pull-up and also serves as OC0A and PCINT14.
26	PB7	bidirectional	Port B bit 7 is a low-voltage bi-directional I/O with internal pull-up and also serves as OC0B and PCINT15.
27	PD0	bidirectional	Port D bit 0 is a low-voltage bi-directional I/O with internal pull-up and also serves as the T0 timer input.
28	PD1	bidirectional	Port D bit 1 is a low-voltage bi-directional I/O with internal pull-up resistors selectable per bit.
29	GND	power_in	Ground pin.
30	PC0	output	Port C is a high voltage Open Drain output port.
31	BATT	input	Input for detecting when a charger is connected; this pin also defines the pull-up level for the OC and OPC outputs.
32	OPC	output	High voltage output to drive an external pre-charge FET.
33	OC	output	High voltage output to drive an external charge FET.
34	VFET	power_in	High voltage supply pin for the internal voltage regulator, also monitored by the battery protection for deep under-voltage protection.
35	OD	output	High voltage output to drive an external discharge FET.
36	PVT	power_in	Defines the pull-up level for the OD output.
37	GND	power_in	Ground pin.
38	PV4	input	Input for battery cell 4, used by the Voltage ADC to measure the cell voltage.
39	PV3	input	Input for battery cell 3, used by the Voltage ADC to measure the cell voltage.
40	PV2	input	Input for battery cell 2, used by the Voltage ADC to measure the cell voltage.
41	PV1	input	Input for battery cell 1, used by the Voltage ADC to measure the cell voltage.
42	NV	input	Battery cell input listed with PV1 to PV4 for the Voltage ADC cell voltage measurement.
43	VREF	power_in	Internal voltage reference pin for external decoupling.
44	VREFGND	power_in	Ground for decoupling of the internal voltage reference.
45	PPI	input	Unfiltered positive input from the external current sense resistor, used for over-current and short-circuit detection.
46	PI	input	Filtered positive input from the external current sense resistor, used by the Coulomb Counter ADC to measure charge and discharge current.
47	NI	input	Filtered negative input from the external current sense resistor, used by the Coulomb Counter ADC to measure charge and discharge current.
48	NNI	input	Unfiltered negative input from the external current sense resistor, used for over-current and short-circuit detection.

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	LQFP-48(7x7)
Category	Embedded Processors & Controllers
Pins	48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Min	Max	Unit	Conditions	Page
Operating Voltage	4	25	V		1
Temperature Range	-30	85	°C	Industrial operation range	1
Maximum Withstand Voltage (High-voltage pins)		28	V	High-voltage pins	1

CAD (KiCad official)

Symbol: ATMEGA406-1AAU
Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
3D model files: atmega406-1aau-etched.step / atmega406-1aau-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega406-1aau.step / atmega406-1aau.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (30 pp, sha256 61ad461a45fda1c6, retrieved 2026-10-27, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF